Actions Semi ARM DT changes for v5.12:
Updates to the existing S500 ARM SoC. Support has been added for CMU (Clock Management Unit), Reset controller, DMA, Pinctrl/GPIO, MMC, I2C and SIRQ (interrupt controller). Since the CMU support is added, the dummy fixed clock used for the UART controller has been removed for all S500 based boards and proper UART clock from CMU is used. Added uSD support and I2C pinctrl configuration for Roseapplepi board based on S500 SoC. This will make the board boot mainline with a distro from uSD card. The I2C pinctrl config is added specifically for the PMIC which is currently under review. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEZ6VDKoFIy9ikWCeXVZ8R5v6RzvUFAmAczwYACgkQVZ8R5v6R zvXTugf/bR50Fmvp7pjlWJsEHZbkrvFpSw7SPJ8d6oKQc5lpq+vP4SuJM9Om+MQk ZLI7pzoOPNbSRqkklA8Mw9YbM8fZh+9pklp659mxyNwTIEKID72Cw/HB4E51gS5K Vrv1A4V8M70guNAYVIjSaCkenSJdEVSQPqsLmu4kl8Na9yK+6JoFO226Si9d6amU HYCz5WC3LN83wTz+XW23h1rUnZ8xZBRfsNwrZmNy8wIvbcRiKP31u70veeksrfDg LCT5umxlMIisEgq3tY1s6KoavhQpq/0XIntD9iSL5xPiuP6QAOgXwdnwtWNsjGYZ nldCUQof2Gme1aRL0DuuH4TLkvOjLA== =awis -----END PGP SIGNATURE----- Merge tag 'actions-arm-dt-for-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM DT changes for v5.12: Updates to the existing S500 ARM SoC. Support has been added for CMU (Clock Management Unit), Reset controller, DMA, Pinctrl/GPIO, MMC, I2C and SIRQ (interrupt controller). Since the CMU support is added, the dummy fixed clock used for the UART controller has been removed for all S500 based boards and proper UART clock from CMU is used. Added uSD support and I2C pinctrl configuration for Roseapplepi board based on S500 SoC. This will make the board boot mainline with a distro from uSD card. The I2C pinctrl config is added specifically for the PMIC which is currently under review. * tag 'actions-arm-dt-for-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: arm: dts: owl-s500-roseapplepi: Add I2C pinctrl configuration arm: dts: owl-s500-roseapplepi: Add uSD support arm: dts: owl-s500: Add SIRQ controller arm: dts: owl-s500: Add I2C support arm: dts: owl-s500: Add MMC support arm: dts: owl-s500: Add pinctrl & GPIO support arm: dts: owl-s500: Add DMA controller arm: dts: owl-s500: Add Reset controller arm: dts: owl-s500: Set CMU clocks for UARTs arm: dts: owl-s500: Add Clock Management Unit Link: https://lore.kernel.org/r/20210205050346.GA7619@thinkpad Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
74d60e2e93
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@ -25,12 +25,6 @@
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device_type = "memory";
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reg = <0x0 0x80000000>;
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};
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uart3_clk: uart3-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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};
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};
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&timer {
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@ -39,5 +33,4 @@
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&uart3 {
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status = "okay";
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clocks = <&uart3_clk>;
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};
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@ -18,15 +18,8 @@
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chosen {
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stdout-path = "serial3:115200n8";
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};
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uart3_clk: uart3-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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};
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};
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&uart3 {
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status = "okay";
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clocks = <&uart3_clk>;
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};
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@ -21,15 +21,8 @@
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chosen {
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stdout-path = "serial3:115200n8";
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};
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uart3_clk: uart3-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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};
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};
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&uart3 {
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status = "okay";
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clocks = <&uart3_clk>;
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};
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@ -14,6 +14,7 @@
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model = "Roseapple Pi";
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aliases {
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mmc0 = &mmc0;
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serial2 = &uart2;
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};
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@ -26,13 +27,100 @@
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reg = <0x0 0x80000000>; /* 2GB */
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};
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uart2_clk: uart2-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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/* Fixed regulator used in the absence of PMIC */
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sd_vcc: sd-vcc {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.1V";
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regulator-min-microvolt = <3100000>;
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regulator-max-microvolt = <3100000>;
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regulator-always-on;
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};
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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};
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&i2c1 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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};
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&i2c2 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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};
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&pinctrl {
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i2c0_pins: i2c0-pins {
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pinmux {
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groups = "i2c0_mfp";
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function = "i2c0";
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};
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pinconf {
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pins = "i2c0_sclk", "i2c0_sdata";
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bias-pull-up;
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};
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};
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i2c1_pins: i2c1-pins {
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pinconf {
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pins = "i2c1_sclk", "i2c1_sdata";
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bias-pull-up;
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};
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};
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i2c2_pins: i2c2-pins {
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pinconf {
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pins = "i2c2_sclk", "i2c2_sdata";
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bias-pull-up;
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};
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};
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mmc0_pins: mmc0-pins {
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pinmux {
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groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
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"sd0_cmd_mfp", "sd0_clk_mfp";
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function = "sd0";
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};
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drv-pinconf {
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groups = "sd0_d0_d3_drv", "sd0_cmd_drv", "sd0_clk_drv";
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drive-strength = <8>;
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};
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bias0-pinconf {
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pins = "sd0_d0", "sd0_d1", "sd0_d2",
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"sd0_d3", "sd0_cmd";
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bias-pull-up;
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};
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bias1-pinconf {
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pins = "sd0_clk";
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bias-pull-down;
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};
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};
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};
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/* uSD */
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&mmc0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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no-sdio;
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no-mmc;
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no-1-8-v;
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cd-gpios = <&pinctrl 117 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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vmmc-supply = <&sd_vcc>;
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vqmmc-supply = <&sd_vcc>;
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};
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&twd_timer {
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status = "okay";
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};
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@ -43,5 +131,4 @@
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&uart2 {
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status = "okay";
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clocks = <&uart2_clk>;
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};
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@ -25,12 +25,6 @@
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1 or 2 GiB */
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};
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uart3_clk: uart3-clk {
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compatible = "fixed-clock";
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clock-frequency = <921600>;
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#clock-cells = <0>;
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};
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};
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&timer {
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@ -39,5 +33,4 @@
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&uart3 {
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status = "okay";
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clocks = <&uart3_clk>;
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};
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@ -5,8 +5,11 @@
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* Copyright (c) 2016-2017 Andreas Färber
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*/
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#include <dt-bindings/clock/actions,s500-cmu.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/owl-s500-powergate.h>
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#include <dt-bindings/reset/actions,s500-reset.h>
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/ {
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compatible = "actions,s500";
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@ -70,6 +73,12 @@
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#clock-cells = <0>;
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};
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losc: losc {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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@ -124,6 +133,7 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb0120000 0x2000>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART0>;
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status = "disabled";
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};
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@ -131,6 +141,7 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb0122000 0x2000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART1>;
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status = "disabled";
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};
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@ -138,6 +149,7 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb0124000 0x2000>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART2>;
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status = "disabled";
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};
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@ -145,6 +157,7 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb0126000 0x2000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART3>;
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status = "disabled";
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};
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@ -152,6 +165,7 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb0128000 0x2000>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART4>;
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status = "disabled";
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};
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@ -159,6 +173,7 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb012a000 0x2000>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART5>;
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status = "disabled";
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};
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@ -166,9 +181,68 @@
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compatible = "actions,s500-uart", "actions,owl-uart";
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reg = <0xb012c000 0x2000>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART6>;
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status = "disabled";
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};
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cmu: clock-controller@b0160000 {
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compatible = "actions,s500-cmu";
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reg = <0xb0160000 0x8000>;
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clocks = <&hosc>, <&losc>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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i2c0: i2c@b0170000 {
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compatible = "actions,s500-i2c";
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reg = <0xb0170000 0x4000>;
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clocks = <&cmu CLK_I2C0>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@b0174000 {
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compatible = "actions,s500-i2c";
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reg = <0xb0174000 0x4000>;
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clocks = <&cmu CLK_I2C1>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@b0178000 {
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compatible = "actions,s500-i2c";
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reg = <0xb0178000 0x4000>;
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clocks = <&cmu CLK_I2C2>;
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c3: i2c@b017c000 {
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compatible = "actions,s500-i2c";
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reg = <0xb017c000 0x4000>;
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clocks = <&cmu CLK_I2C3>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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sirq: interrupt-controller@b01b0200 {
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compatible = "actions,s500-sirq";
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reg = <0xb01b0200 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */
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<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */
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<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */
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};
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timer: timer@b0168000 {
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compatible = "actions,s500-timer";
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reg = <0xb0168000 0x8000>;
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@ -184,5 +258,71 @@
|
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reg = <0xb01b0100 0x100>;
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#power-domain-cells = <1>;
|
||||
};
|
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|
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pinctrl: pinctrl@b01b0000 {
|
||||
compatible = "actions,s500-pinctrl";
|
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reg = <0xb01b0000 0x40>, /* GPIO */
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<0xb01b0040 0x10>, /* Multiplexing Control */
|
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<0xb01b0060 0x18>, /* PAD Control */
|
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<0xb01b0080 0xc>; /* PAD Drive Capacity */
|
||||
clocks = <&cmu CLK_GPIO>;
|
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gpio-controller;
|
||||
gpio-ranges = <&pinctrl 0 0 132>;
|
||||
#gpio-cells = <2>;
|
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interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
|
||||
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
|
||||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
|
||||
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
|
||||
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
|
||||
};
|
||||
|
||||
dma: dma-controller@b0260000 {
|
||||
compatible = "actions,s500-dma";
|
||||
reg = <0xb0260000 0xd00>;
|
||||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
|
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <12>;
|
||||
dma-requests = <46>;
|
||||
clocks = <&cmu CLK_DMAC>;
|
||||
power-domains = <&sps S500_PD_DMA>;
|
||||
};
|
||||
|
||||
mmc0: mmc@b0230000 {
|
||||
compatible = "actions,s500-mmc", "actions,owl-mmc";
|
||||
reg = <0xb0230000 0x38>;
|
||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_SD0>;
|
||||
resets = <&cmu RESET_SD0>;
|
||||
dmas = <&dma 2>;
|
||||
dma-names = "mmc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@b0234000 {
|
||||
compatible = "actions,s500-mmc", "actions,owl-mmc";
|
||||
reg = <0xb0234000 0x38>;
|
||||
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_SD1>;
|
||||
resets = <&cmu RESET_SD1>;
|
||||
dmas = <&dma 3>;
|
||||
dma-names = "mmc";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc2: mmc@b0238000 {
|
||||
compatible = "actions,s500-mmc", "actions,owl-mmc";
|
||||
reg = <0xb0238000 0x38>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cmu CLK_SD2>;
|
||||
resets = <&cmu RESET_SD2>;
|
||||
dmas = <&dma 4>;
|
||||
dma-names = "mmc";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
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