Fixes for the GPIO tree for v3.12:
- Two patches for the OMAP driver, dealing with setting up IRQs properly on the device tree boot path. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSUFcRAAoJEEEQszewGV1z9ikP/Rt07MJB/drgYebjDWNK4vEW AUo38pvxtzLf1rR+sS9JHIAwK5oi6bq3xKHPJVRjnAu3c8qpaDqgXDcnRh8oFY9y xdMUd+re9aUt2rltFaqgHofWbPiq2x0UYQ/EXGo92ApoBv5eSS+7Uy5MlcPfx1MT z+k3q6V+IuCcNmaM73i8H6f/KnPd9ZclaoEZOqQNDLCsrLMZW1Zo73wLwAWSt7gr Z5VC1EAT9iT00dlSa1+J0Hhk7q35UQwsd9Ra9y4mjiswcm/gwnEJDM3D8EIoidO8 /CoYBZfDNKZZWe+z7sa8ZnEJ8Twbczkm+PmcHJqMjyTi3kM7xLMLMXmuc1GRwdhi 9vUjbEdoRtyw8jgVUIsNVWRR62e5iitgEuB+AlvAcKM8GSeciOQicsL86I+5a0Dg EajsLpJ4/FSg1URwecxMzzGI107NfWpGOsY0KDZF+RdNvYlP8wMjH6DzXx9nHUsq m8M0ii8CRZTInXKgr8F8EwG0nfMaRcROyqoTXH0Yy/283a4NLlwhDGBEGGWSc5KV ZSB7u6mmUG+bSsswk1Eyvwd+slyd6HR4Lfpl7WbQ/U8HhNAkuSIjQ1qhSQvd7IPK 0DR+1TiUP69YXLqsYXXt89jKk9Nx2z6I1iN2sgaeS3tVAa5Vv8rW2Yk2QH+fWS7f IT9aaccEgS4EFOouuKlT =ALq3 -----END PGP SIGNATURE----- Merge tag 'gpio-v3.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO fixes from Linus Walleij: "Two patches for the OMAP driver, dealing with setting up IRQs properly on the device tree boot path" * tag 'gpio-v3.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio/omap: auto-setup a GPIO when used as an IRQ gpio/omap: maintain GPIO and IRQ usage separately
This commit is contained in:
Linus Torvalds
Коммит
85f6d2dbfd
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@ -63,6 +63,7 @@ struct gpio_bank {
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struct gpio_chip chip;
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struct clk *dbck;
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u32 mod_usage;
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u32 irq_usage;
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u32 dbck_enable_mask;
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bool dbck_enabled;
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struct device *dev;
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@ -86,6 +87,9 @@ struct gpio_bank {
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#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
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#define GPIO_MOD_CTRL_BIT BIT(0)
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#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
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#define LINE_USED(line, offset) (line & (1 << offset))
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static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
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{
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return bank->chip.base + gpio_irq;
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@ -420,15 +424,69 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
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return 0;
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}
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static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset)
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{
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if (bank->regs->pinctrl) {
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void __iomem *reg = bank->base + bank->regs->pinctrl;
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/* Claim the pin for MPU */
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__raw_writel(__raw_readl(reg) | (1 << offset), reg);
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}
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if (bank->regs->ctrl && !BANK_USED(bank)) {
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void __iomem *reg = bank->base + bank->regs->ctrl;
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u32 ctrl;
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ctrl = __raw_readl(reg);
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/* Module is enabled, clocks are not gated */
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ctrl &= ~GPIO_MOD_CTRL_BIT;
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__raw_writel(ctrl, reg);
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bank->context.ctrl = ctrl;
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}
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}
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static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset)
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{
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void __iomem *base = bank->base;
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if (bank->regs->wkup_en &&
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!LINE_USED(bank->mod_usage, offset) &&
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!LINE_USED(bank->irq_usage, offset)) {
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/* Disable wake-up during idle for dynamic tick */
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_gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
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bank->context.wake_en =
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__raw_readl(bank->base + bank->regs->wkup_en);
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}
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if (bank->regs->ctrl && !BANK_USED(bank)) {
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void __iomem *reg = bank->base + bank->regs->ctrl;
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u32 ctrl;
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ctrl = __raw_readl(reg);
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/* Module is disabled, clocks are gated */
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ctrl |= GPIO_MOD_CTRL_BIT;
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__raw_writel(ctrl, reg);
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bank->context.ctrl = ctrl;
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}
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}
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static int gpio_is_input(struct gpio_bank *bank, int mask)
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{
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void __iomem *reg = bank->base + bank->regs->direction;
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return __raw_readl(reg) & mask;
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}
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static int gpio_irq_type(struct irq_data *d, unsigned type)
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{
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struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
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unsigned gpio = 0;
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int retval;
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unsigned long flags;
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unsigned offset;
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if (WARN_ON(!bank->mod_usage))
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return -EINVAL;
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if (!BANK_USED(bank))
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pm_runtime_get_sync(bank->dev);
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#ifdef CONFIG_ARCH_OMAP1
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if (d->irq > IH_MPUIO_BASE)
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@ -446,7 +504,17 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
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return -EINVAL;
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spin_lock_irqsave(&bank->lock, flags);
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retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
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offset = GPIO_INDEX(bank, gpio);
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retval = _set_gpio_triggering(bank, offset, type);
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if (!LINE_USED(bank->mod_usage, offset)) {
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_enable_gpio_module(bank, offset);
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_set_gpio_direction(bank, offset, 1);
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} else if (!gpio_is_input(bank, 1 << offset)) {
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spin_unlock_irqrestore(&bank->lock, flags);
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return -EINVAL;
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}
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bank->irq_usage |= 1 << GPIO_INDEX(bank, gpio);
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spin_unlock_irqrestore(&bank->lock, flags);
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if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
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@ -603,35 +671,19 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
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* If this is the first gpio_request for the bank,
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* enable the bank module.
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*/
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if (!bank->mod_usage)
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if (!BANK_USED(bank))
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pm_runtime_get_sync(bank->dev);
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spin_lock_irqsave(&bank->lock, flags);
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/* Set trigger to none. You need to enable the desired trigger with
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* request_irq() or set_irq_type().
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* request_irq() or set_irq_type(). Only do this if the IRQ line has
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* not already been requested.
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*/
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if (!LINE_USED(bank->irq_usage, offset)) {
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_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
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if (bank->regs->pinctrl) {
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void __iomem *reg = bank->base + bank->regs->pinctrl;
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/* Claim the pin for MPU */
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__raw_writel(__raw_readl(reg) | (1 << offset), reg);
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_enable_gpio_module(bank, offset);
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}
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if (bank->regs->ctrl && !bank->mod_usage) {
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void __iomem *reg = bank->base + bank->regs->ctrl;
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u32 ctrl;
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ctrl = __raw_readl(reg);
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/* Module is enabled, clocks are not gated */
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ctrl &= ~GPIO_MOD_CTRL_BIT;
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__raw_writel(ctrl, reg);
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bank->context.ctrl = ctrl;
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}
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bank->mod_usage |= 1 << offset;
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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@ -640,31 +692,11 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
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static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
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{
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struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
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void __iomem *base = bank->base;
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unsigned long flags;
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spin_lock_irqsave(&bank->lock, flags);
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if (bank->regs->wkup_en) {
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/* Disable wake-up during idle for dynamic tick */
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_gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
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bank->context.wake_en =
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__raw_readl(bank->base + bank->regs->wkup_en);
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}
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bank->mod_usage &= ~(1 << offset);
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if (bank->regs->ctrl && !bank->mod_usage) {
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void __iomem *reg = bank->base + bank->regs->ctrl;
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u32 ctrl;
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ctrl = __raw_readl(reg);
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/* Module is disabled, clocks are gated */
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ctrl |= GPIO_MOD_CTRL_BIT;
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__raw_writel(ctrl, reg);
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bank->context.ctrl = ctrl;
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}
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_disable_gpio_module(bank, offset);
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_reset_gpio(bank, bank->chip.base + offset);
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spin_unlock_irqrestore(&bank->lock, flags);
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@ -672,7 +704,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
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* If this is the last gpio to be freed in the bank,
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* disable the bank module.
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*/
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if (!bank->mod_usage)
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if (!BANK_USED(bank))
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pm_runtime_put(bank->dev);
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}
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@ -762,10 +794,20 @@ static void gpio_irq_shutdown(struct irq_data *d)
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struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
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unsigned int gpio = irq_to_gpio(bank, d->hwirq);
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unsigned long flags;
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unsigned offset = GPIO_INDEX(bank, gpio);
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spin_lock_irqsave(&bank->lock, flags);
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bank->irq_usage &= ~(1 << offset);
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_disable_gpio_module(bank, offset);
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_reset_gpio(bank, gpio);
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spin_unlock_irqrestore(&bank->lock, flags);
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/*
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* If this is the last IRQ to be freed in the bank,
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* disable the bank module.
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*/
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if (!BANK_USED(bank))
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pm_runtime_put(bank->dev);
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}
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static void gpio_ack_irq(struct irq_data *d)
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@ -897,13 +939,6 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset)
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return 0;
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}
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static int gpio_is_input(struct gpio_bank *bank, int mask)
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{
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void __iomem *reg = bank->base + bank->regs->direction;
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return __raw_readl(reg) & mask;
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}
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static int gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct gpio_bank *bank;
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@ -922,13 +957,22 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct gpio_bank *bank;
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unsigned long flags;
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int retval = 0;
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bank = container_of(chip, struct gpio_bank, chip);
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spin_lock_irqsave(&bank->lock, flags);
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if (LINE_USED(bank->irq_usage, offset)) {
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retval = -EINVAL;
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goto exit;
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}
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bank->set_dataout(bank, offset, value);
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_set_gpio_direction(bank, offset, 0);
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exit:
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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return retval;
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}
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static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
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@ -1400,7 +1444,7 @@ void omap2_gpio_prepare_for_idle(int pwr_mode)
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struct gpio_bank *bank;
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list_for_each_entry(bank, &omap_gpio_list, node) {
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if (!bank->mod_usage || !bank->loses_context)
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if (!BANK_USED(bank) || !bank->loses_context)
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continue;
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bank->power_mode = pwr_mode;
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@ -1414,7 +1458,7 @@ void omap2_gpio_resume_after_idle(void)
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struct gpio_bank *bank;
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list_for_each_entry(bank, &omap_gpio_list, node) {
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if (!bank->mod_usage || !bank->loses_context)
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if (!BANK_USED(bank) || !bank->loses_context)
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continue;
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pm_runtime_get_sync(bank->dev);
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