[ARM] omap: convert OMAP2 to use clkdev
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
Russell King
Родитель
d7e8f1f9d6
Коммит
8ad8ff6548
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@ -31,6 +31,7 @@
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#include <mach/clock.h>
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#include <mach/sram.h>
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#include <asm/div64.h>
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#include <asm/clkdev.h>
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#include "memory.h"
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#include "clock.h"
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@ -44,6 +45,177 @@ static const struct clkops clkops_fixed;
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#include "clock24xx.h"
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struct omap_clk {
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u32 cpu;
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struct clk_lookup lk;
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};
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#define CLK(dev, con, ck, cp) \
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{ \
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.cpu = cp, \
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.lk = { \
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.dev_id = dev, \
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.con_id = con, \
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.clk = ck, \
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}, \
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}
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#define CK_243X (1 << 0)
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#define CK_242X (1 << 1)
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static struct omap_clk omap24xx_clks[] = {
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/* external root sources */
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CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X),
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CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X),
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CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X),
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CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X),
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/* internal analog sources */
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CLK(NULL, "dpll_ck", &dpll_ck, CK_243X | CK_242X),
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CLK(NULL, "apll96_ck", &apll96_ck, CK_243X | CK_242X),
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CLK(NULL, "apll54_ck", &apll54_ck, CK_243X | CK_242X),
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/* internal prcm root sources */
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CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X | CK_242X),
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CLK(NULL, "core_ck", &core_ck, CK_243X | CK_242X),
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CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X | CK_242X),
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CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X | CK_242X),
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CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X | CK_242X),
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CLK(NULL, "ck_wdt1_osc", &wdt1_osc_ck, CK_243X | CK_242X),
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CLK(NULL, "sys_clkout_src", &sys_clkout_src, CK_243X | CK_242X),
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CLK(NULL, "sys_clkout", &sys_clkout, CK_243X | CK_242X),
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CLK(NULL, "sys_clkout2_src", &sys_clkout2_src, CK_242X),
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CLK(NULL, "sys_clkout2", &sys_clkout2, CK_242X),
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CLK(NULL, "emul_ck", &emul_ck, CK_242X),
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/* mpu domain clocks */
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CLK(NULL, "mpu_ck", &mpu_ck, CK_243X | CK_242X),
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/* dsp domain clocks */
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CLK(NULL, "dsp_fck", &dsp_fck, CK_243X | CK_242X),
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CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_243X | CK_242X),
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CLK(NULL, "dsp_ick", &dsp_ick, CK_242X),
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CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X),
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CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X),
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CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X),
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/* GFX domain clocks */
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CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X | CK_242X),
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CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_243X | CK_242X),
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CLK(NULL, "gfx_ick", &gfx_ick, CK_243X | CK_242X),
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/* Modem domain clocks */
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CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
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CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
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/* DSS domain clocks */
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CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X),
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CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X),
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CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X),
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CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X),
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/* L3 domain clocks */
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CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
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CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
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CLK(NULL, "usb_l4_ick", &usb_l4_ick, CK_243X | CK_242X),
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/* L4 domain clocks */
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CLK(NULL, "l4_ck", &l4_ck, CK_243X | CK_242X),
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/* virtual meta-group clock */
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CLK(NULL, "virt_prcm_set", &virt_prcm_set, CK_243X | CK_242X),
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/* general l4 interface ck, multi-parent functional clk */
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CLK(NULL, "gpt1_ick", &gpt1_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt1_fck", &gpt1_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt2_ick", &gpt2_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt2_fck", &gpt2_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt3_ick", &gpt3_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt3_fck", &gpt3_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt4_ick", &gpt4_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt4_fck", &gpt4_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt5_ick", &gpt5_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt5_fck", &gpt5_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt6_ick", &gpt6_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt6_fck", &gpt6_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt7_ick", &gpt7_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt7_fck", &gpt7_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt8_ick", &gpt8_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt8_fck", &gpt8_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt9_ick", &gpt9_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt9_fck", &gpt9_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt10_ick", &gpt10_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt10_fck", &gpt10_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt11_ick", &gpt11_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt11_fck", &gpt11_fck, CK_243X | CK_242X),
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CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X | CK_242X),
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CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X | CK_242X),
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CLK("omap-mcbsp.1", "mcbsp_ick", &mcbsp1_ick, CK_243X | CK_242X),
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CLK("omap-mcbsp.1", "mcbsp_fck", &mcbsp1_fck, CK_243X | CK_242X),
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CLK("omap-mcbsp.2", "mcbsp_ick", &mcbsp2_ick, CK_243X | CK_242X),
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CLK("omap-mcbsp.2", "mcbsp_fck", &mcbsp2_fck, CK_243X | CK_242X),
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CLK("omap-mcbsp.3", "mcbsp_ick", &mcbsp3_ick, CK_243X),
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CLK("omap-mcbsp.3", "mcbsp_fck", &mcbsp3_fck, CK_243X),
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CLK("omap-mcbsp.4", "mcbsp_ick", &mcbsp4_ick, CK_243X),
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CLK("omap-mcbsp.4", "mcbsp_fck", &mcbsp4_fck, CK_243X),
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CLK("omap-mcbsp.5", "mcbsp_ick", &mcbsp5_ick, CK_243X),
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CLK("omap-mcbsp.5", "mcbsp_fck", &mcbsp5_fck, CK_243X),
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CLK("omap2_mcspi.1", "mcspi_ick", &mcspi1_ick, CK_243X | CK_242X),
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CLK("omap2_mcspi.1", "mcspi_fck", &mcspi1_fck, CK_243X | CK_242X),
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CLK("omap2_mcspi.2", "mcspi_ick", &mcspi2_ick, CK_243X | CK_242X),
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CLK("omap2_mcspi.2", "mcspi_fck", &mcspi2_fck, CK_243X | CK_242X),
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CLK("omap2_mcspi.3", "mcspi_ick", &mcspi3_ick, CK_243X),
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CLK("omap2_mcspi.3", "mcspi_fck", &mcspi3_fck, CK_243X),
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CLK(NULL, "uart1_ick", &uart1_ick, CK_243X | CK_242X),
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CLK(NULL, "uart1_fck", &uart1_fck, CK_243X | CK_242X),
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CLK(NULL, "uart2_ick", &uart2_ick, CK_243X | CK_242X),
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CLK(NULL, "uart2_fck", &uart2_fck, CK_243X | CK_242X),
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CLK(NULL, "uart3_ick", &uart3_ick, CK_243X | CK_242X),
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CLK(NULL, "uart3_fck", &uart3_fck, CK_243X | CK_242X),
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CLK(NULL, "gpios_ick", &gpios_ick, CK_243X | CK_242X),
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CLK(NULL, "gpios_fck", &gpios_fck, CK_243X | CK_242X),
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CLK(NULL, "mpu_wdt_ick", &mpu_wdt_ick, CK_243X | CK_242X),
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CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_243X | CK_242X),
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CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X | CK_242X),
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CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X | CK_242X),
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CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X | CK_242X),
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CLK(NULL, "icr_ick", &icr_ick, CK_243X),
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CLK(NULL, "cam_fck", &cam_fck, CK_243X | CK_242X),
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CLK(NULL, "cam_ick", &cam_ick, CK_243X | CK_242X),
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CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_243X | CK_242X),
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CLK(NULL, "wdt4_ick", &wdt4_ick, CK_243X | CK_242X),
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CLK(NULL, "wdt4_fck", &wdt4_fck, CK_243X | CK_242X),
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CLK(NULL, "wdt3_ick", &wdt3_ick, CK_242X),
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CLK(NULL, "wdt3_fck", &wdt3_fck, CK_242X),
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CLK(NULL, "mspro_ick", &mspro_ick, CK_243X | CK_242X),
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CLK(NULL, "mspro_fck", &mspro_fck, CK_243X | CK_242X),
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CLK(NULL, "mmc_ick", &mmc_ick, CK_242X),
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CLK(NULL, "mmc_fck", &mmc_fck, CK_242X),
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CLK(NULL, "fac_ick", &fac_ick, CK_243X | CK_242X),
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CLK(NULL, "fac_fck", &fac_fck, CK_243X | CK_242X),
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CLK(NULL, "eac_ick", &eac_ick, CK_242X),
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CLK(NULL, "eac_fck", &eac_fck, CK_242X),
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CLK(NULL, "hdq_ick", &hdq_ick, CK_243X | CK_242X),
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CLK(NULL, "hdq_fck", &hdq_fck, CK_243X | CK_242X),
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CLK("i2c_omap.1", "i2c_ick", &i2c1_ick, CK_243X | CK_242X),
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CLK("i2c_omap.1", "i2c_fck", &i2c1_fck, CK_242X),
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CLK("i2c_omap.1", "i2c_fck", &i2chs1_fck, CK_243X),
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CLK("i2c_omap.2", "i2c_ick", &i2c2_ick, CK_243X | CK_242X),
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CLK("i2c_omap.2", "i2c_fck", &i2c2_fck, CK_242X),
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CLK("i2c_omap.2", "i2c_fck", &i2chs2_fck, CK_243X),
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CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X | CK_242X),
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CLK(NULL, "sdma_fck", &sdma_fck, CK_243X | CK_242X),
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CLK(NULL, "sdma_ick", &sdma_ick, CK_243X | CK_242X),
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CLK(NULL, "vlynq_ick", &vlynq_ick, CK_242X),
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CLK(NULL, "vlynq_fck", &vlynq_fck, CK_242X),
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CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X),
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CLK(NULL, "des_ick", &des_ick, CK_243X | CK_242X),
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CLK(NULL, "sha_ick", &sha_ick, CK_243X | CK_242X),
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CLK(NULL, "rng_ick", &rng_ick, CK_243X | CK_242X),
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CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
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CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
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CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
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CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X),
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CLK("mmci-omap-hs.0", "mmchs_ick", &mmchs1_ick, CK_243X),
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CLK("mmci-omap-hs.0", "mmchs_fck", &mmchs1_fck, CK_243X),
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CLK("mmci-omap-hs.1", "mmchs_ick", &mmchs2_ick, CK_243X),
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CLK("mmci-omap-hs.1", "mmchs_fck", &mmchs2_fck, CK_243X),
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CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X),
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CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X),
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CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X),
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CLK("mmci-omap-hs.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X),
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CLK("mmci-omap-hs.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X),
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};
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/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
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#define EN_APLL_STOPPED 0
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#define EN_APLL_LOCKED 3
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@ -487,8 +659,8 @@ arch_initcall(omap2_clk_arch_init);
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int __init omap2_clk_init(void)
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{
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struct prcm_config *prcm;
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struct clk **clkp;
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u32 clkrate;
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struct omap_clk *c;
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u32 clkrate, cpu_mask;
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if (cpu_is_omap242x())
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cpu_mask = RATE_IN_242X;
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@ -502,21 +674,18 @@ int __init omap2_clk_init(void)
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omap2_sys_clk_recalc(&sys_ck);
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propagate_rate(&sys_ck);
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for (clkp = onchip_24xx_clks;
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clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks);
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clkp++) {
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cpu_mask = 0;
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if (cpu_is_omap2420())
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cpu_mask |= CK_242X;
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if (cpu_is_omap2430())
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cpu_mask |= CK_243X;
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if ((*clkp)->flags & CLOCK_IN_OMAP242X && cpu_is_omap2420()) {
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clk_register(*clkp);
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continue;
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for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++)
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if (c->cpu & cpu_mask) {
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clkdev_add(&c->lk);
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clk_register(c->lk.clk);
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}
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if ((*clkp)->flags & CLOCK_IN_OMAP243X && cpu_is_omap2430()) {
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clk_register(*clkp);
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continue;
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}
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}
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/* Check the MPU rate set by bootloader */
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clkrate = omap2_get_dpll_rate_24xx(&dpll_ck);
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for (prcm = rate_table; prcm->mpu_speed; prcm++) {
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Разница между файлами не показана из-за своего большого размера
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@ -16,6 +16,7 @@ config ARCH_OMAP1
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config ARCH_OMAP2
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bool "TI OMAP2"
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select CPU_V6
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select COMMON_CLKDEV
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config ARCH_OMAP3
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bool "TI OMAP3"
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@ -136,9 +136,7 @@ extern const struct clkops clkops_null;
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#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
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#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
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#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
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/* bits 13-24 are currently free */
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#define CLOCK_IN_OMAP242X (1 << 25)
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#define CLOCK_IN_OMAP243X (1 << 26)
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/* bits 13-26 are currently free */
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#define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */
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#define CLOCK_IN_OMAP3430ES1 (1 << 29) /* 3430ES1 clocks only */
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#define CLOCK_IN_OMAP3430ES2 (1 << 30) /* 3430ES2 clocks only */
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