gpio: zx: make use of raw_spinlock variants
The zx gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Родитель
a0a584f0e9
Коммит
8c41ab4f05
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@ -41,7 +41,7 @@
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#define ZX_GPIO_NR 16
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struct zx_gpio {
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spinlock_t lock;
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raw_spinlock_t lock;
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void __iomem *base;
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struct gpio_chip gc;
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@ -56,11 +56,11 @@ static int zx_direction_input(struct gpio_chip *gc, unsigned offset)
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if (offset >= gc->ngpio)
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return -EINVAL;
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spin_lock_irqsave(&chip->lock, flags);
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raw_spin_lock_irqsave(&chip->lock, flags);
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gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
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gpiodir &= ~BIT(offset);
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writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
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spin_unlock_irqrestore(&chip->lock, flags);
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raw_spin_unlock_irqrestore(&chip->lock, flags);
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return 0;
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}
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@ -75,7 +75,7 @@ static int zx_direction_output(struct gpio_chip *gc, unsigned offset,
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if (offset >= gc->ngpio)
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return -EINVAL;
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spin_lock_irqsave(&chip->lock, flags);
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raw_spin_lock_irqsave(&chip->lock, flags);
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gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
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gpiodir |= BIT(offset);
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writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
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@ -84,7 +84,7 @@ static int zx_direction_output(struct gpio_chip *gc, unsigned offset,
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writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);
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else
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writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);
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spin_unlock_irqrestore(&chip->lock, flags);
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raw_spin_unlock_irqrestore(&chip->lock, flags);
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return 0;
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}
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@ -118,7 +118,7 @@ static int zx_irq_type(struct irq_data *d, unsigned trigger)
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if (offset < 0 || offset >= ZX_GPIO_NR)
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return -EINVAL;
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spin_lock_irqsave(&chip->lock, flags);
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raw_spin_lock_irqsave(&chip->lock, flags);
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gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);
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gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);
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@ -151,7 +151,7 @@ static int zx_irq_type(struct irq_data *d, unsigned trigger)
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writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);
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writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);
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writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);
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spin_unlock_irqrestore(&chip->lock, flags);
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raw_spin_unlock_irqrestore(&chip->lock, flags);
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return 0;
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}
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@ -184,12 +184,12 @@ static void zx_irq_mask(struct irq_data *d)
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u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR);
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u16 gpioie;
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spin_lock(&chip->lock);
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raw_spin_lock(&chip->lock);
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gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;
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writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
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gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;
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writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
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spin_unlock(&chip->lock);
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raw_spin_unlock(&chip->lock);
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}
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static void zx_irq_unmask(struct irq_data *d)
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@ -199,12 +199,12 @@ static void zx_irq_unmask(struct irq_data *d)
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u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR);
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u16 gpioie;
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spin_lock(&chip->lock);
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raw_spin_lock(&chip->lock);
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gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;
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writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
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gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;
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writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
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spin_unlock(&chip->lock);
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raw_spin_unlock(&chip->lock);
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}
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static struct irq_chip zx_irqchip = {
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@ -230,7 +230,7 @@ static int zx_gpio_probe(struct platform_device *pdev)
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if (IS_ERR(chip->base))
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return PTR_ERR(chip->base);
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spin_lock_init(&chip->lock);
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raw_spin_lock_init(&chip->lock);
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if (of_property_read_bool(dev->of_node, "gpio-ranges")) {
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chip->gc.request = gpiochip_generic_request;
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chip->gc.free = gpiochip_generic_free;
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