x86: merge tsc_init and clocksource code
Unify the clocksource code. Unify the tsc_init code. Signed-off-by: Alok N Kataria <akataria@vmware.com> Signed-off-by: Dan Hecht <dhecht@vmware.com> Cc: Dan Hecht <dhecht@vmware.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Alok Kataria
Ingo Molnar
Родитель
2dbe06faf3
Коммит
8fbbc4b45c
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@ -26,7 +26,7 @@ obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o
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obj-y += bootflag.o e820.o
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obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o
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obj-y += alternative.o i8253.o pci-nommu.o
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obj-y += tsc_$(BITS).o io_delay.o rtc.o tsc.o
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obj-y += tsc.o io_delay.o rtc.o
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obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
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obj-y += process.o
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@ -56,7 +56,7 @@ static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
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/* calibrate_cpu is used on systems with fixed rate TSCs to determine
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* processor frequency */
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#define TICK_COUNT 100000000
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static unsigned long __init calibrate_cpu(void)
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unsigned long __init calibrate_cpu(void)
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{
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int tsc_start, tsc_now;
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int i, no_ctr_free;
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@ -114,41 +114,13 @@ void __init hpet_time_init(void)
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setup_irq(0, &irq0);
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}
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extern void set_cyc2ns_scale(unsigned long cpu_khz, int cpu);
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void __init time_init(void)
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{
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int cpu;
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
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(boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
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cpu_khz = calibrate_cpu();
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lpj_fine = ((unsigned long)tsc_khz * 1000)/HZ;
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if (unsynchronized_tsc())
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mark_tsc_unstable("TSCs unsynchronized");
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tsc_init();
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if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
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vgetcpu_mode = VGETCPU_RDTSCP;
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else
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vgetcpu_mode = VGETCPU_LSL;
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printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
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cpu_khz / 1000, cpu_khz % 1000);
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/*
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* Secondary CPUs do not run through tsc_init(), so set up
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* all the scale factors for all CPUs, assuming the same
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* speed as the bootup CPU. (cpufreq notifiers will fix this
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* up if their speed diverges)
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*/
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for_each_possible_cpu(cpu)
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set_cyc2ns_scale(cpu_khz, cpu);
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init_tsc_clocksource();
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late_time_init = choose_time_init();
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}
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@ -5,8 +5,16 @@
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#include <linux/timer.h>
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#include <linux/acpi_pmtmr.h>
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#include <linux/cpufreq.h>
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#include <linux/dmi.h>
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#include <linux/delay.h>
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#include <linux/clocksource.h>
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#include <linux/percpu.h>
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#include <asm/hpet.h>
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#include <asm/timer.h>
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#include <asm/vgtod.h>
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#include <asm/time.h>
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#include <asm/delay.h>
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unsigned int cpu_khz; /* TSC clocks / usec, not used here */
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EXPORT_SYMBOL(cpu_khz);
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@ -16,12 +24,12 @@ EXPORT_SYMBOL(tsc_khz);
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/*
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* TSC can be unstable due to cpufreq or due to unsynced TSCs
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*/
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int tsc_unstable;
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static int tsc_unstable;
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/* native_sched_clock() is called before tsc_init(), so
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we must start with the TSC soft disabled to prevent
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erroneous rdtsc usage on !cpu_has_tsc processors */
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int tsc_disabled = -1;
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static int tsc_disabled = -1;
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/*
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* Scheduler clock - returns current time in nanosec units.
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@ -241,7 +249,7 @@ EXPORT_SYMBOL(recalibrate_cpu_khz);
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DEFINE_PER_CPU(unsigned long, cyc2ns);
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void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
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static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
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{
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unsigned long long tsc_now, ns_now;
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unsigned long flags, *scale;
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@ -329,3 +337,201 @@ static int __init cpufreq_tsc(void)
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core_initcall(cpufreq_tsc);
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#endif /* CONFIG_CPU_FREQ */
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/* clocksource code */
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static struct clocksource clocksource_tsc;
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/*
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* We compare the TSC to the cycle_last value in the clocksource
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* structure to avoid a nasty time-warp. This can be observed in a
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* very small window right after one CPU updated cycle_last under
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* xtime/vsyscall_gtod lock and the other CPU reads a TSC value which
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* is smaller than the cycle_last reference value due to a TSC which
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* is slighty behind. This delta is nowhere else observable, but in
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* that case it results in a forward time jump in the range of hours
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* due to the unsigned delta calculation of the time keeping core
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* code, which is necessary to support wrapping clocksources like pm
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* timer.
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*/
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static cycle_t read_tsc(void)
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{
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cycle_t ret = (cycle_t)get_cycles();
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return ret >= clocksource_tsc.cycle_last ?
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ret : clocksource_tsc.cycle_last;
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}
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static cycle_t __vsyscall_fn vread_tsc(void)
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{
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cycle_t ret = (cycle_t)vget_cycles();
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return ret >= __vsyscall_gtod_data.clock.cycle_last ?
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ret : __vsyscall_gtod_data.clock.cycle_last;
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}
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static struct clocksource clocksource_tsc = {
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.name = "tsc",
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.rating = 300,
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.read = read_tsc,
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.mask = CLOCKSOURCE_MASK(64),
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.shift = 22,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS |
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CLOCK_SOURCE_MUST_VERIFY,
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#ifdef CONFIG_X86_64
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.vread = vread_tsc,
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#endif
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};
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void mark_tsc_unstable(char *reason)
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{
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if (!tsc_unstable) {
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tsc_unstable = 1;
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printk("Marking TSC unstable due to %s\n", reason);
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/* Change only the rating, when not registered */
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if (clocksource_tsc.mult)
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clocksource_change_rating(&clocksource_tsc, 0);
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else
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clocksource_tsc.rating = 0;
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}
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}
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EXPORT_SYMBOL_GPL(mark_tsc_unstable);
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static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
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{
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printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
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d->ident);
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tsc_unstable = 1;
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return 0;
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}
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/* List of systems that have known TSC problems */
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static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
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{
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.callback = dmi_mark_tsc_unstable,
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.ident = "IBM Thinkpad 380XD",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
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DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
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},
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},
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{}
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};
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/*
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* Geode_LX - the OLPC CPU has a possibly a very reliable TSC
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*/
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#ifdef CONFIG_MGEODE_LX
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/* RTSC counts during suspend */
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#define RTSC_SUSP 0x100
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static void __init check_geode_tsc_reliable(void)
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{
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unsigned long res_low, res_high;
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rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
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if (res_low & RTSC_SUSP)
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clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
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}
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#else
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static inline void check_geode_tsc_reliable(void) { }
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#endif
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/*
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* Make an educated guess if the TSC is trustworthy and synchronized
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* over all CPUs.
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*/
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__cpuinit int unsynchronized_tsc(void)
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{
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if (!cpu_has_tsc || tsc_unstable)
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return 1;
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#ifdef CONFIG_SMP
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if (apic_is_clustered_box())
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return 1;
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#endif
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if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
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return 0;
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/*
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* Intel systems are normally all synchronized.
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* Exceptions must mark TSC as unstable:
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*/
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if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
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/* assume multi socket systems are not synchronized: */
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if (num_possible_cpus() > 1)
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tsc_unstable = 1;
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}
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return tsc_unstable;
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}
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static void __init init_tsc_clocksource(void)
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{
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clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
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clocksource_tsc.shift);
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/* lower the rating if we already know its unstable: */
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if (check_tsc_unstable()) {
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clocksource_tsc.rating = 0;
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clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
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}
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clocksource_register(&clocksource_tsc);
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}
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void __init tsc_init(void)
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{
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u64 lpj;
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int cpu;
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if (!cpu_has_tsc)
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return;
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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if (!cpu_khz) {
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mark_tsc_unstable("could not calculate TSC khz");
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return;
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}
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#ifdef CONFIG_X86_64
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if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
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(boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
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cpu_khz = calibrate_cpu();
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#endif
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lpj = ((u64)tsc_khz * 1000);
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do_div(lpj, HZ);
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lpj_fine = lpj;
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printk("Detected %lu.%03lu MHz processor.\n",
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz % 1000);
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/*
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* Secondary CPUs do not run through tsc_init(), so set up
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* all the scale factors for all CPUs, assuming the same
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* speed as the bootup CPU. (cpufreq notifiers will fix this
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* up if their speed diverges)
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*/
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for_each_possible_cpu(cpu)
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set_cyc2ns_scale(cpu_khz, cpu);
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if (tsc_disabled > 0)
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return;
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/* now allow native_sched_clock() to use rdtsc */
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tsc_disabled = 0;
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use_tsc_delay();
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/* Check and install the TSC clocksource */
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dmi_check_system(bad_tsc_dmi_table);
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if (unsynchronized_tsc())
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mark_tsc_unstable("TSCs unsynchronized");
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check_geode_tsc_reliable();
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init_tsc_clocksource();
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}
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@ -1,188 +0,0 @@
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#include <linux/sched.h>
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#include <linux/clocksource.h>
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#include <linux/workqueue.h>
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#include <linux/delay.h>
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#include <linux/cpufreq.h>
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#include <linux/jiffies.h>
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#include <linux/init.h>
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#include <linux/dmi.h>
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#include <linux/percpu.h>
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#include <asm/delay.h>
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#include <asm/tsc.h>
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#include <asm/io.h>
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#include <asm/timer.h>
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#include "mach_timer.h"
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extern int tsc_unstable;
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extern int tsc_disabled;
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/* clock source code */
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static struct clocksource clocksource_tsc;
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/*
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* We compare the TSC to the cycle_last value in the clocksource
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* structure to avoid a nasty time-warp issue. This can be observed in
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* a very small window right after one CPU updated cycle_last under
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* xtime lock and the other CPU reads a TSC value which is smaller
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* than the cycle_last reference value due to a TSC which is slighty
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* behind. This delta is nowhere else observable, but in that case it
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* results in a forward time jump in the range of hours due to the
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* unsigned delta calculation of the time keeping core code, which is
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* necessary to support wrapping clocksources like pm timer.
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*/
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static cycle_t read_tsc(void)
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{
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cycle_t ret;
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rdtscll(ret);
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return ret >= clocksource_tsc.cycle_last ?
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ret : clocksource_tsc.cycle_last;
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}
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static struct clocksource clocksource_tsc = {
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.name = "tsc",
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.rating = 300,
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.read = read_tsc,
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.mask = CLOCKSOURCE_MASK(64),
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.mult = 0, /* to be set */
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.shift = 22,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS |
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CLOCK_SOURCE_MUST_VERIFY,
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};
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void mark_tsc_unstable(char *reason)
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{
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if (!tsc_unstable) {
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tsc_unstable = 1;
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printk("Marking TSC unstable due to: %s.\n", reason);
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/* Can be called before registration */
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if (clocksource_tsc.mult)
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clocksource_change_rating(&clocksource_tsc, 0);
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else
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clocksource_tsc.rating = 0;
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}
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}
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EXPORT_SYMBOL_GPL(mark_tsc_unstable);
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static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
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{
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printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
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d->ident);
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tsc_unstable = 1;
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return 0;
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}
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/* List of systems that have known TSC problems */
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static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
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{
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.callback = dmi_mark_tsc_unstable,
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.ident = "IBM Thinkpad 380XD",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
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DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
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},
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},
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{}
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};
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/*
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* Make an educated guess if the TSC is trustworthy and synchronized
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* over all CPUs.
|
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*/
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__cpuinit int unsynchronized_tsc(void)
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{
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if (!cpu_has_tsc || tsc_unstable)
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return 1;
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/* Anything with constant TSC should be synchronized */
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if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
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return 0;
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/*
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* Intel systems are normally all synchronized.
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* Exceptions must mark TSC as unstable:
|
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*/
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if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
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/* assume multi socket systems are not synchronized: */
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if (num_possible_cpus() > 1)
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tsc_unstable = 1;
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}
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return tsc_unstable;
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}
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/*
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* Geode_LX - the OLPC CPU has a possibly a very reliable TSC
|
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*/
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||||
#ifdef CONFIG_MGEODE_LX
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/* RTSC counts during suspend */
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#define RTSC_SUSP 0x100
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static void __init check_geode_tsc_reliable(void)
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{
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unsigned long res_low, res_high;
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rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
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if (res_low & RTSC_SUSP)
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clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
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}
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#else
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static inline void check_geode_tsc_reliable(void) { }
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#endif
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void __init tsc_init(void)
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{
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int cpu;
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u64 lpj;
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if (!cpu_has_tsc || tsc_disabled > 0)
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return;
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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if (!cpu_khz) {
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mark_tsc_unstable("could not calculate TSC khz");
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return;
|
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}
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lpj = ((u64)tsc_khz * 1000);
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do_div(lpj, HZ);
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lpj_fine = lpj;
|
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|
||||
/* now allow native_sched_clock() to use rdtsc */
|
||||
tsc_disabled = 0;
|
||||
|
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printk("Detected %lu.%03lu MHz processor.\n",
|
||||
(unsigned long)cpu_khz / 1000,
|
||||
(unsigned long)cpu_khz % 1000);
|
||||
|
||||
/*
|
||||
* Secondary CPUs do not run through tsc_init(), so set up
|
||||
* all the scale factors for all CPUs, assuming the same
|
||||
* speed as the bootup CPU. (cpufreq notifiers will fix this
|
||||
* up if their speed diverges)
|
||||
*/
|
||||
for_each_possible_cpu(cpu)
|
||||
set_cyc2ns_scale(cpu_khz, cpu);
|
||||
|
||||
use_tsc_delay();
|
||||
|
||||
/* Check and install the TSC clocksource */
|
||||
dmi_check_system(bad_tsc_dmi_table);
|
||||
|
||||
unsynchronized_tsc();
|
||||
check_geode_tsc_reliable();
|
||||
clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
|
||||
clocksource_tsc.shift);
|
||||
/* lower the rating if we already know its unstable: */
|
||||
if (check_tsc_unstable()) {
|
||||
clocksource_tsc.rating = 0;
|
||||
clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
|
||||
}
|
||||
clocksource_register(&clocksource_tsc);
|
||||
}
|
||||
|
|
@ -1,106 +0,0 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/time.h>
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/acpi_pmtmr.h>
|
||||
|
||||
#include <asm/hpet.h>
|
||||
#include <asm/timex.h>
|
||||
#include <asm/timer.h>
|
||||
#include <asm/vgtod.h>
|
||||
|
||||
extern int tsc_unstable;
|
||||
extern int tsc_disabled;
|
||||
|
||||
/*
|
||||
* Make an educated guess if the TSC is trustworthy and synchronized
|
||||
* over all CPUs.
|
||||
*/
|
||||
__cpuinit int unsynchronized_tsc(void)
|
||||
{
|
||||
if (tsc_unstable)
|
||||
return 1;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
if (apic_is_clustered_box())
|
||||
return 1;
|
||||
#endif
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
|
||||
return 0;
|
||||
|
||||
/* Assume multi socket systems are not synchronized */
|
||||
return num_present_cpus() > 1;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_tsc;
|
||||
|
||||
/*
|
||||
* We compare the TSC to the cycle_last value in the clocksource
|
||||
* structure to avoid a nasty time-warp. This can be observed in a
|
||||
* very small window right after one CPU updated cycle_last under
|
||||
* xtime/vsyscall_gtod lock and the other CPU reads a TSC value which
|
||||
* is smaller than the cycle_last reference value due to a TSC which
|
||||
* is slighty behind. This delta is nowhere else observable, but in
|
||||
* that case it results in a forward time jump in the range of hours
|
||||
* due to the unsigned delta calculation of the time keeping core
|
||||
* code, which is necessary to support wrapping clocksources like pm
|
||||
* timer.
|
||||
*/
|
||||
static cycle_t read_tsc(void)
|
||||
{
|
||||
cycle_t ret = (cycle_t)get_cycles();
|
||||
|
||||
return ret >= clocksource_tsc.cycle_last ?
|
||||
ret : clocksource_tsc.cycle_last;
|
||||
}
|
||||
|
||||
static cycle_t __vsyscall_fn vread_tsc(void)
|
||||
{
|
||||
cycle_t ret = (cycle_t)vget_cycles();
|
||||
|
||||
return ret >= __vsyscall_gtod_data.clock.cycle_last ?
|
||||
ret : __vsyscall_gtod_data.clock.cycle_last;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_tsc = {
|
||||
.name = "tsc",
|
||||
.rating = 300,
|
||||
.read = read_tsc,
|
||||
.mask = CLOCKSOURCE_MASK(64),
|
||||
.shift = 22,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS |
|
||||
CLOCK_SOURCE_MUST_VERIFY,
|
||||
.vread = vread_tsc,
|
||||
};
|
||||
|
||||
void mark_tsc_unstable(char *reason)
|
||||
{
|
||||
if (!tsc_unstable) {
|
||||
tsc_unstable = 1;
|
||||
printk("Marking TSC unstable due to %s\n", reason);
|
||||
/* Change only the rating, when not registered */
|
||||
if (clocksource_tsc.mult)
|
||||
clocksource_change_rating(&clocksource_tsc, 0);
|
||||
else
|
||||
clocksource_tsc.rating = 0;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mark_tsc_unstable);
|
||||
|
||||
void __init init_tsc_clocksource(void)
|
||||
{
|
||||
if (tsc_disabled > 0)
|
||||
return;
|
||||
|
||||
clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
|
||||
clocksource_tsc.shift);
|
||||
if (check_tsc_unstable())
|
||||
clocksource_tsc.rating = 0;
|
||||
|
||||
clocksource_register(&clocksource_tsc);
|
||||
}
|
||||
|
|
@ -121,12 +121,17 @@ extern void enable_NMI_through_LVT0(void);
|
|||
*/
|
||||
#ifdef CONFIG_X86_64
|
||||
extern void early_init_lapic_mapping(void);
|
||||
extern int apic_is_clustered_box(void);
|
||||
#else
|
||||
static inline int apic_is_clustered_box(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
|
||||
extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
|
||||
|
||||
extern int apic_is_clustered_box(void);
|
||||
|
||||
#else /* !CONFIG_X86_LOCAL_APIC */
|
||||
static inline void lapic_shutdown(void) { }
|
||||
|
|
|
|||
|
|
@ -26,6 +26,10 @@ extern void __delay(unsigned long loops);
|
|||
((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
|
||||
__ndelay(n))
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
void use_tsc_delay(void);
|
||||
#else
|
||||
#define use_tsc_delay() {}
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_X86_DELAY_H */
|
||||
|
|
|
|||
|
|
@ -56,4 +56,6 @@ static inline int native_set_wallclock(unsigned long nowtime)
|
|||
|
||||
#endif /* CONFIG_PARAVIRT */
|
||||
|
||||
extern unsigned long __init calibrate_cpu(void);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -48,7 +48,6 @@ static __always_inline cycles_t vget_cycles(void)
|
|||
extern void tsc_init(void);
|
||||
extern void mark_tsc_unstable(char *reason);
|
||||
extern int unsynchronized_tsc(void);
|
||||
extern void init_tsc_clocksource(void);
|
||||
int check_tsc_unstable(void);
|
||||
|
||||
/*
|
||||
|
|
|
|||
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