dt-bindings: mmc: renesas,sdhi: convert to YAML
Convert Renesas SDHI SD/MMC controller document to YAML. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1594363883-22154-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Yoshihiro Shimoda
Ulf Hansson
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Коммит
a1c7673409
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* Renesas SDHI SD/MMC controller
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Required properties:
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- compatible: should contain one or more of the following:
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"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
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"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
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"renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
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"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
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"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
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"renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
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"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
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"renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
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"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
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"renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
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"renesas,sdhi-r8a774b1" - SDHI IP on R8A774B1 SoC
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"renesas,sdhi-r8a774c0" - SDHI IP on R8A774C0 SoC
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"renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
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"renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
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"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
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"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
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"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
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"renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
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"renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
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"renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
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"renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
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"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
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"renesas,sdhi-r8a7796" - SDHI IP on R8A77960 SoC
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"renesas,sdhi-r8a77961" - SDHI IP on R8A77961 SoC
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"renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
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"renesas,sdhi-r8a77970" - SDHI IP on R8A77970 SoC
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"renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
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"renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
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"renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
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"renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
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"renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
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"renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
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(not SDHI/MMC) controller
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"renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
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SDHI controller
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When compatible with the generic version, nodes must list
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the SoC-specific version corresponding to the platform
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first followed by the generic version.
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- clocks: Most controllers only have 1 clock source per channel. However, on
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some variations of this controller, the internal card detection
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logic that exists in this controller is sectioned off to be run by a
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separate second clock source to allow the main core clock to be turned
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off to save power.
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If 2 clocks are specified by the hardware, you must name them as
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"core" and "cd". If the controller only has 1 clock, naming is not
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required.
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Devices which have more than 1 clock are listed below:
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2: R7S72100, R7S9210
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Optional properties:
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- pinctrl-names: should be "default", "state_uhs"
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- pinctrl-0: should contain default/high speed pin ctrl
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- pinctrl-1: should contain uhs mode pin ctrl
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Example: R8A7790 (R-Car H2) SDHI controller nodes
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee100000 0 0x328>;
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interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 314>;
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dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
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<&dmac1 0xcd>, <&dmac1 0xce>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <195000000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 314>;
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};
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sdhi1: sd@ee120000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee120000 0 0x328>;
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 313>;
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dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
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<&dmac1 0xc9>, <&dmac1 0xca>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <195000000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 313>;
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};
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sdhi2: sd@ee140000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee140000 0 0x100>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 312>;
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dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
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<&dmac1 0xc1>, <&dmac1 0xc2>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <97500000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 312>;
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};
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sdhi3: sd@ee160000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0 0xee160000 0 0x100>;
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interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 311>;
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dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
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<&dmac1 0xd3>, <&dmac1 0xd4>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <97500000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 311>;
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};
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@ -0,0 +1,191 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Renesas SDHI SD/MMC controller
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maintainers:
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- Wolfram Sang <wsa+renesas@sang-engineering.com>
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allOf:
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- $ref: "mmc-controller.yaml"
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properties:
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compatible:
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oneOf:
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- items:
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- const: renesas,sdhi-sh73a0 # R-Mobile APE6
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- items:
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- const: renesas,sdhi-r7s72100 # RZ/A1H
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- items:
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- const: renesas,sdhi-r7s9210 # SH-Mobile AG5
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- items:
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- const: renesas,sdhi-r8a73a4 # R-Mobile APE6
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- items:
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- const: renesas,sdhi-r8a7740 # R-Mobile A1
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- items:
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- enum:
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- renesas,sdhi-r8a7778 # R-Car M1
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- renesas,sdhi-r8a7779 # R-Car H1
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- const: renesas,rcar-gen1-sdhi # R-Car Gen1
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- items:
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- enum:
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- renesas,sdhi-r8a7742 # RZ/G1H
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- renesas,sdhi-r8a7743 # RZ/G1M
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- renesas,sdhi-r8a7744 # RZ/G1N
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- renesas,sdhi-r8a7745 # RZ/G1E
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- renesas,sdhi-r8a77470 # RZ/G1C
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- renesas,sdhi-r8a7790 # R-Car H2
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- renesas,sdhi-r8a7791 # R-Car M2-W
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- renesas,sdhi-r8a7792 # R-Car V2H
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- renesas,sdhi-r8a7793 # R-Car M2-N
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- renesas,sdhi-r8a7794 # R-Car E2
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- const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
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- items:
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- const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
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- items:
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- enum:
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- renesas,sdhi-r8a774a1 # RZ/G2M
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- renesas,sdhi-r8a774b1 # RZ/G2N
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- renesas,sdhi-r8a774c0 # RZ/G2E
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- renesas,sdhi-r8a7795 # R-Car H3
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- renesas,sdhi-r8a7796 # R-Car M3-W
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- renesas,sdhi-r8a77961 # R-Car M3-W+
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- renesas,sdhi-r8a77965 # R-Car M3-N
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- renesas,sdhi-r8a77970 # R-Car V3M
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- renesas,sdhi-r8a77980 # R-Car V3H
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- renesas,sdhi-r8a77990 # R-Car E3
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- renesas,sdhi-r8a77995 # R-Car D3
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- const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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maxItems: 3
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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minItems: 1
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maxItems: 2
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items:
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- const: core
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- const: cd
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dmas:
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minItems: 4
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maxItems: 4
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dma-names:
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minItems: 4
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maxItems: 4
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items:
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enum:
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- tx
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- rx
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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pinctrl-0:
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minItems: 1
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maxItems: 2
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pinctrl-1:
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maxItems: 1
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pinctrl-names:
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minItems: 1
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maxItems: 2
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items:
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- const: default
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- const: state_uhs
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max-frequency: true
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- power-domains
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if:
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properties:
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compatible:
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items:
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enum:
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- renesas,sdhi-r7s72100
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- renesas,sdhi-r7s9210
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then:
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required:
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- clock-names
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description:
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The internal card detection logic that exists in these controllers is
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sectioned off to be run by a separate second clock source to allow
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the main core clock to be turned off to save power.
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7790-sysc.h>
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sdhi0: mmc@ee100000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0xee100000 0x328>;
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interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 314>;
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dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <195000000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 314>;
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};
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sdhi1: mmc@ee120000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0xee120000 0x328>;
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 313>;
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dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <195000000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 313>;
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};
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sdhi2: mmc@ee140000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0xee140000 0x100>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 312>;
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dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <97500000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 312>;
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};
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sdhi3: mmc@ee160000 {
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compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
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reg = <0xee160000 0x100>;
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interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 311>;
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dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
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dma-names = "tx", "rx", "tx", "rx";
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max-frequency = <97500000>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 311>;
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};
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