drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi
the original imx hdmi driver is under drm/imx/, which depends on imx-drm, so move the imx hdmi driver out to drm/bridge and rename it to dw_hdmi Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Tested-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Andy Yan
Philipp Zabel
Родитель
aaa757a092
Коммит
b21f4b658d
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@ -3,3 +3,8 @@ config DRM_PTN3460
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depends on DRM
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select DRM_KMS_HELPER
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---help---
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config DRM_DW_HDMI
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tristate
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depends on DRM
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select DRM_KMS_HELPER
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@ -1,3 +1,4 @@
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ccflags-y := -Iinclude/drm
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obj-$(CONFIG_DRM_PTN3460) += ptn3460.o
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obj-$(CONFIG_DRM_DW_HDMI) += dw_hdmi.o
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@ -6,12 +6,11 @@
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* SH-Mobile High-Definition Multimedia Interface (HDMI) driver
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* for SLISHDMI13T and SLIPHDMIT IP cores
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* Designware High-Definition Multimedia Interface (HDMI) driver
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*
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* Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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*/
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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@ -24,8 +23,9 @@
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_encoder_slave.h>
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#include <drm/bridge/dw_hdmi.h>
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#include "imx-hdmi.h"
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#include "dw_hdmi.h"
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#define HDMI_EDID_LEN 512
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@ -101,18 +101,19 @@ struct hdmi_data_info {
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struct hdmi_vmode video_mode;
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};
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struct imx_hdmi {
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struct dw_hdmi {
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struct drm_connector connector;
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struct drm_encoder *encoder;
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struct drm_bridge *bridge;
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enum imx_hdmi_devtype dev_type;
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enum dw_hdmi_devtype dev_type;
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struct device *dev;
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struct clk *isfr_clk;
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struct clk *iahb_clk;
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struct hdmi_data_info hdmi_data;
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const struct imx_hdmi_plat_data *plat_data;
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const struct dw_hdmi_plat_data *plat_data;
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int vic;
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u8 edid[HDMI_EDID_LEN];
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@ -129,17 +130,17 @@ struct imx_hdmi {
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int ratio;
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};
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static inline void hdmi_writeb(struct imx_hdmi *hdmi, u8 val, int offset)
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static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
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{
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writeb(val, hdmi->regs + offset);
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}
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static inline u8 hdmi_readb(struct imx_hdmi *hdmi, int offset)
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static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
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{
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return readb(hdmi->regs + offset);
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}
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static void hdmi_modb(struct imx_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
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static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
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{
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u8 val = hdmi_readb(hdmi, reg) & ~mask;
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@ -147,13 +148,13 @@ static void hdmi_modb(struct imx_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
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hdmi_writeb(hdmi, val, reg);
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}
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static void hdmi_mask_writeb(struct imx_hdmi *hdmi, u8 data, unsigned int reg,
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static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
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u8 shift, u8 mask)
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{
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hdmi_modb(hdmi, data << shift, mask, reg);
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}
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static void hdmi_set_clock_regenerator_n(struct imx_hdmi *hdmi,
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static void hdmi_set_clock_regenerator_n(struct dw_hdmi *hdmi,
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unsigned int value)
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{
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hdmi_writeb(hdmi, value & 0xff, HDMI_AUD_N1);
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@ -164,7 +165,7 @@ static void hdmi_set_clock_regenerator_n(struct imx_hdmi *hdmi,
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hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
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}
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static void hdmi_regenerate_cts(struct imx_hdmi *hdmi, unsigned int cts)
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static void hdmi_regenerate_cts(struct dw_hdmi *hdmi, unsigned int cts)
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{
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/* Must be set/cleared first */
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hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
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@ -311,7 +312,7 @@ static unsigned int hdmi_compute_cts(unsigned int freq, unsigned long pixel_clk,
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return (cts * ratio) / 100;
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}
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static void hdmi_set_clk_regenerator(struct imx_hdmi *hdmi,
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static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi,
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unsigned long pixel_clk)
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{
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unsigned int clk_n, clk_cts;
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@ -335,12 +336,12 @@ static void hdmi_set_clk_regenerator(struct imx_hdmi *hdmi,
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hdmi_regenerate_cts(hdmi, clk_cts);
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}
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static void hdmi_init_clk_regenerator(struct imx_hdmi *hdmi)
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static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi)
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{
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hdmi_set_clk_regenerator(hdmi, 74250000);
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}
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static void hdmi_clk_regenerator_update_pixel_clock(struct imx_hdmi *hdmi)
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static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
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{
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hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock);
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}
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@ -352,7 +353,7 @@ static void hdmi_clk_regenerator_update_pixel_clock(struct imx_hdmi *hdmi)
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* pin{31~24} <==> G[7:0]
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* pin{15~8} <==> B[7:0]
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*/
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static void hdmi_video_sample(struct imx_hdmi *hdmi)
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static void hdmi_video_sample(struct dw_hdmi *hdmi)
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{
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int color_format = 0;
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u8 val;
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@ -408,12 +409,12 @@ static void hdmi_video_sample(struct imx_hdmi *hdmi)
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hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
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}
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static int is_color_space_conversion(struct imx_hdmi *hdmi)
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static int is_color_space_conversion(struct dw_hdmi *hdmi)
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{
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return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format;
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}
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static int is_color_space_decimation(struct imx_hdmi *hdmi)
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static int is_color_space_decimation(struct dw_hdmi *hdmi)
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{
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if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS)
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return 0;
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@ -423,7 +424,7 @@ static int is_color_space_decimation(struct imx_hdmi *hdmi)
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return 0;
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}
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static int is_color_space_interpolation(struct imx_hdmi *hdmi)
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static int is_color_space_interpolation(struct dw_hdmi *hdmi)
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{
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if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS)
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return 0;
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@ -433,7 +434,7 @@ static int is_color_space_interpolation(struct imx_hdmi *hdmi)
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return 0;
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}
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static void imx_hdmi_update_csc_coeffs(struct imx_hdmi *hdmi)
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static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
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{
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const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
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unsigned i;
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@ -474,7 +475,7 @@ static void imx_hdmi_update_csc_coeffs(struct imx_hdmi *hdmi)
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HDMI_CSC_SCALE);
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}
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static void hdmi_video_csc(struct imx_hdmi *hdmi)
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static void hdmi_video_csc(struct dw_hdmi *hdmi)
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{
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int color_depth = 0;
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int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE;
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@ -502,7 +503,7 @@ static void hdmi_video_csc(struct imx_hdmi *hdmi)
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hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
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HDMI_CSC_SCALE);
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imx_hdmi_update_csc_coeffs(hdmi);
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dw_hdmi_update_csc_coeffs(hdmi);
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}
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/*
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@ -510,7 +511,7 @@ static void hdmi_video_csc(struct imx_hdmi *hdmi)
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* for example, if input is YCC422 mode or repeater is used,
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* data should be repacked this module can be bypassed.
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*/
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static void hdmi_video_packetize(struct imx_hdmi *hdmi)
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static void hdmi_video_packetize(struct dw_hdmi *hdmi)
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{
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unsigned int color_depth = 0;
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unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit;
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@ -607,40 +608,40 @@ static void hdmi_video_packetize(struct imx_hdmi *hdmi)
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HDMI_VP_CONF);
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}
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static inline void hdmi_phy_test_clear(struct imx_hdmi *hdmi,
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static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
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unsigned char bit)
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{
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hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
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HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
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}
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static inline void hdmi_phy_test_enable(struct imx_hdmi *hdmi,
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static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi,
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unsigned char bit)
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{
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hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET,
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HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0);
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}
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static inline void hdmi_phy_test_clock(struct imx_hdmi *hdmi,
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static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi,
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unsigned char bit)
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{
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hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET,
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HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0);
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}
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static inline void hdmi_phy_test_din(struct imx_hdmi *hdmi,
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static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi,
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unsigned char bit)
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{
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hdmi_writeb(hdmi, bit, HDMI_PHY_TST1);
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}
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static inline void hdmi_phy_test_dout(struct imx_hdmi *hdmi,
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static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
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unsigned char bit)
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{
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hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
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}
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static bool hdmi_phy_wait_i2c_done(struct imx_hdmi *hdmi, int msec)
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static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
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{
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while ((hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
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if (msec-- == 0)
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@ -650,7 +651,7 @@ static bool hdmi_phy_wait_i2c_done(struct imx_hdmi *hdmi, int msec)
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return true;
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}
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static void __hdmi_phy_i2c_write(struct imx_hdmi *hdmi, unsigned short data,
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static void __hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
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unsigned char addr)
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{
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hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
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@ -664,63 +665,64 @@ static void __hdmi_phy_i2c_write(struct imx_hdmi *hdmi, unsigned short data,
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hdmi_phy_wait_i2c_done(hdmi, 1000);
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}
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static int hdmi_phy_i2c_write(struct imx_hdmi *hdmi, unsigned short data,
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static int hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
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unsigned char addr)
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{
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__hdmi_phy_i2c_write(hdmi, data, addr);
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return 0;
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}
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static void imx_hdmi_phy_enable_power(struct imx_hdmi *hdmi, u8 enable)
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static void dw_hdmi_phy_enable_power(struct dw_hdmi *hdmi, u8 enable)
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{
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hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
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HDMI_PHY_CONF0_PDZ_OFFSET,
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HDMI_PHY_CONF0_PDZ_MASK);
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}
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static void imx_hdmi_phy_enable_tmds(struct imx_hdmi *hdmi, u8 enable)
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static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
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{
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hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
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HDMI_PHY_CONF0_ENTMDS_OFFSET,
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HDMI_PHY_CONF0_ENTMDS_MASK);
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}
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static void imx_hdmi_phy_gen2_pddq(struct imx_hdmi *hdmi, u8 enable)
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static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
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{
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hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
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HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET,
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HDMI_PHY_CONF0_GEN2_PDDQ_MASK);
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}
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static void imx_hdmi_phy_gen2_txpwron(struct imx_hdmi *hdmi, u8 enable)
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static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
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{
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hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
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HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET,
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HDMI_PHY_CONF0_GEN2_TXPWRON_MASK);
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}
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static void imx_hdmi_phy_sel_data_en_pol(struct imx_hdmi *hdmi, u8 enable)
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static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
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{
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hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
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HDMI_PHY_CONF0_SELDATAENPOL_OFFSET,
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HDMI_PHY_CONF0_SELDATAENPOL_MASK);
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}
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static void imx_hdmi_phy_sel_interface_control(struct imx_hdmi *hdmi, u8 enable)
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static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
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{
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hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
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HDMI_PHY_CONF0_SELDIPIF_OFFSET,
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HDMI_PHY_CONF0_SELDIPIF_MASK);
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}
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static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep,
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static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep,
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unsigned char res, int cscon)
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{
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unsigned res_idx, i;
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u8 val, msec;
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const struct mpll_config *mpll_config = hdmi->plat_data->mpll_cfg;
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const struct curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
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const struct sym_term *sym_term = hdmi->plat_data->sym_term;
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const struct dw_hdmi_mpll_config *mpll_config =
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hdmi->plat_data->mpll_cfg;
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const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr;
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const struct dw_hdmi_sym_term *sym_term = hdmi->plat_data->sym_term;
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if (prep)
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return -EINVAL;
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@ -728,13 +730,13 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep,
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switch (res) {
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case 0: /* color resolution 0 is 8 bit colour depth */
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case 8:
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res_idx = RES_8;
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res_idx = DW_HDMI_RES_8;
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break;
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case 10:
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res_idx = RES_10;
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res_idx = DW_HDMI_RES_10;
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break;
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case 12:
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res_idx = RES_12;
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res_idx = DW_HDMI_RES_12;
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break;
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default:
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return -EINVAL;
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@ -749,10 +751,10 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep,
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hdmi_writeb(hdmi, val, HDMI_MC_FLOWCTRL);
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/* gen2 tx power off */
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imx_hdmi_phy_gen2_txpwron(hdmi, 0);
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dw_hdmi_phy_gen2_txpwron(hdmi, 0);
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/* gen2 pddq */
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imx_hdmi_phy_gen2_pddq(hdmi, 1);
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dw_hdmi_phy_gen2_pddq(hdmi, 1);
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/* PHY reset */
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hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ);
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@ -806,15 +808,15 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep,
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/* REMOVE CLK TERM */
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hdmi_phy_i2c_write(hdmi, 0x8000, 0x05); /* CKCALCTRL */
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imx_hdmi_phy_enable_power(hdmi, 1);
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dw_hdmi_phy_enable_power(hdmi, 1);
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/* toggle TMDS enable */
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imx_hdmi_phy_enable_tmds(hdmi, 0);
|
||||
imx_hdmi_phy_enable_tmds(hdmi, 1);
|
||||
dw_hdmi_phy_enable_tmds(hdmi, 0);
|
||||
dw_hdmi_phy_enable_tmds(hdmi, 1);
|
||||
|
||||
/* gen2 tx power on */
|
||||
imx_hdmi_phy_gen2_txpwron(hdmi, 1);
|
||||
imx_hdmi_phy_gen2_pddq(hdmi, 0);
|
||||
dw_hdmi_phy_gen2_txpwron(hdmi, 1);
|
||||
dw_hdmi_phy_gen2_pddq(hdmi, 0);
|
||||
|
||||
/*Wait for PHY PLL lock */
|
||||
msec = 5;
|
||||
|
|
@ -835,7 +837,7 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int imx_hdmi_phy_init(struct imx_hdmi *hdmi)
|
||||
static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
|
||||
{
|
||||
int i, ret;
|
||||
bool cscon = false;
|
||||
|
|
@ -846,10 +848,10 @@ static int imx_hdmi_phy_init(struct imx_hdmi *hdmi)
|
|||
|
||||
/* HDMI Phy spec says to do the phy initialization sequence twice */
|
||||
for (i = 0; i < 2; i++) {
|
||||
imx_hdmi_phy_sel_data_en_pol(hdmi, 1);
|
||||
imx_hdmi_phy_sel_interface_control(hdmi, 0);
|
||||
imx_hdmi_phy_enable_tmds(hdmi, 0);
|
||||
imx_hdmi_phy_enable_power(hdmi, 0);
|
||||
dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
|
||||
dw_hdmi_phy_sel_interface_control(hdmi, 0);
|
||||
dw_hdmi_phy_enable_tmds(hdmi, 0);
|
||||
dw_hdmi_phy_enable_power(hdmi, 0);
|
||||
|
||||
/* Enable CSC */
|
||||
ret = hdmi_phy_configure(hdmi, 0, 8, cscon);
|
||||
|
|
@ -861,7 +863,7 @@ static int imx_hdmi_phy_init(struct imx_hdmi *hdmi)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void hdmi_tx_hdcp_config(struct imx_hdmi *hdmi)
|
||||
static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi)
|
||||
{
|
||||
u8 de;
|
||||
|
||||
|
|
@ -880,7 +882,7 @@ static void hdmi_tx_hdcp_config(struct imx_hdmi *hdmi)
|
|||
HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1);
|
||||
}
|
||||
|
||||
static void hdmi_config_AVI(struct imx_hdmi *hdmi)
|
||||
static void hdmi_config_AVI(struct dw_hdmi *hdmi)
|
||||
{
|
||||
u8 val, pix_fmt, under_scan;
|
||||
u8 act_ratio, coded_ratio, colorimetry, ext_colorimetry;
|
||||
|
|
@ -974,7 +976,7 @@ static void hdmi_config_AVI(struct imx_hdmi *hdmi)
|
|||
hdmi_writeb(hdmi, 0, HDMI_FC_AVISRB1);
|
||||
}
|
||||
|
||||
static void hdmi_av_composer(struct imx_hdmi *hdmi,
|
||||
static void hdmi_av_composer(struct dw_hdmi *hdmi,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
u8 inv_val;
|
||||
|
|
@ -1058,19 +1060,19 @@ static void hdmi_av_composer(struct imx_hdmi *hdmi,
|
|||
hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
|
||||
}
|
||||
|
||||
static void imx_hdmi_phy_disable(struct imx_hdmi *hdmi)
|
||||
static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi)
|
||||
{
|
||||
if (!hdmi->phy_enabled)
|
||||
return;
|
||||
|
||||
imx_hdmi_phy_enable_tmds(hdmi, 0);
|
||||
imx_hdmi_phy_enable_power(hdmi, 0);
|
||||
dw_hdmi_phy_enable_tmds(hdmi, 0);
|
||||
dw_hdmi_phy_enable_power(hdmi, 0);
|
||||
|
||||
hdmi->phy_enabled = false;
|
||||
}
|
||||
|
||||
/* HDMI Initialization Step B.4 */
|
||||
static void imx_hdmi_enable_video_path(struct imx_hdmi *hdmi)
|
||||
static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
|
||||
{
|
||||
u8 clkdis;
|
||||
|
||||
|
|
@ -1099,13 +1101,13 @@ static void imx_hdmi_enable_video_path(struct imx_hdmi *hdmi)
|
|||
}
|
||||
}
|
||||
|
||||
static void hdmi_enable_audio_clk(struct imx_hdmi *hdmi)
|
||||
static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
|
||||
{
|
||||
hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS);
|
||||
}
|
||||
|
||||
/* Workaround to clear the overflow condition */
|
||||
static void imx_hdmi_clear_overflow(struct imx_hdmi *hdmi)
|
||||
static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
|
||||
{
|
||||
int count;
|
||||
u8 val;
|
||||
|
|
@ -1123,19 +1125,19 @@ static void imx_hdmi_clear_overflow(struct imx_hdmi *hdmi)
|
|||
hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
|
||||
}
|
||||
|
||||
static void hdmi_enable_overflow_interrupts(struct imx_hdmi *hdmi)
|
||||
static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
|
||||
{
|
||||
hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
|
||||
hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
|
||||
}
|
||||
|
||||
static void hdmi_disable_overflow_interrupts(struct imx_hdmi *hdmi)
|
||||
static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
|
||||
{
|
||||
hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
|
||||
HDMI_IH_MUTE_FC_STAT2);
|
||||
}
|
||||
|
||||
static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode)
|
||||
static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -1187,12 +1189,12 @@ static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode)
|
|||
hdmi_av_composer(hdmi, mode);
|
||||
|
||||
/* HDMI Initializateion Step B.2 */
|
||||
ret = imx_hdmi_phy_init(hdmi);
|
||||
ret = dw_hdmi_phy_init(hdmi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* HDMI Initialization Step B.3 */
|
||||
imx_hdmi_enable_video_path(hdmi);
|
||||
dw_hdmi_enable_video_path(hdmi);
|
||||
|
||||
/* not for DVI mode */
|
||||
if (hdmi->hdmi_data.video_mode.mdvi) {
|
||||
|
|
@ -1213,7 +1215,7 @@ static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode)
|
|||
hdmi_video_sample(hdmi);
|
||||
hdmi_tx_hdcp_config(hdmi);
|
||||
|
||||
imx_hdmi_clear_overflow(hdmi);
|
||||
dw_hdmi_clear_overflow(hdmi);
|
||||
if (hdmi->cable_plugin && !hdmi->hdmi_data.video_mode.mdvi)
|
||||
hdmi_enable_overflow_interrupts(hdmi);
|
||||
|
||||
|
|
@ -1221,7 +1223,7 @@ static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode)
|
|||
}
|
||||
|
||||
/* Wait until we are registered to enable interrupts */
|
||||
static int imx_hdmi_fb_registered(struct imx_hdmi *hdmi)
|
||||
static int dw_hdmi_fb_registered(struct dw_hdmi *hdmi)
|
||||
{
|
||||
hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL,
|
||||
HDMI_PHY_I2CM_INT_ADDR);
|
||||
|
|
@ -1239,7 +1241,7 @@ static int imx_hdmi_fb_registered(struct imx_hdmi *hdmi)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void initialize_hdmi_ih_mutes(struct imx_hdmi *hdmi)
|
||||
static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi)
|
||||
{
|
||||
u8 ih_mute;
|
||||
|
||||
|
|
@ -1291,73 +1293,73 @@ static void initialize_hdmi_ih_mutes(struct imx_hdmi *hdmi)
|
|||
hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE);
|
||||
}
|
||||
|
||||
static void imx_hdmi_poweron(struct imx_hdmi *hdmi)
|
||||
static void dw_hdmi_poweron(struct dw_hdmi *hdmi)
|
||||
{
|
||||
imx_hdmi_setup(hdmi, &hdmi->previous_mode);
|
||||
dw_hdmi_setup(hdmi, &hdmi->previous_mode);
|
||||
}
|
||||
|
||||
static void imx_hdmi_poweroff(struct imx_hdmi *hdmi)
|
||||
static void dw_hdmi_poweroff(struct dw_hdmi *hdmi)
|
||||
{
|
||||
imx_hdmi_phy_disable(hdmi);
|
||||
dw_hdmi_phy_disable(hdmi);
|
||||
}
|
||||
|
||||
static void imx_hdmi_bridge_mode_set(struct drm_bridge *bridge,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct imx_hdmi *hdmi = bridge->driver_private;
|
||||
struct dw_hdmi *hdmi = bridge->driver_private;
|
||||
|
||||
imx_hdmi_setup(hdmi, mode);
|
||||
dw_hdmi_setup(hdmi, mode);
|
||||
|
||||
/* Store the display mode for plugin/DKMS poweron events */
|
||||
memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
|
||||
}
|
||||
|
||||
static bool imx_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
|
||||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
static bool dw_hdmi_bridge_mode_fixup(struct drm_bridge *bridge,
|
||||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
static void imx_hdmi_bridge_disable(struct drm_bridge *bridge)
|
||||
static void dw_hdmi_bridge_disable(struct drm_bridge *bridge)
|
||||
{
|
||||
struct imx_hdmi *hdmi = bridge->driver_private;
|
||||
struct dw_hdmi *hdmi = bridge->driver_private;
|
||||
|
||||
imx_hdmi_poweroff(hdmi);
|
||||
dw_hdmi_poweroff(hdmi);
|
||||
}
|
||||
|
||||
static void imx_hdmi_bridge_enable(struct drm_bridge *bridge)
|
||||
static void dw_hdmi_bridge_enable(struct drm_bridge *bridge)
|
||||
{
|
||||
struct imx_hdmi *hdmi = bridge->driver_private;
|
||||
struct dw_hdmi *hdmi = bridge->driver_private;
|
||||
|
||||
imx_hdmi_poweron(hdmi);
|
||||
dw_hdmi_poweron(hdmi);
|
||||
}
|
||||
|
||||
static void imx_hdmi_bridge_destroy(struct drm_bridge *bridge)
|
||||
static void dw_hdmi_bridge_destroy(struct drm_bridge *bridge)
|
||||
{
|
||||
drm_bridge_cleanup(bridge);
|
||||
kfree(bridge);
|
||||
}
|
||||
|
||||
static void imx_hdmi_bridge_nop(struct drm_bridge *bridge)
|
||||
static void dw_hdmi_bridge_nop(struct drm_bridge *bridge)
|
||||
{
|
||||
/* do nothing */
|
||||
}
|
||||
|
||||
static enum drm_connector_status imx_hdmi_connector_detect(struct drm_connector
|
||||
*connector, bool force)
|
||||
static enum drm_connector_status
|
||||
dw_hdmi_connector_detect(struct drm_connector *connector, bool force)
|
||||
{
|
||||
struct imx_hdmi *hdmi = container_of(connector, struct imx_hdmi,
|
||||
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
|
||||
connector);
|
||||
|
||||
return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
|
||||
connector_status_connected : connector_status_disconnected;
|
||||
}
|
||||
|
||||
static int imx_hdmi_connector_get_modes(struct drm_connector *connector)
|
||||
static int dw_hdmi_connector_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct imx_hdmi *hdmi = container_of(connector, struct imx_hdmi,
|
||||
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
|
||||
connector);
|
||||
struct edid *edid;
|
||||
int ret;
|
||||
|
|
@ -1380,46 +1382,46 @@ static int imx_hdmi_connector_get_modes(struct drm_connector *connector)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct drm_encoder *imx_hdmi_connector_best_encoder(struct drm_connector
|
||||
static struct drm_encoder *dw_hdmi_connector_best_encoder(struct drm_connector
|
||||
*connector)
|
||||
{
|
||||
struct imx_hdmi *hdmi = container_of(connector, struct imx_hdmi,
|
||||
struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi,
|
||||
connector);
|
||||
|
||||
return hdmi->encoder;
|
||||
}
|
||||
|
||||
static void imx_hdmi_connector_destroy(struct drm_connector *connector)
|
||||
static void dw_hdmi_connector_destroy(struct drm_connector *connector)
|
||||
{
|
||||
drm_connector_unregister(connector);
|
||||
drm_connector_cleanup(connector);
|
||||
}
|
||||
|
||||
static struct drm_connector_funcs imx_hdmi_connector_funcs = {
|
||||
static struct drm_connector_funcs dw_hdmi_connector_funcs = {
|
||||
.dpms = drm_helper_connector_dpms,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
.detect = imx_hdmi_connector_detect,
|
||||
.destroy = imx_hdmi_connector_destroy,
|
||||
.detect = dw_hdmi_connector_detect,
|
||||
.destroy = dw_hdmi_connector_destroy,
|
||||
};
|
||||
|
||||
static struct drm_connector_helper_funcs imx_hdmi_connector_helper_funcs = {
|
||||
.get_modes = imx_hdmi_connector_get_modes,
|
||||
.best_encoder = imx_hdmi_connector_best_encoder,
|
||||
static struct drm_connector_helper_funcs dw_hdmi_connector_helper_funcs = {
|
||||
.get_modes = dw_hdmi_connector_get_modes,
|
||||
.best_encoder = dw_hdmi_connector_best_encoder,
|
||||
};
|
||||
|
||||
struct drm_bridge_funcs imx_hdmi_bridge_funcs = {
|
||||
.enable = imx_hdmi_bridge_enable,
|
||||
.disable = imx_hdmi_bridge_disable,
|
||||
.pre_enable = imx_hdmi_bridge_nop,
|
||||
.post_disable = imx_hdmi_bridge_nop,
|
||||
.mode_set = imx_hdmi_bridge_mode_set,
|
||||
.mode_fixup = imx_hdmi_bridge_mode_fixup,
|
||||
.destroy = imx_hdmi_bridge_destroy,
|
||||
struct drm_bridge_funcs dw_hdmi_bridge_funcs = {
|
||||
.enable = dw_hdmi_bridge_enable,
|
||||
.disable = dw_hdmi_bridge_disable,
|
||||
.pre_enable = dw_hdmi_bridge_nop,
|
||||
.post_disable = dw_hdmi_bridge_nop,
|
||||
.mode_set = dw_hdmi_bridge_mode_set,
|
||||
.mode_fixup = dw_hdmi_bridge_mode_fixup,
|
||||
.destroy = dw_hdmi_bridge_destroy,
|
||||
};
|
||||
|
||||
static irqreturn_t imx_hdmi_hardirq(int irq, void *dev_id)
|
||||
static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
|
||||
{
|
||||
struct imx_hdmi *hdmi = dev_id;
|
||||
struct dw_hdmi *hdmi = dev_id;
|
||||
u8 intr_stat;
|
||||
|
||||
intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0);
|
||||
|
|
@ -1429,9 +1431,9 @@ static irqreturn_t imx_hdmi_hardirq(int irq, void *dev_id)
|
|||
return intr_stat ? IRQ_WAKE_THREAD : IRQ_NONE;
|
||||
}
|
||||
|
||||
static irqreturn_t imx_hdmi_irq(int irq, void *dev_id)
|
||||
static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
|
||||
{
|
||||
struct imx_hdmi *hdmi = dev_id;
|
||||
struct dw_hdmi *hdmi = dev_id;
|
||||
u8 intr_stat;
|
||||
u8 phy_int_pol;
|
||||
|
||||
|
|
@ -1445,14 +1447,14 @@ static irqreturn_t imx_hdmi_irq(int irq, void *dev_id)
|
|||
|
||||
hdmi_modb(hdmi, 0, HDMI_PHY_HPD, HDMI_PHY_POL0);
|
||||
|
||||
imx_hdmi_poweron(hdmi);
|
||||
dw_hdmi_poweron(hdmi);
|
||||
} else {
|
||||
dev_dbg(hdmi->dev, "EVENT=plugout\n");
|
||||
|
||||
hdmi_modb(hdmi, HDMI_PHY_HPD, HDMI_PHY_HPD,
|
||||
HDMI_PHY_POL0);
|
||||
|
||||
imx_hdmi_poweroff(hdmi);
|
||||
dw_hdmi_poweroff(hdmi);
|
||||
}
|
||||
drm_helper_hpd_irq_event(hdmi->connector.dev);
|
||||
}
|
||||
|
|
@ -1463,7 +1465,7 @@ static irqreturn_t imx_hdmi_irq(int irq, void *dev_id)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi)
|
||||
static int dw_hdmi_register(struct drm_device *drm, struct dw_hdmi *hdmi)
|
||||
{
|
||||
struct drm_encoder *encoder = hdmi->encoder;
|
||||
struct drm_bridge *bridge;
|
||||
|
|
@ -1478,7 +1480,7 @@ static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi)
|
|||
hdmi->bridge = bridge;
|
||||
bridge->driver_private = hdmi;
|
||||
|
||||
ret = drm_bridge_init(drm, bridge, &imx_hdmi_bridge_funcs);
|
||||
ret = drm_bridge_init(drm, bridge, &dw_hdmi_bridge_funcs);
|
||||
if (ret) {
|
||||
DRM_ERROR("Failed to initialize bridge with drm\n");
|
||||
return -EINVAL;
|
||||
|
|
@ -1488,8 +1490,8 @@ static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi)
|
|||
hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
|
||||
|
||||
drm_connector_helper_add(&hdmi->connector,
|
||||
&imx_hdmi_connector_helper_funcs);
|
||||
drm_connector_init(drm, &hdmi->connector, &imx_hdmi_connector_funcs,
|
||||
&dw_hdmi_connector_helper_funcs);
|
||||
drm_connector_init(drm, &hdmi->connector, &dw_hdmi_connector_funcs,
|
||||
DRM_MODE_CONNECTOR_HDMIA);
|
||||
|
||||
hdmi->connector.encoder = encoder;
|
||||
|
|
@ -1499,7 +1501,7 @@ static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int imx_hdmi_bind(struct device *dev, struct device *master,
|
||||
int dw_hdmi_bind(struct device *dev, struct device *master,
|
||||
void *data, struct drm_encoder *encoder,
|
||||
struct resource *iores, int irq,
|
||||
const struct dw_hdmi_plat_data *plat_data)
|
||||
|
|
@ -1507,7 +1509,7 @@ int imx_hdmi_bind(struct device *dev, struct device *master,
|
|||
struct drm_device *drm = data;
|
||||
struct device_node *np = dev->of_node;
|
||||
struct device_node *ddc_node;
|
||||
struct imx_hdmi *hdmi;
|
||||
struct dw_hdmi *hdmi;
|
||||
int ret;
|
||||
|
||||
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
|
||||
|
|
@ -1534,8 +1536,8 @@ int imx_hdmi_bind(struct device *dev, struct device *master,
|
|||
dev_dbg(hdmi->dev, "no ddc property found\n");
|
||||
}
|
||||
|
||||
ret = devm_request_threaded_irq(dev, irq, imx_hdmi_hardirq,
|
||||
imx_hdmi_irq, IRQF_SHARED,
|
||||
ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
|
||||
dw_hdmi_irq, IRQF_SHARED,
|
||||
dev_name(dev), hdmi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -1595,11 +1597,11 @@ int imx_hdmi_bind(struct device *dev, struct device *master,
|
|||
/* Clear Hotplug interrupts */
|
||||
hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0);
|
||||
|
||||
ret = imx_hdmi_fb_registered(hdmi);
|
||||
ret = dw_hdmi_fb_registered(hdmi);
|
||||
if (ret)
|
||||
goto err_iahb;
|
||||
|
||||
ret = imx_hdmi_register(drm, hdmi);
|
||||
ret = dw_hdmi_register(drm, hdmi);
|
||||
if (ret)
|
||||
goto err_iahb;
|
||||
|
||||
|
|
@ -1617,11 +1619,11 @@ err_isfr:
|
|||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(imx_hdmi_bind);
|
||||
EXPORT_SYMBOL_GPL(dw_hdmi_bind);
|
||||
|
||||
void imx_hdmi_unbind(struct device *dev, struct device *master, void *data)
|
||||
void dw_hdmi_unbind(struct device *dev, struct device *master, void *data)
|
||||
{
|
||||
struct imx_hdmi *hdmi = dev_get_drvdata(dev);
|
||||
struct dw_hdmi *hdmi = dev_get_drvdata(dev);
|
||||
|
||||
/* Disable all interrupts */
|
||||
hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0);
|
||||
|
|
@ -1633,11 +1635,11 @@ void imx_hdmi_unbind(struct device *dev, struct device *master, void *data)
|
|||
clk_disable_unprepare(hdmi->isfr_clk);
|
||||
i2c_put_adapter(hdmi->ddc);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(imx_hdmi_unbind);
|
||||
EXPORT_SYMBOL_GPL(dw_hdmi_unbind);
|
||||
|
||||
MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
|
||||
MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
|
||||
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
|
||||
MODULE_DESCRIPTION("i.MX6 HDMI transmitter driver");
|
||||
MODULE_DESCRIPTION("DW HDMI transmitter driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:imx-hdmi");
|
||||
MODULE_ALIAS("platform:dw-hdmi");
|
||||
|
|
@ -1030,47 +1030,4 @@ enum {
|
|||
HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
|
||||
};
|
||||
|
||||
enum imx_hdmi_devtype {
|
||||
IMX6Q_HDMI,
|
||||
IMX6DL_HDMI,
|
||||
};
|
||||
|
||||
struct imx_hdmi_plat_data {
|
||||
enum imx_hdmi_devtype dev_type;
|
||||
const struct mpll_config *mpll_cfg;
|
||||
const struct curr_ctrl *cur_ctr;
|
||||
const struct sym_term *sym_term;
|
||||
};
|
||||
|
||||
enum {
|
||||
RES_8,
|
||||
RES_10,
|
||||
RES_12,
|
||||
RES_MAX,
|
||||
};
|
||||
|
||||
struct mpll_config {
|
||||
unsigned long mpixelclock;
|
||||
struct {
|
||||
u16 cpce;
|
||||
u16 gmp;
|
||||
} res[RES_MAX];
|
||||
};
|
||||
|
||||
struct curr_ctrl {
|
||||
unsigned long mpixelclock;
|
||||
u16 curr[RES_MAX];
|
||||
};
|
||||
|
||||
struct sym_term {
|
||||
unsigned long mpixelclock;
|
||||
u16 sym_ctr; /*clock symbol and transmitter control*/
|
||||
u16 term; /*transmission termination value*/
|
||||
};
|
||||
|
||||
int imx_hdmi_bind(struct device *dev, struct device *master,
|
||||
void *data, struct drm_encoder *encoder,
|
||||
struct resource *iores, int irq,
|
||||
const struct imx_hdmi_plat_data *plat_data);
|
||||
void imx_hdmi_unbind(struct device *dev, struct device *master, void *data);
|
||||
#endif /* __IMX_HDMI_H__ */
|
||||
|
|
@ -49,6 +49,7 @@ config DRM_IMX_IPUV3
|
|||
|
||||
config DRM_IMX_HDMI
|
||||
tristate "Freescale i.MX DRM HDMI"
|
||||
select DRM_DW_HDMI
|
||||
depends on DRM_IMX
|
||||
help
|
||||
Choose this if you want to use HDMI on i.MX6.
|
||||
|
|
|
|||
|
|
@ -9,4 +9,4 @@ obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o
|
|||
|
||||
imx-ipuv3-crtc-objs := ipuv3-crtc.o ipuv3-plane.o
|
||||
obj-$(CONFIG_DRM_IMX_IPUV3) += imx-ipuv3-crtc.o
|
||||
obj-$(CONFIG_DRM_IMX_HDMI) += imx-hdmi.o imx-hdmi_pltfm.o
|
||||
obj-$(CONFIG_DRM_IMX_HDMI) += dw_hdmi-imx.o
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* derived from imx-hdmi.c
|
||||
* derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
|
@ -11,6 +11,7 @@
|
|||
#include <linux/component.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
|
||||
#include <drm/bridge/dw_hdmi.h>
|
||||
#include <video/imx-ipu-v3.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <drm/drm_of.h>
|
||||
|
|
@ -20,15 +21,14 @@
|
|||
#include <drm/drm_encoder_slave.h>
|
||||
|
||||
#include "imx-drm.h"
|
||||
#include "imx-hdmi.h"
|
||||
|
||||
struct imx_hdmi_priv {
|
||||
struct imx_hdmi {
|
||||
struct device *dev;
|
||||
struct drm_encoder encoder;
|
||||
struct regmap *regmap;
|
||||
};
|
||||
|
||||
static const struct mpll_config imx_mpll_cfg[] = {
|
||||
static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
|
||||
{
|
||||
45250000, {
|
||||
{ 0x01e0, 0x0000 },
|
||||
|
|
@ -56,7 +56,7 @@ static const struct mpll_config imx_mpll_cfg[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static const struct curr_ctrl imx_cur_ctr[] = {
|
||||
static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
|
||||
/* pixelclk bpp8 bpp10 bpp12 */
|
||||
{
|
||||
54000000, { 0x091c, 0x091c, 0x06dc },
|
||||
|
|
@ -73,13 +73,13 @@ static const struct curr_ctrl imx_cur_ctr[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static const struct sym_term imx_sym_term[] = {
|
||||
static const struct dw_hdmi_sym_term imx_sym_term[] = {
|
||||
/*pixelclk symbol term*/
|
||||
{ 148500000, 0x800d, 0x0005 },
|
||||
{ ~0UL, 0x0000, 0x0000 }
|
||||
};
|
||||
|
||||
static int imx_hdmi_parse_dt(struct imx_hdmi_priv *hdmi)
|
||||
static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
|
||||
{
|
||||
struct device_node *np = hdmi->dev->of_node;
|
||||
|
||||
|
|
@ -92,28 +92,26 @@ static int imx_hdmi_parse_dt(struct imx_hdmi_priv *hdmi)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void imx_hdmi_encoder_disable(struct drm_encoder *encoder)
|
||||
static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
|
||||
{
|
||||
}
|
||||
|
||||
static bool imx_hdmi_encoder_mode_fixup(struct drm_encoder *encoder,
|
||||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adj_mode)
|
||||
static bool dw_hdmi_imx_encoder_mode_fixup(struct drm_encoder *encoder,
|
||||
const struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adj_mode)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
static void imx_hdmi_encoder_mode_set(struct drm_encoder *encoder,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adj_mode)
|
||||
static void dw_hdmi_imx_encoder_mode_set(struct drm_encoder *encoder,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adj_mode)
|
||||
{
|
||||
}
|
||||
|
||||
static void imx_hdmi_encoder_commit(struct drm_encoder *encoder)
|
||||
static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder)
|
||||
{
|
||||
struct imx_hdmi_priv *hdmi = container_of(encoder,
|
||||
struct imx_hdmi_priv,
|
||||
encoder);
|
||||
struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder);
|
||||
int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder);
|
||||
|
||||
regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
|
||||
|
|
@ -121,38 +119,38 @@ static void imx_hdmi_encoder_commit(struct drm_encoder *encoder)
|
|||
mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
|
||||
}
|
||||
|
||||
static void imx_hdmi_encoder_prepare(struct drm_encoder *encoder)
|
||||
static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder)
|
||||
{
|
||||
imx_drm_panel_format(encoder, V4L2_PIX_FMT_RGB24);
|
||||
}
|
||||
|
||||
static struct drm_encoder_helper_funcs imx_hdmi_encoder_helper_funcs = {
|
||||
.mode_fixup = imx_hdmi_encoder_mode_fixup,
|
||||
.mode_set = imx_hdmi_encoder_mode_set,
|
||||
.prepare = imx_hdmi_encoder_prepare,
|
||||
.commit = imx_hdmi_encoder_commit,
|
||||
.disable = imx_hdmi_encoder_disable,
|
||||
static struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
|
||||
.mode_fixup = dw_hdmi_imx_encoder_mode_fixup,
|
||||
.mode_set = dw_hdmi_imx_encoder_mode_set,
|
||||
.prepare = dw_hdmi_imx_encoder_prepare,
|
||||
.commit = dw_hdmi_imx_encoder_commit,
|
||||
.disable = dw_hdmi_imx_encoder_disable,
|
||||
};
|
||||
|
||||
static struct drm_encoder_funcs imx_hdmi_encoder_funcs = {
|
||||
static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
|
||||
.destroy = drm_encoder_cleanup,
|
||||
};
|
||||
|
||||
static struct imx_hdmi_plat_data imx6q_hdmi_drv_data = {
|
||||
static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
|
||||
.mpll_cfg = imx_mpll_cfg,
|
||||
.cur_ctr = imx_cur_ctr,
|
||||
.sym_term = imx_sym_term,
|
||||
.dev_type = IMX6Q_HDMI,
|
||||
};
|
||||
|
||||
static struct imx_hdmi_plat_data imx6dl_hdmi_drv_data = {
|
||||
static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
|
||||
.mpll_cfg = imx_mpll_cfg,
|
||||
.cur_ctr = imx_cur_ctr,
|
||||
.sym_term = imx_sym_term,
|
||||
.dev_type = IMX6DL_HDMI,
|
||||
};
|
||||
|
||||
static const struct of_device_id imx_hdmi_dt_ids[] = {
|
||||
static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
|
||||
{ .compatible = "fsl,imx6q-hdmi",
|
||||
.data = &imx6q_hdmi_drv_data
|
||||
}, {
|
||||
|
|
@ -161,17 +159,17 @@ static const struct of_device_id imx_hdmi_dt_ids[] = {
|
|||
},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, imx_hdmi_dt_ids);
|
||||
MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
|
||||
|
||||
static int imx_hdmi_pltfm_bind(struct device *dev, struct device *master,
|
||||
void *data)
|
||||
static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
|
||||
void *data)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
const struct imx_hdmi_plat_data *plat_data;
|
||||
const struct dw_hdmi_plat_data *plat_data;
|
||||
const struct of_device_id *match;
|
||||
struct drm_device *drm = data;
|
||||
struct drm_encoder *encoder;
|
||||
struct imx_hdmi_priv *hdmi;
|
||||
struct imx_hdmi *hdmi;
|
||||
struct resource *iores;
|
||||
int irq;
|
||||
int ret;
|
||||
|
|
@ -183,7 +181,7 @@ static int imx_hdmi_pltfm_bind(struct device *dev, struct device *master,
|
|||
if (!hdmi)
|
||||
return -ENOMEM;
|
||||
|
||||
match = of_match_node(imx_hdmi_dt_ids, pdev->dev.of_node);
|
||||
match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
|
||||
plat_data = match->data;
|
||||
hdmi->dev = &pdev->dev;
|
||||
encoder = &hdmi->encoder;
|
||||
|
|
@ -208,53 +206,53 @@ static int imx_hdmi_pltfm_bind(struct device *dev, struct device *master,
|
|||
if (encoder->possible_crtcs == 0)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
ret = imx_hdmi_parse_dt(hdmi);
|
||||
ret = dw_hdmi_imx_parse_dt(hdmi);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
drm_encoder_helper_add(encoder, &imx_hdmi_encoder_helper_funcs);
|
||||
drm_encoder_init(drm, encoder, &imx_hdmi_encoder_funcs,
|
||||
drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
|
||||
drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs,
|
||||
DRM_MODE_ENCODER_TMDS);
|
||||
|
||||
return imx_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
|
||||
return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data);
|
||||
}
|
||||
|
||||
static void imx_hdmi_pltfm_unbind(struct device *dev, struct device *master,
|
||||
void *data)
|
||||
static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
|
||||
void *data)
|
||||
{
|
||||
return imx_hdmi_unbind(dev, master, data);
|
||||
return dw_hdmi_unbind(dev, master, data);
|
||||
}
|
||||
|
||||
static const struct component_ops imx_hdmi_ops = {
|
||||
.bind = imx_hdmi_pltfm_bind,
|
||||
.unbind = imx_hdmi_pltfm_unbind,
|
||||
static const struct component_ops dw_hdmi_imx_ops = {
|
||||
.bind = dw_hdmi_imx_bind,
|
||||
.unbind = dw_hdmi_imx_unbind,
|
||||
};
|
||||
|
||||
static int imx_hdmi_probe(struct platform_device *pdev)
|
||||
static int dw_hdmi_imx_probe(struct platform_device *pdev)
|
||||
{
|
||||
return component_add(&pdev->dev, &imx_hdmi_ops);
|
||||
return component_add(&pdev->dev, &dw_hdmi_imx_ops);
|
||||
}
|
||||
|
||||
static int imx_hdmi_remove(struct platform_device *pdev)
|
||||
static int dw_hdmi_imx_remove(struct platform_device *pdev)
|
||||
{
|
||||
component_del(&pdev->dev, &imx_hdmi_ops);
|
||||
component_del(&pdev->dev, &dw_hdmi_imx_ops);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver imx_hdmi_pltfm_driver = {
|
||||
.probe = imx_hdmi_probe,
|
||||
.remove = imx_hdmi_remove,
|
||||
static struct platform_driver dw_hdmi_imx_platform_driver = {
|
||||
.probe = dw_hdmi_imx_probe,
|
||||
.remove = dw_hdmi_imx_remove,
|
||||
.driver = {
|
||||
.name = "hdmi-imx",
|
||||
.of_match_table = imx_hdmi_dt_ids,
|
||||
.name = "dwhdmi-imx",
|
||||
.of_match_table = dw_hdmi_imx_dt_ids,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(imx_hdmi_pltfm_driver);
|
||||
module_platform_driver(dw_hdmi_imx_platform_driver);
|
||||
|
||||
MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
|
||||
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
|
||||
MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:hdmi-imx");
|
||||
MODULE_ALIAS("platform:dwhdmi-imx");
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef __DW_HDMI__
|
||||
#define __DW_HDMI__
|
||||
|
||||
#include <drm/drmP.h>
|
||||
|
||||
enum {
|
||||
DW_HDMI_RES_8,
|
||||
DW_HDMI_RES_10,
|
||||
DW_HDMI_RES_12,
|
||||
DW_HDMI_RES_MAX,
|
||||
};
|
||||
|
||||
enum dw_hdmi_devtype {
|
||||
IMX6Q_HDMI,
|
||||
IMX6DL_HDMI,
|
||||
};
|
||||
|
||||
struct dw_hdmi_mpll_config {
|
||||
unsigned long mpixelclock;
|
||||
struct {
|
||||
u16 cpce;
|
||||
u16 gmp;
|
||||
} res[DW_HDMI_RES_MAX];
|
||||
};
|
||||
|
||||
struct dw_hdmi_curr_ctrl {
|
||||
unsigned long mpixelclock;
|
||||
u16 curr[DW_HDMI_RES_MAX];
|
||||
};
|
||||
|
||||
struct dw_hdmi_sym_term {
|
||||
unsigned long mpixelclock;
|
||||
u16 sym_ctr; /*clock symbol and transmitter control*/
|
||||
u16 term; /*transmission termination value*/
|
||||
};
|
||||
|
||||
struct dw_hdmi_plat_data {
|
||||
enum dw_hdmi_devtype dev_type;
|
||||
const struct dw_hdmi_mpll_config *mpll_cfg;
|
||||
const struct dw_hdmi_curr_ctrl *cur_ctr;
|
||||
const struct dw_hdmi_sym_term *sym_term;
|
||||
enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode);
|
||||
};
|
||||
|
||||
void dw_hdmi_unbind(struct device *dev, struct device *master, void *data);
|
||||
int dw_hdmi_bind(struct device *dev, struct device *master,
|
||||
void *data, struct drm_encoder *encoder,
|
||||
struct resource *iores, int irq,
|
||||
const struct dw_hdmi_plat_data *plat_data);
|
||||
#endif /* __IMX_HDMI_H__ */
|
||||
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