USB: musb_gadget: fix STALL handling
The driver incorrectly cancels the mass-storage device CSW request (which leads to device reset) due to giving back URB at the head of endpoint's queue after sending each STALL handshake; stop doing that and start checking for the queue being non-empty before stalling an endpoint and disallowing stall in such case in musb_gadget_set_halt() like the other gadget drivers do. Moreover, the driver starts Rx request despite of the endpoint being halted -- fix this by moving the SendStall bit check from musb_g_rx() to rxstate(). And we also sometimes get into rxstate() with DMA still active after clearing an endpoint's halt (not clear why), so bail out in this case, similarly to what txstate() does... While at it, also do the following changes : - in musb_gadget_set_halt(), remove pointless Tx FIFO flushing (the driver does not allow stalling with non-empty Tx FIFO anyway); - in rxstate(), stop pointlessly zeroing the 'csr' variable; - in musb_gadget_set_halt(), move the 'done' label to a more proper place; - in musb_g_rx(), eliminate the 'done' label completely... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Sergei Shtylyov
Greg Kroah-Hartman
Родитель
c2f6595fbd
Коммит
cea83241b3
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@ -4,6 +4,7 @@
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* Copyright 2005 Mentor Graphics Corporation
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* Copyright (C) 2005-2006 by Texas Instruments
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* Copyright (C) 2006-2007 Nokia Corporation
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* Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -436,14 +437,6 @@ void musb_g_tx(struct musb *musb, u8 epnum)
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csr |= MUSB_TXCSR_P_WZC_BITS;
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csr &= ~MUSB_TXCSR_P_SENTSTALL;
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musb_writew(epio, MUSB_TXCSR, csr);
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if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
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dma->status = MUSB_DMA_STATUS_CORE_ABORT;
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musb->dma_controller->channel_abort(dma);
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}
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if (request)
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musb_g_giveback(musb_ep, request, -EPIPE);
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break;
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}
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@ -582,15 +575,25 @@ void musb_g_tx(struct musb *musb, u8 epnum)
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*/
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static void rxstate(struct musb *musb, struct musb_request *req)
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{
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u16 csr = 0;
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const u8 epnum = req->epnum;
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struct usb_request *request = &req->request;
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struct musb_ep *musb_ep = &musb->endpoints[epnum].ep_out;
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void __iomem *epio = musb->endpoints[epnum].regs;
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unsigned fifo_count = 0;
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u16 len = musb_ep->packet_sz;
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u16 csr = musb_readw(epio, MUSB_RXCSR);
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csr = musb_readw(epio, MUSB_RXCSR);
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/* We shouldn't get here while DMA is active, but we do... */
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if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) {
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DBG(4, "DMA pending...\n");
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return;
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}
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if (csr & MUSB_RXCSR_P_SENDSTALL) {
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DBG(5, "%s stalling, RXCSR %04x\n",
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musb_ep->end_point.name, csr);
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return;
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}
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if (is_cppi_enabled() && musb_ep->dma) {
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struct dma_controller *c = musb->dma_controller;
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@ -761,19 +764,10 @@ void musb_g_rx(struct musb *musb, u8 epnum)
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csr, dma ? " (dma)" : "", request);
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if (csr & MUSB_RXCSR_P_SENTSTALL) {
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if (dma_channel_status(dma) == MUSB_DMA_STATUS_BUSY) {
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dma->status = MUSB_DMA_STATUS_CORE_ABORT;
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(void) musb->dma_controller->channel_abort(dma);
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request->actual += musb_ep->dma->actual_len;
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}
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csr |= MUSB_RXCSR_P_WZC_BITS;
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csr &= ~MUSB_RXCSR_P_SENTSTALL;
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musb_writew(epio, MUSB_RXCSR, csr);
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if (request)
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musb_g_giveback(musb_ep, request, -EPIPE);
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goto done;
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return;
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}
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if (csr & MUSB_RXCSR_P_OVERRUN) {
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@ -795,7 +789,7 @@ void musb_g_rx(struct musb *musb, u8 epnum)
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DBG((csr & MUSB_RXCSR_DMAENAB) ? 4 : 1,
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"%s busy, csr %04x\n",
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musb_ep->end_point.name, csr);
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goto done;
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return;
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}
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if (dma && (csr & MUSB_RXCSR_DMAENAB)) {
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@ -826,22 +820,15 @@ void musb_g_rx(struct musb *musb, u8 epnum)
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if ((request->actual < request->length)
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&& (musb_ep->dma->actual_len
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== musb_ep->packet_sz))
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goto done;
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return;
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#endif
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musb_g_giveback(musb_ep, request, 0);
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request = next_request(musb_ep);
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if (!request)
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goto done;
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/* don't start more i/o till the stall clears */
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musb_ep_select(mbase, epnum);
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csr = musb_readw(epio, MUSB_RXCSR);
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if (csr & MUSB_RXCSR_P_SENDSTALL)
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goto done;
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return;
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}
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/* analyze request if the ep is hot */
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if (request)
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rxstate(musb, to_musb_request(request));
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@ -849,8 +836,6 @@ void musb_g_rx(struct musb *musb, u8 epnum)
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DBG(3, "packet waiting for %s%s request\n",
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musb_ep->desc ? "" : "inactive ",
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musb_ep->end_point.name);
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done:
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return;
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}
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@ -1244,7 +1229,7 @@ int musb_gadget_set_halt(struct usb_ep *ep, int value)
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void __iomem *mbase;
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unsigned long flags;
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u16 csr;
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struct musb_request *request = NULL;
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struct musb_request *request;
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int status = 0;
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if (!ep)
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@ -1260,24 +1245,29 @@ int musb_gadget_set_halt(struct usb_ep *ep, int value)
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musb_ep_select(mbase, epnum);
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/* cannot portably stall with non-empty FIFO */
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request = to_musb_request(next_request(musb_ep));
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if (value && musb_ep->is_in) {
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csr = musb_readw(epio, MUSB_TXCSR);
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if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
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DBG(3, "%s fifo busy, cannot halt\n", ep->name);
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spin_unlock_irqrestore(&musb->lock, flags);
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return -EAGAIN;
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if (value) {
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if (request) {
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DBG(3, "request in progress, cannot halt %s\n",
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ep->name);
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status = -EAGAIN;
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goto done;
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}
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/* Cannot portably stall with non-empty FIFO */
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if (musb_ep->is_in) {
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csr = musb_readw(epio, MUSB_TXCSR);
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if (csr & MUSB_TXCSR_FIFONOTEMPTY) {
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DBG(3, "FIFO busy, cannot halt %s\n", ep->name);
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status = -EAGAIN;
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goto done;
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}
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}
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}
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/* set/clear the stall and toggle bits */
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DBG(2, "%s: %s stall\n", ep->name, value ? "set" : "clear");
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if (musb_ep->is_in) {
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csr = musb_readw(epio, MUSB_TXCSR);
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if (csr & MUSB_TXCSR_FIFONOTEMPTY)
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csr |= MUSB_TXCSR_FLUSHFIFO;
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csr |= MUSB_TXCSR_P_WZC_BITS
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| MUSB_TXCSR_CLRDATATOG;
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if (value)
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@ -1300,14 +1290,13 @@ int musb_gadget_set_halt(struct usb_ep *ep, int value)
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musb_writew(epio, MUSB_RXCSR, csr);
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}
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done:
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/* maybe start the first request in the queue */
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if (!musb_ep->busy && !value && request) {
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DBG(3, "restarting the request\n");
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musb_ep_restart(musb, request);
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}
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done:
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spin_unlock_irqrestore(&musb->lock, flags);
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return status;
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}
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