ARM64: dts: marvell: armada-cp110: Fix clock resources for various node
On the CP modules we found on Armada 7K/8K, many IP block actually also
need a "functional" clock (from the bus). This patch add them which allows
to fix some issues hanging the kernel:
If Ethernet and sdhci driver are built as modules and sdhci was loaded
first then the kernel hang.
Fixes: bb16ea1742
("mmc: sdhci-xenon: Fix clock resource by adding an
optional bus clock")
Cc: stable@vger.kernel.org
Reported-by: Riku Voipio <riku.voipio@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
Родитель
56aeb07c91
Коммит
e3af9f7c6e
|
@ -63,8 +63,10 @@
|
|||
cpm_ethernet: ethernet@0 {
|
||||
compatible = "marvell,armada-7k-pp22";
|
||||
reg = <0x0 0x100000>, <0x129000 0xb000>;
|
||||
clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>;
|
||||
clock-names = "pp_clk", "gop_clk", "mg_clk";
|
||||
clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>,
|
||||
<&cpm_clk 1 5>, <&cpm_clk 1 18>;
|
||||
clock-names = "pp_clk", "gop_clk",
|
||||
"mg_clk","axi_clk";
|
||||
marvell,system-controller = <&cpm_syscon0>;
|
||||
status = "disabled";
|
||||
dma-coherent;
|
||||
|
@ -155,7 +157,8 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
reg = <0x12a200 0x10>;
|
||||
clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>;
|
||||
clocks = <&cpm_clk 1 9>, <&cpm_clk 1 5>,
|
||||
<&cpm_clk 1 6>, <&cpm_clk 1 18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -338,8 +341,8 @@
|
|||
compatible = "marvell,armada-cp110-sdhci";
|
||||
reg = <0x780000 0x300>;
|
||||
interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "core";
|
||||
clocks = <&cpm_clk 1 4>;
|
||||
clock-names = "core","axi";
|
||||
clocks = <&cpm_clk 1 4>, <&cpm_clk 1 18>;
|
||||
dma-coherent;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -63,8 +63,10 @@
|
|||
cps_ethernet: ethernet@0 {
|
||||
compatible = "marvell,armada-7k-pp22";
|
||||
reg = <0x0 0x100000>, <0x129000 0xb000>;
|
||||
clocks = <&cps_clk 1 3>, <&cps_clk 1 9>, <&cps_clk 1 5>;
|
||||
clock-names = "pp_clk", "gop_clk", "mg_clk";
|
||||
clocks = <&cps_clk 1 3>, <&cps_clk 1 9>,
|
||||
<&cps_clk 1 5>, <&cps_clk 1 18>;
|
||||
clock-names = "pp_clk", "gop_clk",
|
||||
"mg_clk", "axi_clk";
|
||||
marvell,system-controller = <&cps_syscon0>;
|
||||
status = "disabled";
|
||||
dma-coherent;
|
||||
|
@ -155,7 +157,8 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "marvell,orion-mdio";
|
||||
reg = <0x12a200 0x10>;
|
||||
clocks = <&cps_clk 1 9>, <&cps_clk 1 5>;
|
||||
clocks = <&cps_clk 1 9>, <&cps_clk 1 5>,
|
||||
<&cps_clk 1 6>, <&cps_clk 1 18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
Загрузка…
Ссылка в новой задаче