70d2148209
drm/nouveau/gr/gf100-: virtualise init_ppc_exceptions
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:23 +10:00
778f18c607
drm/nouveau/gr/gf100-: virtualise init_419c9c + apply fixes from traces
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Deliberately removed from non-GP100, as RM doesn't touch it.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:23 +10:00
0a84a51334
drm/nouveau/gr/gf100-: virtualise init_419eb4 + apply fixes from traces
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:23 +10:00
0feab0250d
drm/nouveau/gr/gf100-: virtualise init_419cc0 + apply fixes from traces
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Pulled some init out of main per-GPC/TPC loops to match RM.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:23 +10:00
0a5b97304b
drm/nouveau/gr/gf100-: virtualise init_sked_hww_esr
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:23 +10:00
2b297b0d6d
drm/nouveau/gr/gf100-: virtualise init_40601c
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:23 +10:00
3ac72e98b4
drm/nouveau/gr/gf100-: virtualise init_ds_hww_esr_2
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
2585a1b131
drm/nouveau/gr/gf100-: virtualise init_fecs_exceptions + apply fixes from traces
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The value for GF100 has changed here, but it matches RM now.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
7c76ebb65a
drm/nouveau/gr/gf100: write 0x400124 during init
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
dff30dbd1d
drm/nouveau/gr/gf100-: virtualise init_swdx_pes_mask
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
0f78acc86b
drm/nouveau/gr/gf100-: implement another chunk of bios-provided init
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
429412e231
drm/nouveau/gr/gf100-: virtualise init_rop_active_fbps
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
bfd27f39b5
drm/nouveau/gr/gf100-: virtualise init_num_active_ltcs
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
02917aa39d
drm/nouveau/gr/gf100-: virtualise init_zcull
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
2fe5ff6371
drm/nouveau/gr/gf100-: virtualise init_vsc_stream_master
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
a37279e94c
drm/nouveau/gr/gf100-: virtualise init_bios
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
cd9662f89e
drm/nouveau/gr/gf100-: support clkgate_pack everywhere
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
8b058ca518
drm/nouveau/gr/gf100-: virtualise r405a14
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
6f63a5fb1e
drm/nouveau/gr/gf100-: support firmware-provided sw_nonctx everywhere
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
1246f1dc22
drm/nouveau/gr/gf100-: virtualise init_gpc_mmu + apply fixes from traces
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
334cc26d4d
drm/nouveau/fifo/gp100-: force individual channels into a channel group
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RM does this for some reason, and is enforced in HW on Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
eda12417d3
drm/nouveau/fifo/gm107-: write instance address in channel runlist entry
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RM does this for some reason.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
79bb4b617f
drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
8c4e9f9dff
drm/nouveau/fifo/gk110-: support writing channel group runlist entries
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
4f2fc25c0f
drm/nouveau/fifo/gk104-: poll for runlist update completion
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Newer HW doesn't appear to send this event, which will cause long delays
in runlist updates if they don't complete immediately.
RM doesn't use these events anywhere, and an NVGPU commit message notes
that polling is the preferred method even on HW that supports the event.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
665870837a
drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts
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This will be required to support features on newer hardware.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
f9360c3aa6
drm/nouveau/fifo/gk104-: simplify definition of channel classes
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
a7cf01809b
drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
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We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.
By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.
The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
cc36205085
drm/nouveau/fifo/gk104-: support querying engines available on each runlist
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Will be used to improve channel runlist selection.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
ddc669e256
drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs
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This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
55b8e85b0b
drm/nouveau/fifo/gk104-: accept engine contexts for CE3 and up
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These can exist on GP100 and newer.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
eb47db4f3b
drm/nouveau/fifo: support channel count query
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
6eb01aa898
drm/nouveau/device: support querying available engines of a specific type
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Will be used for fifo runlist selection.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
c5c9127b25
drm/nouveau/device: implement a generic method to query device-specific properties
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We have a need to fetch data from GPU-specific sub-devices that is not
tied to any particular engine object.
This commit provides the framework to support such queries.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
f5650478ab
drm/nouveau/disp/nv50-: pass nvkm_memory objects for channel push buffers
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
a9c44a88ca
drm/nouveau/disp/nv50-: add channel interfaces to control error interrupts
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This will be required to support Volta, but also allows us to remove code
that's duplicated for each channel type already.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
4a8621a24a
drm/nouveau/disp/nv50-: add channel interfaces to determine the user area
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This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
8531f57027
drm/nouveau/disp/nv50-: merge handling of pio and dma channels
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Unnecessarily complicated, and a barrier to cleanly supporting Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
9b096283bf
drm/nouveau/disp/nv50-: simplify definiton of core channels
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
6d41a7536f
drm/nouveau/disp/nv50-: simplify definition of cursor channels
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
3ceeef9c03
drm/nouveau/disp/nv50-: simplify definition of base channels
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
c2c3a00310
drm/nouveau/disp/nv50-: simplify definition of overlay immediate channels
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
46f74a8ad7
drm/nouveau/disp/nv50-: simplify definition of overlay channels
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Introduces a new method of defining channels available from the display,
common to all channel types, allowing for more flexibility in available
channel types/counts, and reducing the amount of boiler-plate required.
This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
abc1d4379b
drm/nouveau/disp/nv50-: replace user object with engine pointer in channels
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More simplification.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
bb3b0a4220
drm/nouveau/disp/nv50-: initialise from the engine, rather than the user object
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Engines are initialised on an as-needed basis, so this results in the
same behaviour, whilst allowing us to simplify things a bit.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
f5e088d6f0
drm/nouveau/disp/nv50-: fetch mask of available piors during oneinit
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
9fe4e17704
drm/nouveau/disp/nv50-: fetch mask of available sors during oneinit
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
bf5d1a6b6a
drm/nouveau/disp/nv50-: fetch mask of available dacs during oneinit
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
f7b2ece37f
drm/nouveau/disp/nv50-: fetch mask of available heads during oneinit
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
3b9ba66ab0
drm/nouveau/disp/nv50-: delay subunit construction until oneinit
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We should be reading registers to determine which subunits are really
present on a given board, and this needs to be done after DEVINIT.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs