With commit 02b4e2756e ("ARM: v7 setup
function should invalidate L1 cache"), the default secondary_startup
function for ARMv7 CPUs does invalidate the L1 cache, which was the sole
reason why BCM63xx had to have its own secondary_startup implementation.
Now that the secondary_startup takes care of this, we can completely
remove that code.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
of_get_cpu_node provides the device node associated with the given
logical CPU and cpu_logical_map contains the physical id for each CPU
in the logical ordering. Passing cpu_logical_map(cpu) to of_get_cpu_node
is incorrect.
This patch fixes the issue by passing the logical CPU number to
of_get_cpu_node
Fixes: ed5cd8163d ("ARM: BCM63xx: Add SMP support for BCM63138")
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add support for booting the secondary CPU on BCM63138, this involves:
- locating the bootlut to write the reset vector
- powering up the second CPU when we need to using the DT-supplied PMB
references
- disabling VFP when enabled such that we can keep having SMP
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli
Sudeep Holla