Граф коммитов

520662 Коммитов

Автор SHA1 Сообщение Дата
Hai Li 9d32c4989c drm/msm/dsi: Enable PLL driver in MSM DSI
This change activates PLL driver for DSI to work with
common clock framework.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Hai Li 825637b9c0 drm/msm/dsi: Add DSI PLL clock driver support
DSI byte clock and pixel clocks are sourced from DSI PLL.
This change adds the DSI PLL source clock driver under
common clock framework.

This change handles DSI 28nm PLL only.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Fabian Frederick bdc80de2a6 drm/msm: use IS_ERR() to check regulator_get() return
regulator_get() never returns NULL. There's no need for IS_ERR_OR_NULL()

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Fabian Frederick 73dbf69638 drm/msm: use IS_ERR() to check msm_ioremap() return
msm_ioremap() never returns NULL. There's no need for IS_ERR_OR_NULL()

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Hai Li 68cdbed907 drm/msm/mdp5: Wait for PP_DONE irq for command mode CRTC atomic commit
CRTCs in DSI command mode data path should wait for pingpong done,
instead of vblank, to finish atomic commit.

This change is to enable PP_DONE irq on command mode CRTCs and wait for
this irq happens before atomic commit completion.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Hai Li 0a5c9aad11 drm/msm: Use customized function to wait for atomic commit done
MDP FLUSH registers could indicate if the previous flush updates
has taken effect at vsync boundary. Making use of this H/W feature
can catch the vsync that happened between CRTC atomic_flush and
*_wait_for_vblanks, to avoid unnecessary wait.

This change allows kms CRTCs to use their own *_wait_for_commit_done
functions to wait for FLUSH register cleared at vsync, before commit
completion.

Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:04 -04:00
Hai Li 7eed919a35 dt-bindings: Add MSM eDP controller documentation
Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:03 -04:00
Hai Li c760558c2d dt-bindings: Add MSM DSI controller documentation
Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:03 -04:00
Nicholas Mc Guire 0c076bffd2 drm/msm: drop redundant debug output
wait_for_completion_timeout returns 0 in case of timeout and never
return < 0 so there is no additional information in printing the
value of time_left here as it will always be 0, thus it can be dropped.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:03 -04:00
Nicholas Mc Guire c6d0baf1fd drm/msm: wait_for_completion_timeout return is never negative
wait_for_completion_timeout returns >= 0 but never
negative  - so the error check should be against equality
to 0 not <= 0.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:03 -04:00
Nicholas Mc Guire a51d01f067 drm/msm: match wait_for_completion_timeout return type
return type of wait_for_completion_timeout is unsigned long not int, this
patch assigns the return value of wait_for_completion_timeout to an
appropriately typed and named variable.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:03 -04:00
Archit Taneja 65c5e5426d drm/msm: dsi: Provide option to force continuous HS clock
Some DSI peripherals rely on the HS clock on DSI clock lane as their clock
source. If the clock lane transitions between HS and LP states, it
can disrupt the functioning of such peripherals.

The mipi dsi mode flag MIPI_DSI_CLOCK_NON_CONTINUOUS already exists for
such peripheral drivers. Use it to configure the bit CLKLN_HS_FORCE_REQUEST
in DSI_LANE_CTRL.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:03 -04:00
jilai wang f28730c84f drm/msm: Call drm_prime_gem_destroy to clean up imported GEM object
If the GEM object is imported, drm_prime_gem_destroy needs to be
called to clean up dma buffer related information.

Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:02 -04:00
Rob Clark 07549dfbd9 drm/msm/edp: fix build warning - missing prototype
Fix build warning when building edp/edp_aux.o due to missing
prototype for edp_aux_transfer.

This function is only used in edp_aux.c so just make it static.

Reported-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:02 -04:00
Nicholas Mc Guire a7c07690f2 drm/msm: drop redundant output in debug message
wait_for_completion_timeout returns 0 in case of timeout so printing the
return value here will always yield 0 and is therefor redundant - dropped.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:02 -04:00
Nicholas Mc Guire 84c3b87b8b drm/msm: fix HZ dependency of timeout
The timeout is passed as a constant which makes it HZ dependent because
jiffies are expected so it should be converted to jiffies. The actual
value is not clear from the code - my best guess is that this should be
300 milliseconds given that other timeouts are in milliseconds based on
looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms,
tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who
knows the details of the driver.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:02 -04:00
Nicholas Mc Guire 9f68ef90aa drm/msm: fixup wait_for_completion_timeout handling
wait_for_completion_timeout return >= 0 but never negative so the check
logic looks inconsistent. Further the return value of
wait_for_completion_timeout was being passed up the call chain but the
x call sites as drm_dp_i2c_do_msg()/drm_dp_dpcd_access() check for < 0
thus timeout was being treated as success case.

<snip> drivers/gpu/drm/drm_dp_helper.c:drm_dp_i2c_do_msg()
                mutex_lock(&aux->hw_mutex);
                ret = aux->transfer(aux, msg);
                mutex_unlock(&aux->hw_mutex);
                if (ret < 0) {
<snip>
logic in edp_aux_transfer() seems incorrect as it could return 0 (timeout)
but checks of <= 0 to indicate error so the return probably should be
-ETIMEDOUT in case wait_for_completion_timeout returns 0 (timeout
occurred).

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:02 -04:00
Rob Clark e5989ee134 drm/msm/mdp5: fix for crash in disable path
Seems like disable can race with complete_flip() in process of disabling
a crtc, leading to:

[   49.065364] Call trace:
[   49.071441] [<ffffffc00041d5a0>] mdp5_ctl_blend+0x20/0x1c0
[   49.073788] [<ffffffc00041ebcc>] mdp5_crtc_disable+0x3c/0xa8
[   49.079348] [<ffffffc0003e7854>] disable_outputs.isra.4+0x11c/0x220
[   49.085164] [<ffffffc0003e7afc>] drm_atomic_helper_commit_modeset_disables+0x14/0x38
[   49.091155] [<ffffffc000425c80>] complete_commit+0x40/0xb8
[   49.099136] [<ffffffc0004260ac>] msm_atomic_commit+0x364/0x398
[   49.104430] [<ffffffc00040a614>] drm_atomic_commit+0x3c/0x70
[   49.110249] [<ffffffc0003e67b8>] drm_atomic_helper_set_config+0x1b0/0x3e0
[   49.116065] [<ffffffc0003f99bc>] drm_mode_set_config_internal+0x64/0xf8
[   49.122746] [<ffffffc0003fa624>] drm_framebuffer_remove+0xe4/0x128
[   49.129171] [<ffffffc0003feaf8>] drm_mode_rmfb+0xc0/0x100
[   49.135420] [<ffffffc0003efba8>] drm_ioctl+0x258/0x4d0
[   49.140889] [<ffffffc0001b0388>] do_vfs_ioctl+0x338/0x5d0
[   49.145921] [<ffffffc0001b06a8>] SyS_ioctl+0x88/0xa0

It makes no sense to free the ctl without disabling all stages, so lets
just move them together to avoid the crash.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:02 -04:00
Rob Clark d735fdc35b drm/msm: workaround for missing irq on a306/8x16
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:01 -04:00
Rob Clark de558cd2ae drm/msm: adreno a306 support
As found in apq8016 (used in DragonBoard 410c) and msm8916.

Note that numerically a306 is actually 307 (since a305c already claimed
306).  Nice and confusing.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:01 -04:00
Rob Clark 6490ad4740 drm/msm: clarify downstream bus scaling
A few spots in the driver have support for downstream android
CONFIG_MSM_BUS_SCALING.  This is mainly to simplify backporting the
driver for various devices which do not have sufficient upstream
kernel support.  But the intentionally dead code seems to cause
some confusion.  Rename the #define to make this more clear.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:01 -04:00
Rob Clark 570655b09b drm/msm/mdp4: Support NV12MT format in mdp4
Using fb modifier flag, support NV12MT format in MDP4.

v2:
- rework the modifier's description [Daniel Vetter's comment]
- drop .set_mode_config() callback [Rob Clark's comment]
v3:
- change VENDOR's name and restrict usage to NV12 [pointed by Daniel]

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:01 -04:00
Rob Clark af6cb4c1a4 drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:01 -04:00
Rob Clark a5436e1d24 drm/msm: add missing DRIVER_ATOMIC flag
Somehow this got lost when msm atomic support was first merged.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:00 -04:00
Rob Clark 2671618551 drm/msm/adreno: dump scratch regs and other info on hang
Dump a bit more info when the GPU hangs, without having hang_debug
enabled (which dumps a *lot* of registers).  Also dump the scratch
registers, as they are useful for determining where in the cmdstream
the GPU hung (and they seem always safe to read when GPU has hung).

Note that the freedreno gallium driver emits increasing counter values
to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so
these two in particular can be used to "triangulate" where in the
cmdstream the GPU hung.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11 13:11:00 -04:00
Dan Carpenter 3f05eb4e3f drm/virtio: remove some dead code
The goto is correct, and we never reach the return statement so just
delete the dead code.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-11 13:16:35 +10:00
Dan Carpenter 2b7edcad69 drm/virtio: checking for NULL instead of IS_ERR
virtio_gpu_alloc_object() returns an error pointer, it never returns
NULL.

Fixes: dc5698e80c ('Add virtio gpu driver.')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-11 13:16:29 +10:00
Dave Airlie dc9be8e217 Merge branch 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux into drm-next
More fixes for amdgpu for 4.2.  We've integrated Jerome's comments
about the interface among other things.  I'll be on vacation next week
so Christian will be handling any updates next week.

* 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (23 commits)
  drm/amdgpu: fix a amdgpu_dpm=0 bug
  drm/amdgpu: don't enable/disable display twice on suspend/resume
  drm/amdgpu: fix UVD/VCE VM emulation
  drm/amdgpu: enable vce powergating
  drm/amdgpu/iceland: don't call smu_init on resume
  drm/amdgpu/tonga: don't call smu_init on resume
  drm/amdgpu/cz: don't call smu_init on resume
  drm/amdgpu: update to latest gfx8 golden register settings
  drm/amdgpu: whitespace cleanup in gmc8 golden regs
  drm/admgpu: move XDMA golden registers to dce code
  drm/amdgpu: fix the build on big endian
  drm/amdgpu: cleanup UAPI comments
  drm/amdgpu: remove AMDGPU_CTX_OP_STATE_RUNNING
  drm/amdgpu: remove the VI hardware semaphore in ring sync
  drm/amdgpu: set the gfx config properly for all CZ variants (v2)
  drm/amdgpu: also print the pci revision when printing the pci ids
  drm/amdgpu: cleanup VA IOCTL
  drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmap
  drm/amdgpu: fix amdgpu_vm_bo_map
  drm/amdgpu: remove unused AMDGPU_IB_FLAG_GDS
  ...
2015-06-11 13:04:07 +10:00
Sonny Jiang 6d8db6ce23 drm/amdgpu: fix a amdgpu_dpm=0 bug
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 15:05:33 -04:00
Alex Deucher 633ed3df9a drm/amdgpu: don't enable/disable display twice on suspend/resume
We were doing it in the common code and in the IP specific code.
Remove the IP specific code.  The common code handles the
ordering properly.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 14:16:48 -04:00
Christian König 4802ce1177 drm/amdgpu: fix UVD/VCE VM emulation
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 14:16:48 -04:00
Sonny Jiang b7a0776949 drm/amdgpu: enable vce powergating
Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on
demand.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-10 11:54:16 -04:00
Alex Deucher b97aab014c drm/amdgpu/iceland: don't call smu_init on resume
smu_init allocates buffers and initializes them.  It does not
touch the hw.  There is no need to do it again on resume.  It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.

Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:32:25 -04:00
Alex Deucher aaf4ee3c02 drm/amdgpu/tonga: don't call smu_init on resume
smu_init allocates buffers and initializes them.  It does not
touch the hw.  There is no need to do it again on resume.  It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.

Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:32:19 -04:00
Alex Deucher 05188312e2 drm/amdgpu/cz: don't call smu_init on resume
smu_init allocates buffers and initializes them.  It does not
touch the hw.  There is no need to do it again on resume.  It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.

Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:31:26 -04:00
Alex Deucher 6a00a09e49 drm/amdgpu: update to latest gfx8 golden register settings
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:13:35 -04:00
Alex Deucher c61bf64927 drm/amdgpu: whitespace cleanup in gmc8 golden regs
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:13:28 -04:00
Alex Deucher 5732a94f18 drm/admgpu: move XDMA golden registers to dce code
Already moved other display registers.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:13:21 -04:00
Alex Deucher 454fc95e84 drm/amdgpu: fix the build on big endian
Some leftover copy and pastes from radeon that never
got updated.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:13:01 -04:00
Christian König 675da0ddd6 drm/amdgpu: cleanup UAPI comments
No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:06:46 -04:00
Christian König 692a59e696 drm/amdgpu: remove AMDGPU_CTX_OP_STATE_RUNNING
Not used.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:06:46 -04:00
David Zhang 147dbfbc54 drm/amdgpu: remove the VI hardware semaphore in ring sync
Signed-off-by: David Zhang <david1.zhang@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-10 09:06:45 -04:00
Alex Deucher bd5c97bc1a drm/amdgpu: set the gfx config properly for all CZ variants (v2)
Need to adjust the number of CUs and RBs.

v2: get proper values

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 21:42:54 -04:00
Alex Deucher 3e39ab9083 drm/amdgpu: also print the pci revision when printing the pci ids
The driver makes use of this information so print if to aid in
debugging.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 21:42:53 -04:00
Christian König 34b5f6a6d6 drm/amdgpu: cleanup VA IOCTL
Remove the unnecessary returned status and make the IOCTL write only.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 21:42:53 -04:00
Christian König 6c7fc503a4 drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmap
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 21:42:52 -04:00
Christian König 7e9fca0baa drm/amdgpu: fix amdgpu_vm_bo_map
We need to reset the bo_va address, otherwise new mappings
wouldn't be updated in the page table.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08 21:42:51 -04:00
Jammy Zhou cab6d57c09 drm/amdgpu: remove unused AMDGPU_IB_FLAG_GDS
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-05 11:02:07 -04:00
Chunming Zhou 890ee23fc6 drm/amdgpu: disable user fence interrupt (v2)
amdgpu submits both kernel and user fences, but just need one interrupt,
disable user fence interrupt and don't effect user fence.

v2: fix merge error

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-05 11:02:06 -04:00
Christian König 9298e52f8b drm/amdgpu: fix user ptr race condition
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: monk liu <monk.liu@amd.com>
2015-06-05 10:59:32 -04:00