The names for BPF_ALU64 | BPF_ARSH are emit_a32_arsh_*,
the names for BPF_ALU64 | BPF_LSH are emit_a32_lsh_*, but
the names for BPF_ALU64 | BPF_RSH are emit_a32_lsr_*.
For consistence reason, let's rename emit_a32_lsr_* to
emit_a32_rsh_*.
This patch also corrects a wrong comment.
Fixes: 39c13c204b ("arm: eBPF JIT compiler")
Signed-off-by: Wang YanQing <udknight@gmail.com>
Cc: Shubham Bansal <illusionist.neo@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@armlinux.org.uk
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
imm24 is signed, so the right range is:
[-(1<<(24 - 1)), (1<<(24 - 1)) - 1]
Note: this patch also fix a typo.
Fixes: 39c13c204b ("arm: eBPF JIT compiler")
Signed-off-by: Wang YanQing <udknight@gmail.com>
Cc: Shubham Bansal <illusionist.neo@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@armlinux.org.uk
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Pull timers and timekeeping updates from Thomas Gleixner:
- Core infrastucture work for Y2038 to address the COMPAT interfaces:
+ Add a new Y2038 safe __kernel_timespec and use it in the core
code
+ Introduce config switches which allow to control the various
compat mechanisms
+ Use the new config switch in the posix timer code to control the
32bit compat syscall implementation.
- Prevent bogus selection of CPU local clocksources which causes an
endless reselection loop
- Remove the extra kthread in the clocksource code which has no value
and just adds another level of indirection
- The usual bunch of trivial updates, cleanups and fixlets all over the
place
- More SPDX conversions
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (24 commits)
clocksource/drivers/mxs_timer: Switch to SPDX identifier
clocksource/drivers/timer-imx-tpm: Switch to SPDX identifier
clocksource/drivers/timer-imx-gpt: Switch to SPDX identifier
clocksource/drivers/timer-imx-gpt: Remove outdated file path
clocksource/drivers/arc_timer: Add comments about locking while read GFRC
clocksource/drivers/mips-gic-timer: Add pr_fmt and reword pr_* messages
clocksource/drivers/sprd: Fix Kconfig dependency
clocksource: Move inline keyword to the beginning of function declarations
timer_list: Remove unused function pointer typedef
timers: Adjust a kernel-doc comment
tick: Prefer a lower rating device only if it's CPU local device
clocksource: Remove kthread
time: Change nanosleep to safe __kernel_* types
time: Change types to new y2038 safe __kernel_* types
time: Fix get_timespec64() for y2038 safe compat interfaces
time: Add new y2038 safe __kernel_timespec
posix-timers: Make compat syscalls depend on CONFIG_COMPAT_32BIT_TIME
time: Introduce CONFIG_COMPAT_32BIT_TIME
time: Introduce CONFIG_64BIT_TIME in architectures
compat: Enable compat_get/put_timespec64 always
...
Pull irq updates from Thomas Gleixner:
- Consolidation of softirq pending:
The softirq mask and its accessors/mutators have many implementations
scattered around many architectures. Most do the same things
consisting in a field in a per-cpu struct (often irq_cpustat_t)
accessed through per-cpu ops. We can provide instead a generic
efficient version that most of them can use. In fact s390 is the only
exception because the field is stored in lowcore.
- Support for level!?! triggered MSI (ARM)
Over the past couple of years, we've seen some SoCs coming up with
ways of signalling level interrupts using a new flavor of MSIs, where
the MSI controller uses two distinct messages: one that raises a
virtual line, and one that lowers it. The target MSI controller is in
charge of maintaining the state of the line.
This allows for a much simplified HW signal routing (no need to have
hundreds of discrete lines to signal level interrupts if you already
have a memory bus), but results in a departure from the current idea
the kernel has of MSIs.
- Support for Meson-AXG GPIO irqchip
- Large stm32 irqchip rework (suspend/resume, hierarchical domains)
- More SPDX conversions
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (36 commits)
ARM: dts: stm32: Add exti support to stm32mp157 pinctrl
ARM: dts: stm32: Add exti support for stm32mp157c
pinctrl/stm32: Add irq_eoi for stm32gpio irqchip
irqchip/stm32: Add suspend/resume support for hierarchy domain
irqchip/stm32: Add stm32mp1 support with hierarchy domain
irqchip/stm32: Prepare common functions
irqchip/stm32: Add host and driver data structures
irqchip/stm32: Add suspend support
irqchip/stm32: Add falling pending register support
irqchip/stm32: Checkpatch fix
irqchip/stm32: Optimizes and cleans up stm32-exti irq_domain
irqchip/meson-gpio: Add support for Meson-AXG SoCs
dt-bindings: interrupt-controller: New binding for Meson-AXG SoC
dt-bindings: interrupt-controller: Fix the double quotes
softirq/s390: Move default mutators of overwritten softirq mask to s390
softirq/x86: Switch to generic local_softirq_pending() implementation
softirq/sparc: Switch to generic local_softirq_pending() implementation
softirq/powerpc: Switch to generic local_softirq_pending() implementation
softirq/parisc: Switch to generic local_softirq_pending() implementation
softirq/ia64: Switch to generic local_softirq_pending() implementation
...
Pull siginfo updates from Eric Biederman:
"This set of changes close the known issues with setting si_code to an
invalid value, and with not fully initializing struct siginfo. There
remains work to do on nds32, arc, unicore32, powerpc, arm, arm64, ia64
and x86 to get the code that generates siginfo into a simpler and more
maintainable state. Most of that work involves refactoring the signal
handling code and thus careful code review.
Also not included is the work to shrink the in kernel version of
struct siginfo. That depends on getting the number of places that
directly manipulate struct siginfo under control, as it requires the
introduction of struct kernel_siginfo for the in kernel things.
Overall this set of changes looks like it is making good progress, and
with a little luck I will be wrapping up the siginfo work next
development cycle"
* 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace: (46 commits)
signal/sh: Stop gcc warning about an impossible case in do_divide_error
signal/mips: Report FPE_FLTUNK for undiagnosed floating point exceptions
signal/um: More carefully relay signals in relay_signal.
signal: Extend siginfo_layout with SIL_FAULT_{MCEERR|BNDERR|PKUERR}
signal: Remove unncessary #ifdef SEGV_PKUERR in 32bit compat code
signal/signalfd: Add support for SIGSYS
signal/signalfd: Remove __put_user from signalfd_copyinfo
signal/xtensa: Use force_sig_fault where appropriate
signal/xtensa: Consistenly use SIGBUS in do_unaligned_user
signal/um: Use force_sig_fault where appropriate
signal/sparc: Use force_sig_fault where appropriate
signal/sparc: Use send_sig_fault where appropriate
signal/sh: Use force_sig_fault where appropriate
signal/s390: Use force_sig_fault where appropriate
signal/riscv: Replace do_trap_siginfo with force_sig_fault
signal/riscv: Use force_sig_fault where appropriate
signal/parisc: Use force_sig_fault where appropriate
signal/parisc: Use force_sig_mceerr where appropriate
signal/openrisc: Use force_sig_fault where appropriate
signal/nios2: Use force_sig_fault where appropriate
...
- replaceme the force_dma flag with a dma_configure bus method.
(Nipun Gupta, although one patch is іncorrectly attributed to me
due to a git rebase bug)
- use GFP_DMA32 more agressively in dma-direct. (Takashi Iwai)
- remove PCI_DMA_BUS_IS_PHYS and rely on the dma-mapping API to do the
right thing for bounce buffering.
- move dma-debug initialization to common code, and apply a few cleanups
to the dma-debug code.
- cleanup the Kconfig mess around swiotlb selection
- swiotlb comment fixup (Yisheng Xie)
- a trivial swiotlb fix. (Dan Carpenter)
- support swiotlb on RISC-V. (based on a patch from Palmer Dabbelt)
- add a new generic dma-noncoherent dma_map_ops implementation and use
it for arc, c6x and nds32.
- improve scatterlist validity checking in dma-debug. (Robin Murphy)
- add a struct device quirk to limit the dma-mask to 32-bit due to
bridge/system issues, and switch x86 to use it instead of a local
hack for VIA bridges.
- handle devices without a dma_mask more gracefully in the dma-direct
code.
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Merge tag 'dma-mapping-4.18' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping updates from Christoph Hellwig:
- replace the force_dma flag with a dma_configure bus method. (Nipun
Gupta, although one patch is іncorrectly attributed to me due to a
git rebase bug)
- use GFP_DMA32 more agressively in dma-direct. (Takashi Iwai)
- remove PCI_DMA_BUS_IS_PHYS and rely on the dma-mapping API to do the
right thing for bounce buffering.
- move dma-debug initialization to common code, and apply a few
cleanups to the dma-debug code.
- cleanup the Kconfig mess around swiotlb selection
- swiotlb comment fixup (Yisheng Xie)
- a trivial swiotlb fix. (Dan Carpenter)
- support swiotlb on RISC-V. (based on a patch from Palmer Dabbelt)
- add a new generic dma-noncoherent dma_map_ops implementation and use
it for arc, c6x and nds32.
- improve scatterlist validity checking in dma-debug. (Robin Murphy)
- add a struct device quirk to limit the dma-mask to 32-bit due to
bridge/system issues, and switch x86 to use it instead of a local
hack for VIA bridges.
- handle devices without a dma_mask more gracefully in the dma-direct
code.
* tag 'dma-mapping-4.18' of git://git.infradead.org/users/hch/dma-mapping: (48 commits)
dma-direct: don't crash on device without dma_mask
nds32: use generic dma_noncoherent_ops
nds32: implement the unmap_sg DMA operation
nds32: consolidate DMA cache maintainance routines
x86/pci-dma: switch the VIA 32-bit DMA quirk to use the struct device flag
x86/pci-dma: remove the explicit nodac and allowdac option
x86/pci-dma: remove the experimental forcesac boot option
Documentation/x86: remove a stray reference to pci-nommu.c
core, dma-direct: add a flag 32-bit dma limits
dma-mapping: remove unused gfp_t parameter to arch_dma_alloc_attrs
dma-debug: check scatterlist segments
c6x: use generic dma_noncoherent_ops
arc: use generic dma_noncoherent_ops
arc: fix arc_dma_{map,unmap}_page
arc: fix arc_dma_sync_sg_for_{cpu,device}
arc: simplify arc_dma_sync_single_for_{cpu,device}
dma-mapping: provide a generic dma-noncoherent implementation
dma-mapping: simplify Kconfig dependencies
riscv: add swiotlb support
riscv: only enable ZONE_DMA32 for 64-bit
...
Filling in the padding slot in the bpf structure as a bug fix in 'ne'
overlapped with actually using that padding area for something in
'net-next'.
Signed-off-by: David S. Miller <davem@davemloft.net>
* R-Mobile A1 (r8a7740) SoC
- Describe CEU, IRQC, SYS-DMAC and USB devices
- Cleanup for consistency with other Renesas SoCs and enhanced maintainability
+ Stop grouping clocks under a "clocks" subnode
+ Add soc node
+ Sort subnodes of root and soc nodes
* RZ/A1H (r7s72100) SoC
- Describe CEU device
* R-Car Gen2, RZ/G1 and RZ/A1H SoCs
- Add PMU device nodes
Geert Uytterhoeven says: "This patch series enables support for the ARM
Performance Monitor Units in Cortex-A7, Cortex-A9, and Cortex-A15 CPU
cores on Renesas RZ/A1, R-Car Gen2, and RZ/G1 SoCs. This allows for
better performance analysis using the "perf" tool."
* RZ/A1H (r7s72100) SoC
- Correct interrupt types
Geert Uytterhoeven says "RZ/A1H peripherals use a mix of level and edge
interrupts.
This patch series corrects the interrupt types for watchdog and RTC from
edge to level, to match the datasheet."
* R-Mobile APE6 (r8a73a4) APE4EVM board and SH-Mobile AG5 (sh73a0) SoC
- Use generic disable-wp instead of now deprecated
toshiba,mmc-wrprotect-disable property
* EMMA Mobile EV2 (emev2) and SH-Mobile AG5 (sh73a0) SoCs
- Add missing interrupt-affinity to PMU
Geert Uytterhoeven says "The Cortex-A9 PMU nodes on SH-Mobile AG5 and
Emma Mobile EV2 reference two interrupts, but lack interrupt-affinity
properties, leading to:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
This series adds the missing properties to fix this."
* R-Car H2 (r8a7790) and R-Mobile APE6 (r8a73a4) SoCs
- Correct mask for GIC PPI interrupts
Geert Uytterhoeven says "R-Car H2 and R-Mobile APE6 contain four
Cortex-A15 and four Cortex-A7 cores, hence the second interrupt
specifier cell for Private Peripheral Interrupts should use
"GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts can be delivered to
all 8 processor cores.
This brings the predecessors of R-Car Gen3 in line with what we're
doing on other big.LITTLE SoCs, like R-Car H3 and M3-W."
* Alt board for R-Car E2 (r8a7794) SoC
* RBoards for -Car Gen2 SoCs and kzm9d board for EMMA Mobile EV2 (emev2) SoC
- Drop unnecessary address properties from VIN port nodes
These are unnecessary as the nodes to not have bus addresses.
* R-Car H2 (r8a7790), M2-W (r8a7791), M2-N (r8a7793) and E2 (r8a7794) SoCs
- Describe FDP1 instances
* iW-RainboW-G23S board for RZ/G1C (r8a77470) SoC
- Initial SoC and board support
- Enable EtherAVB
- Describe all SCIF devices
* Boards for R-Car Gen2 SoCs
- Enable watchdog support
Geert Uytterhoeven says "This patch series enables the builtin watchdog
timer on R-Car Gen2 SoCs on all supported boards, and builds on top of
Fabrizio's "[RFC v4 00/26] Fix watchdog on Renesas R-Car Gen2 and
RZ/G1"."
* R-Car Gen2 and RZ/G1 SoCs
- Describe watchdog devices
- For R-Car Gen2 this involves updating the SMP routine side as
it is changed by a driver updated to allow watchdog device support
* Wheat board for V2H (r8a7792) SoC
- Correct ADV7513 address usage
Kieran Bingham says "The r8a7792 Wheat board has two ADV7513 devices
sharing a single I2C bus, however in low power mode the ADV7513 will
reset it's slave maps to use the hardware defined default addresses.
The ADV7511 driver was adapted to allow the two devices to be
registered correctly - but it did not take into account the fault
whereby the devices reset the addresses.
This results in an address conflict between the device using the
default addresses, and the other device if it is in low-power-mode.
Repair this issue by moving both devices away from the default address
definitions."
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Merge tag 'renesas-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
Renesas ARM Based SoC DT Updates for v4.18
* R-Mobile A1 (r8a7740) SoC
- Describe CEU, IRQC, SYS-DMAC and USB devices
- Cleanup for consistency with other Renesas SoCs and enhanced maintainability
* RZ/A1H (r7s72100) SoC
- Describe CEU device
* R-Car Gen2, RZ/G1 and RZ/A1H SoCs
- Add PMU device nodes
* RZ/A1H (r7s72100) SoC
- Correct interrupt types
* R-Mobile APE6 (r8a73a4) APE4EVM board and SH-Mobile AG5 (sh73a0) SoC
- Use generic disable-wp instead of now deprecated
toshiba,mmc-wrprotect-disable property
* EMMA Mobile EV2 (emev2) and SH-Mobile AG5 (sh73a0) SoCs
- Add missing interrupt-affinity to PMU
* R-Car H2 (r8a7790) and R-Mobile APE6 (r8a73a4) SoCs
- Correct mask for GIC PPI interrupts
* R-Car H2 (r8a7790), M2-W (r8a7791), M2-N (r8a7793) and E2 (r8a7794) SoCs
- Describe FDP1 instances
* R-Car Gen2 and RZ/G1 SoCs
- Describe watchdog devices
- For R-Car Gen2 this involves updating the SMP routine side as
it is changed by a driver updated to allow watchdog device support
* Alt board for R-Car E2 (r8a7794) SoC
* RBoards for -Car Gen2 SoCs and kzm9d board for EMMA Mobile EV2 (emev2) SoC
* iW-RainboW-G23S board for RZ/G1C (r8a77470) SoC
- Initial SoC and board support
- Enable EtherAVB
- Describe all SCIF devices
* Boards for R-Car Gen2 SoCs
- Enable watchdog support
* Wheat board for V2H (r8a7792) SoC
- Correct ADV7513 address usage
* tag 'renesas-dt-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (69 commits)
ARM: dts: r8a7740: Add CEU1
ARM: dts: r8a7740: Add CEU0
ARM: dts: r8a7745: Add PMU device node
ARM: dts: r8a7743: Add PMU device node
ARM: dts: r8a7794: Add PMU device node
ARM: dts: r8a7793: Add PMU device node
ARM: dts: r8a7792: Add PMU device node
ARM: dts: r8a7791: Add PMU device node
ARM: dts: r8a7790: Add PMU device nodes
ARM: dts: r7s72100: Add PMU device node
ARM: dts: r7s72100: Correct RTC interrupt types
ARM: dts: r7s72100: Correct watchdog timer interrupt type
ARM: dts: emev2: Add missing interrupt-affinity to PMU node
ARM: dts: sh73a0: Add missing interrupt-affinity to PMU node
ARM: dts: r8a73a4: Correct mask for GIC PPI interrupts
ARM: dts: r8a7790: Correct mask for GIC PPI interrupts
ARM: shmobile: r8a7794: alt: add EEPROM to DTS
ARM: dts: kzm9d: Drop unnecessary address properties from gpio_keys node
ARM: dts: silk: Drop unnecessary address properties from vin port node
ARM: dts: alt: Drop unnecessary address properties from vin port node
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- change to phase out at24 eeprom platform data
- add a missing wakeup pin on pxa320 SoCs
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Merge tag 'pxa-for-4.18' of https://github.com/rjarzmik/linux into next/soc
This is is the pxa changes for v4.18 cycle :
- change to phase out at24 eeprom platform data
- add a missing wakeup pin on pxa320 SoCs
* tag 'pxa-for-4.18' of https://github.com/rjarzmik/linux:
ARM: pxa3xx: enable external wakeup pins
ARM: pxa: stargate2: use device properties for at24 eeprom
Signed-off-by: Olof Johansson <olof@lixom.net>
The register address should be the full address of the rng, not the
offset from the start of the SCU.
Fixes: 5daa8212c0 ("ARM: dts: aspeed: Describe random number device")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
ENET "ipg" clock should be IMX7D_ENETx_IPG_ROOT_CLK
rather than IMX7D_ENET_AXI_ROOT_CLK which is for ENET bus
clock.
Based on Andy Duan's patch from the NXP kernel tree.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The kvm struct has been bloating. For example, it's tens of kilo-bytes
for x86, which turns out to be a large amount of memory to allocate
contiguously via kzalloc. Thus, this patch does the following:
1. Uses architecture-specific routines to allocate the kvm struct via
vzalloc for x86.
2. Switches arm to __KVM_HAVE_ARCH_VM_ALLOC so that it can use vzalloc
when has_vhe() is true.
Other architectures continue to default to kalloc, as they have a
dependency on kalloc or have a small-enough struct kvm.
Signed-off-by: Marc Orr <marcorr@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
- Lazy context-switching of FPSIMD registers on arm64
- Allow virtual redistributors to be part of two or more MMIO ranges
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Merge tag 'kvmarm-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/ARM updates for 4.18
- Lazy context-switching of FPSIMD registers on arm64
- Allow virtual redistributors to be part of two or more MMIO ranges
By default, sparse assumes a 64bit machine when compiled on x86-64
and 32bit when compiled on anything else.
This can of course create all sort of problems for the other archs, like
issuing false warnings ('shift too big (32) for type unsigned long'), or
worse, failing to emit legitimate warnings.
Fix this by adding the -m32/-m64 flag, depending on CONFIG_64BIT,
to CHECKFLAGS in the main Makefile (and so for all archs).
Also, remove the now unneeded -m32/-m64 in arch specific Makefiles.
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Prevent speculation at the syscall table decoding by clamping the index
used to zero on invalid system call numbers, and using the csdb
speculative barrier.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Add an implementation of the array_index_mask_nospec() function for
mitigating Spectre variant 1 throughout the kernel.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Add assembly and C macros for the new CSDB instruction.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Now that all our infrastructure is in place, let's expose the
availability of ARCH_WORKAROUND_2 to guests. We take this opportunity
to tidy up a couple of SMCCC constants.
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
In order to offer ARCH_WORKAROUND_2 support to guests, we need
a bit of infrastructure.
Let's add a flag indicating whether or not the guest uses
SSBD mitigation. Depending on the state of this flag, allow
KVM to disable ARCH_WORKAROUND_2 before entering the guest,
and enable it when exiting it.
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The reference to camera_supply_gpiod_table was added in the wrong function,
as observed from this randconfig build failure:
arch/arm/mach-pxa/ezx.c: In function 'e680_init':
arch/arm/mach-pxa/ezx.c:905:26: error: 'camera_supply_gpiod_table' undeclared (first use in this function)
gpiod_add_lookup_table(&camera_supply_gpiod_table);
Fixes: 6059577cb2 ("regulator: fixed: Convert to use GPIO descriptor only")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Report support for SMCCC_ARCH_WORKAROUND_1 to KVM guests for affected
CPUs.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
We want SMCCC_ARCH_WORKAROUND_1 to be fast. As fast as possible.
So let's intercept it as early as we can by testing for the
function call number as soon as we've identified a HVC call
coming from the guest.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Include Brahma B15 in the Spectre v2 KVM workarounds.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
In order to avoid aliasing attacks against the branch predictor
on Cortex-A15, let's invalidate the BTB on guest exit, which can
only be done by invalidating the icache (with ACTLR[0] being set).
We use the same hack as for A12/A17 to perform the vector decoding.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
In order to avoid aliasing attacks against the branch predictor,
let's invalidate the BTB on guest exit. This is made complicated
by the fact that we cannot take a branch before invalidating the
BTB.
We only apply this to A12 and A17, which are the only two ARM
cores on which this useful.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Warn at error level if the context switching function is not what we
are expecting. This can happen with big.Little systems, which we
currently do not support.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Add firmware based hardening for cores that require more complex
handling in firmware.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB or instruction cache on CPUs that are known to be
affected when taking an abort on a address that is outside of a user
task limit:
Cortex A8, A9, A12, A17, A73, A75: flush BTB.
Cortex A15, Brahma B15: invalidate icache.
If the IBE bit is not set, then there is little point to enabling the
workaround.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
When the branch predictor hardening is enabled, firmware must have set
the IBE bit in the auxiliary control register. If this bit has not
been set, the Spectre workarounds will not be functional.
Add validation that this bit is set, and print a warning at alert level
if this is not the case.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Harden the branch predictor against Spectre v2 attacks on context
switches for ARMv7 and later CPUs. We do this by:
Cortex A9, A12, A17, A73, A75: invalidating the BTB.
Cortex A15, Brahma B15: invalidating the instruction cache.
Cortex A57 and Cortex A72 are not addressed in this patch.
Cortex R7 and Cortex R8 are also not addressed as we do not enforce
memory protection on these cores.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Add a Kconfig symbol for CPUs which are vulnerable to the Spectre
attacks.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Add support for per-processor bug checking - each processor function
descriptor gains a function pointer for this check, which must not be
an __init function. If non-NULL, this will be called whenever a CPU
enters the kernel via which ever path (boot CPU, secondary CPU startup,
CPU resuming, etc.)
This allows processor specific bug checks to validate that workaround
bits are properly enabled by firmware via all entry paths to the kernel.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Check for CPU bugs when secondary processors are being brought online,
and also when CPUs are resuming from a low power mode. This gives an
opportunity to check that processor specific bug workarounds are
correctly enabled for all paths that a CPU re-enters the kernel.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Prepare the processor bug infrastructure so that it can be expanded to
check for per-processor bugs.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Add CPU part numbers for Cortex A53, A57, A72, A73, A75 and the
Broadcom Brahma B15 CPU.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Boot-tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Several source files have been taken from OpenSSL. In some of them a
comment that "permission to use under GPL terms is granted" was
included below a contradictory license statement. In several cases,
there was no indication that the license of the code was compatible
with the GPLv2.
This change clarifies the licensing for all of these files. I've
confirmed with the author (Andy Polyakov) that a) he has licensed the
files with the GPLv2 comment under that license and b) that he's also
happy to license the other files under GPLv2 too. In one case, the
file is already contained in his CRYPTOGAMS bundle, which has a GPLv2
option, and so no special measures are needed.
In all cases, the license status of code has been clarified by making
the GPLv2 license prominent.
The .S files have been regenerated from the updated .pl files.
This is a comment-only change. No code is changed.
Signed-off-by: Adam Langley <agl@chromium.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This reverts commit 3c6b38d45f "regulator: wm8994: Pass
descriptor instead of GPIO number" as it has problems with shared
GPIOs similar to that on s2mps11.
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Now that the ARM CCI PMU driver can be built as a loadable module,
we get a link failure when MCPM is enabled:
ERROR: "mcpm_is_available" [drivers/perf/arm-cci.ko] undefined!
The simplest fix is to export that helper function.
Fixes: 8b0c93c20e ("perf/arm-cci: Allow building as a module")
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
We augment the GPIO regulator to get the *enable* regulator
GPIO line (not the other lines) using a descriptor rather than
a global number.
We then pass this into the regulator core which has been
prepared to hande enable descriptors in a separate patch.
Switch over the two boardfiles using this facility and clean
up so we only pass descriptors around.
Cc: Philipp Zabel <philipp.zabel@gmail.com> # HX4700/Magician maintainer
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
As we augmented the regulator core to accept a GPIO descriptor instead
of a GPIO number, we can augment the fixed GPIO regulator to look up
and pass that descriptor directly from device tree or board GPIO
descriptor look up tables.
Some boards just auto-enumerate their fixed regulator platform devices
and I have assumed they get names like "fixed-regulator.0" but it's
pretty hard to guess this. I need some testing from board maintainers to
be sure. Other boards are straight forward, using just plain
"fixed-regulator" (ID -1) or "fixed-regulator.1" hammering down the
device ID.
The OMAP didn't have proper label names on its GPIO chips so I have fixed
this with a separate patch to the GPIO tree, see
commit 088413bc0b
"gpio: omap: Give unique labels to each GPIO bank/chip"
It seems the da9055 and da9211 has never got around to actually passing
any enable gpio into its platform data (not the in-tree code anyway) so we
can just decide to simply pass a descriptor instead.
The fixed GPIO-controlled regulator in mach-pxa/ezx.c was confusingly named
"*_dummy_supply_device" while it is a very real device backed by a GPIO
line. There is nothing dummy about it at all, so I renamed it with the
infix *_regulator_* as part of this patch set.
For the patch hunk hitting arch/blackfin I would say I do not expect
testing, review or ACKs anymore so if it works, it works.
The hunk hitting the x86 BCM43xx driver is especially tricky as the number
comes out of SFI which is a mystery to me. I definately need someone to
look at this. (Hi Andy.)
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Check the x86 BCM stuff
Cc: Alexander Shiyan <shc_work@mail.ru> # i.MX boards user
Cc: Haojian Zhuang <haojian.zhuang@gmail.com> # MMP2 maintainer
Cc: Aaro Koskinen <aaro.koskinen@iki.fi> # OMAP1 maintainer
Cc: Tony Lindgren <tony@atomide.com> # OMAP1,2,3 maintainer
Cc: Mike Rapoport <rppt@linux.vnet.ibm.com> # EM-X270 maintainer
Cc: Robert Jarzmik <robert.jarzmik@free.fr> # EZX maintainer
Cc: Philipp Zabel <philipp.zabel@gmail.com> # Magician maintainer
Cc: Daniel Mack <zonque@gmail.com> # Raumfeld maintainer
Cc: Marc Zyngier <marc.zyngier@arm.com> # Zeus maintainer
Cc: Geert Uytterhoeven <geert+renesas@glider.be> # SuperH pinctrl/GPIO maintainer
Cc: Russell King <rmk+kernel@armlinux.org.uk> # SA1100
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
It should be "#cooling-cells" instead of "cooling-cells". Fix it.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
* SoC
- Change platform dependency to ARCH_RENESAS
Geert Uytterhoeven says "The Renesas Fine Display Processor driver is
used on Renesas R-Car SoCs only. Since commit 9b5ba0df4e ("ARM:
shmobile: Introduce ARCH_RENESAS") is ARCH_RENESAS a more appropriate
platform dependency than the legacy ARCH_SHMOBILE, hence use the
former.
This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
future."
- Add the to Kconfig RZ/N1D (r9a06g032) SoC
In preparation for upstream support of this SoC
- Identify R-Car E3 (r8a77990) SoC
- Identify and add minimal support for RZ/G1C (r8a77470) SoC
* R-Car SYSC
- Add support for R-Car E3 (r8a77990) SoC
Shimoda-san says this adds:
+ "Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC,
A2VC1 and 3DG-{A,B} power domain areas..."
+ "workaround for 3DG-{A,B} of R-Car E3 ES1.0 because
the SoC has a restriction about the order."
- Remove unused inclusion of <linux/sys_soc.h>,
- Make r8a77995_areas[] const.
* R-Car Reset
- Add support for R-Car E3 (r8a77990) SoC
This driver is needed for the clock driver to work
* Debug-LL
- Add support for RZ/G1C (r8a77470) SoC
RZ/G1C uses SCIF1 for the debug console
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Merge tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Updates for v4.18
* SoC
- Change platform dependency to ARCH_RENESAS
This will allow to drop ARCH_SHMOBILE on ARM and ARM64 in the near
future.
- Add the to Kconfig RZ/N1D (r9a06g032) SoC
- Identify R-Car E3 (r8a77990) SoC
- Identify and add minimal support for RZ/G1C (r8a77470) SoC
* R-Car SYSC
- Add support for R-Car E3 (r8a77990) SoC
- Remove unused inclusion of <linux/sys_soc.h>,
- Make r8a77995_areas[] const.
* R-Car Reset
- Add support for R-Car E3 (r8a77990) SoC
* Debug-LL
- Add support for RZ/G1C (r8a77470) SoC
* tag 'renesas-soc-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}
soc: renesas: rcar-sysc: Add support for R-Car E3 power areas
arm: shmobile: Add the RZ/N1D (R9A06G032) to the shmobile Kconfig
arm: shmobile: Change platform dependency to ARCH_RENESAS
soc: renesas: r8a77995-sysc: Cleanups
soc: renesas: rcar-rst: Add support for R-Car E3
soc: renesas: Add r8a77990 SYSC PM Domain Binding Definitions
soc: renesas: identify R-Car E3
ARM: debug-ll: Add support for r8a77470
ARM: shmobile: Add the RZ/N1 arch to the shmobile Kconfig
ARM: shmobile: r8a77470: basic SoC support
soc: renesas: rcar-sysc: Add r8a77470 support
soc: renesas: rcar-rst: Add support for RZ/G1C
soc: renesas: Identify RZ/G1C
Signed-off-by: Olof Johansson <olof@lixom.net>
A few more fixes for v4.17:
- A fix for a crash in scm_call_atomic on qcom platforms
- Display fix for Allwinner A10
- A fix that re-enables ethernet on Allwinner H3 (C.H.I.P et al)
- A fix for eMMC corruption on hikey
- i2c-gpio descriptor tables for ixp4xx
+ a small typo fix
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A few more fixes for v4.17:
- a fix for a crash in scm_call_atomic on qcom platforms
- display fix for Allwinner A10
- a fix that re-enables ethernet on Allwinner H3 (C.H.I.P et al)
- a fix for eMMC corruption on hikey
- i2c-gpio descriptor tables for ixp4xx
... plus a small typo fix"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: Fix i2c-gpio GPIO descriptor tables
arm64: dts: hikey: Fix eMMC corruption regression
firmware: qcom: scm: Fix crash in qcom_scm_call_atomic1()
ARM: sun8i: v3s: fix spelling mistake: "disbaled" -> "disabled"
ARM: dts: sun4i: Fix incorrect clocks for displays
ARM: dts: sun8i: h3: Re-enable EMAC on Orange Pi One
* Enable in shmobile and multi_v7 defconfigs to give wider test coverage:
- Recently mainlined support for RZ/G1C (r8a77470) SoC
- Renesas Watchdog (RENESAS_WDT) which is used on
R-Car Gen2 and RZ/G1 platforms.
* Disable in shmobile and multi_v7 defconfigs to avoid unecessary bloat:
FB_SH_MOBILE_MERAM the last user of which was removed in v4.1 by
a521422ea4 ("ARM: shmobile: mackerel: Remove Legacy C board
code").
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Merge tag 'renesas-defconfig-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Renesas ARM Based SoC Defconfig Updates for v4.18
* Enable in shmobile and multi_v7 defconfigs to give wider test coverage:
- Recently mainlined support for RZ/G1C (r8a77470) SoC
- Renesas Watchdog (RENESAS_WDT) which is used on
R-Car Gen2 and RZ/G1 platforms.
* Disable in shmobile and multi_v7 defconfigs to avoid unecessary bloat:
FB_SH_MOBILE_MERAM the last user of which was removed in v4.1 by
a521422ea4 ("ARM: shmobile: mackerel: Remove Legacy C board
code").
* tag 'renesas-defconfig-for-v4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: multi_v7_defconfig: Enable RENESAS_WDT
ARM: shmobile: defconfig: Enable RENESAS_WDT_GEN
ARM: multi_v7_defconfig: Disable CONFIG_FB_SH_MOBILE_MERAM
ARM: shmobile: defconfig: Disable CONFIG_FB_SH_MOBILE_MERAM
ARM: multi_v7_defconfig: Enable r8a77470 SoC
ARM: shmobile: defconfig: Enable r8a77470 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
- small DT improvements without functional changes
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Merge tag 'at91-ab-4.18-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
AT91 DT for 4.18:
- small DT improvements without functional changes
* tag 'at91-ab-4.18-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91-sama5d2_xplained: Use IRQ_TYPE specifier
ARM: dts: at91: sama5d4ek: use canonical compatible for touchscreen
Signed-off-by: Olof Johansson <olof@lixom.net>
I used bad names in my clumsiness when rewriting many board
files to use GPIO descriptors instead of platform data. A few
had the platform_device ID set to -1 which would indeed give
the device name "i2c-gpio".
But several had it set to >=0 which gives the names
"i2c-gpio.0", "i2c-gpio.1" ...
Fix the offending instances in the ARM tree. Sorry for the
mess.
Fixes: b2e6355559 ("i2c: gpio: Convert to use descriptors")
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Simon Guinot <simon.guinot@sequanux.org>
Reported-by: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The patch that enabled these had no useful changelog that explains
why it is done, and it causes a build warning:
WARNING: unmet direct dependencies detected for STM32_DMA
Depends on [n]: DMADEVICES [=n] && (ARCH_STM32 [=y] || COMPILE_TEST [=y])
Selected by [y]:
- MACH_STM32MP157 [=y] && ARCH_STM32 [=y] && ARCH_MULTI_V7 [=y]
Generally, platforms should not select arbitrary drivers, so let's
just revert that change.
Fixes: de6037fa20 ("ARM: stm32: Select DMA, DMAMUX and MDMA support on STM32MP157C")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This series contains two omap1 ams-delta GPIO clean-up patches to get
started with removal of hard-coded GPIO numbers from drivers. And then
the removal of board mach includes from drivers. The second patch mostly
touches the ams-delta audio driver but is included here because of the
removal of the latch gpios and is acked by Mark Brown.
And there are two more am437x related PM patches to save and restore
control module and timer registers for RTC only suspend mode. Looks like
the patch title for the timer changes is a bit misleading, not all the
timer code is yet living under drivers/clocksource. But I had already
pushed out the branch before I noticed this.
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Merge tag 'omap-for-v4.18/soc-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Late omap soc changes for v4.18 merge window
This series contains two omap1 ams-delta GPIO clean-up patches to get
started with removal of hard-coded GPIO numbers from drivers. And then
the removal of board mach includes from drivers. The second patch mostly
touches the ams-delta audio driver but is included here because of the
removal of the latch gpios and is acked by Mark Brown.
And there are two more am437x related PM patches to save and restore
control module and timer registers for RTC only suspend mode. Looks like
the patch title for the timer changes is a bit misleading, not all the
timer code is yet living under drivers/clocksource. But I had already
pushed out the branch before I noticed this.
* tag 'omap-for-v4.18/soc-late-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
OMAP: CLK: CLKSRC: Add suspend resume hooks
ARM: AM43XX: Add functions to save/restore am43xx control registers
ASoC: ams_delta: use GPIO lookup table
ARM: OMAP1: ams-delta: add GPIO lookup tables
Signed-off-by: Olof Johansson <olof@lixom.net>
New hardware support added:
USB controllers for AST2400 and AST2500 which have drivers
merged in 4.18.
Hardware random number generator which we made enhancements to many
releases ago, but never added the device tree parts.
Misc changes to support watchdog and gpio-keys features used by
OpenBMC systems.
New machines:
Intel S2600WF, an Intel platform family with an ASPEED AST2500 BMC.
Inventec Lanyang, a Power 9 platform with AST2500.
Portwell Neptune, a x86 server development kit with an AST2500.
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Merge tag 'aspeed-4.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
ASPEED device tree updates for 4.18
New hardware support added:
USB controllers for AST2400 and AST2500 which have drivers
merged in 4.18.
Hardware random number generator which we made enhancements to many
releases ago, but never added the device tree parts.
Misc changes to support watchdog and gpio-keys features used by
OpenBMC systems.
New machines:
Intel S2600WF, an Intel platform family with an ASPEED AST2500 BMC.
Inventec Lanyang, a Power 9 platform with AST2500.
Portwell Neptune, a x86 server development kit with an AST2500.
* tag 'aspeed-4.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: Aspeed: Enable USB ports on eval board.
ARM: dts: Add Aspeed SoC USB controllers to device-tree
ARM: dts: aspeed: Add S2600WF BMC Machine
ARM: dts: aspeed: Add Inventec Lanyang BMC
ARM: dts: aspeed: Add Portwell Neptune machine
ARM: dts: aspeed: witherspoon: Set alternate boot
ARM: dts: aspeed: witherspoon: Add gpio keys for power supply presence
ARM: dts: aspeed: witherspoon: Enable checkstop and cooling gpio keys
ARM: dts: aspeed: zaius: Add pcie-e2b-present gpio key
ARM: dts: aspeed: romulus: Add id-button gpio key
ARM: dts: aspeed: Describe random number device
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner fixes for 4.17
Here is a bunch of fixes for merge issues, typos and wrong clocks being
described for simplefb, resulting in non-working displays.
* tag 'sunxi-fixes-for-4.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: v3s: fix spelling mistake: "disbaled" -> "disabled"
ARM: dts: sun4i: Fix incorrect clocks for displays
ARM: dts: sun8i: h3: Re-enable EMAC on Orange Pi One
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add support for audio over HDMI for Odroid X/X2/U3.
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Merge tag 'samsung-dt-4.18-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DTS ARM changes for v4.18, part 2
1. Add support for audio over HDMI for Odroid X/X2/U3.
* tag 'samsung-dt-4.18-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add support for audio over HDMI for Odroid X/X2/U3
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'berlin-dt-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin into next/dt
berlin DT changes for v4.18
* tag 'berlin-dt-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
ARM: dts: berlin2q: move PMU node from soc to root
ARM: dts: berlin*-dts: use SPDX-License-Identifier for berlin based board
ARM: dts: berlin*.dtsi: use SPDX-License-Identifier for berlin SoCs
ARM: dts: berlin2: fix irq type for arm twd timer
ARM: dts: berlin2q: fix irq type for arm twd timer
ARM: dts: berlin2q: add "cache-unified" to l2 node
ARM: dts: berlin2q: add interrupt-affinity to pmu node
ARM: dts: chromecast: use PWM for LEDs
ARM: dts: chromecast: override bad bootloader memory info
ARM: dts: berlin2cd: add Valve Steam Link board
ARM: dts: berlin2cd: add a label for the CPU node
ARM: dts: berlin2cd: add remaining nodes to apb subtrees
ARM: dts: berlin2cd: add remaining Cortex-A9 nodes
ARM: dts: berlin2cd: add ADC/thermal sensor node
ARM: dts: berlin2cd: move PMU node from soc to root
ARM: dts: berlin2cd: fix local timer interrupt flags
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove MACH_MESON8B, only used for building DTs
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Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT changes for v4.18, round 2
- remove MACH_MESON8B, only used for building DTs
* tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: meson: merge Kconfig symbol MACH_MESON8B into MACH_MESON8
ARM: dts: meson: build the Meson8b .dtbs with MACH_MESON8
Signed-off-by: Olof Johansson <olof@lixom.net>
The clocks for the 3 MMC controllers on pxa3xx platforms are CLK_MMC1,
CLK_MMC2 and CLK_MMC3. CLK_MMC is only for pxa2xx.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The PXA3xx series features some extended GPIO banks which are named GPIO0_2,
GPIO1_2 etc. The PXA300, PXA310 and PXA320 have different numbers of such
pins, and they also have variant-specific register offsets.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The PXA GPIO driver calls out to the pinctrl driver for claiming pins
unless the config has CONFIG_PINCTRL unset. IOW, if a pinctrl driver is
active, it must be visible to the GPIO driver.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This series of changes contains fixes for already queued tps65218
IRQ_TYPE, and fixes for omap3 and am335x use of IRQ_TYPE. There are
also addition of oscillator clock for logicpd omap3 boards and a series
of changes to improve support for am3517-evm board. And there is also
a change to configure WLAN for am437x-sk-evm.
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Merge tag 'omap-for-v4.18/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Second set of dts changes for omap variants for v4.18 merge window
This series of changes contains fixes for already queued tps65218
IRQ_TYPE, and fixes for omap3 and am335x use of IRQ_TYPE. There are
also addition of oscillator clock for logicpd omap3 boards and a series
of changes to improve support for am3517-evm board. And there is also
a change to configure WLAN for am437x-sk-evm.
* tag 'omap-for-v4.18/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (24 commits)
ARM: dts: am3517-evm: Add User LEDs and Pushbutton
ARM: dts: am3517-evm: Add I/O expander for User DIP switches and LEDS
ARM: dts: logicpd-som-lv: Fix Touchscreen controller
ARM: dts: am3517-som: Add Seiko Instruments RTC s35390a
ARM: dts: am437x-sk-evm: add wilink8 support
ARM: dts: am3517-evm: Add LCD panel type 15 support
ARM: dts: am3517-som: Associate cpu to regulator supply
ARM: dts: am3517-som: Add TI TPS65023 regulators
ARM: dts: am3517-evm: Split off SOM features from baseboard
ARM: dts: am3517: Add pinmuxing, CD and WP for MMC1
ARM: dts: logicpd-som-lv: Add fixed 26MHz clock as fck for twl
ARM: dts: logicpd-torpedo: Add fixed 26MHz clock as fck for twl
ARM: dts: omap3-pandora-common: Use IRQ_TYPE specifier
ARM: dts: am335x-boneblue: Use IRQ_TYPE specifier
ARM: dts: am335x-baltos.dtsi: Use IRQ_TYPE specifier
ARM: dts: am335x-baltos-ir5221: Use IRQ_TYPE specifier
ARM: dts: am335x-baltos-ir3220: Use IRQ_TYPE specifier
Revert "ARM: dts: am437x-sk-evm: Correct tps65218 irq type"
ARM: dts: am437x-epos-evm: Fixup (again) tps65218 irq type
ARM: dts: am437x-cm-t43: Fixup (again) tps65218 irq type
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This series mostly adds saving of power and clock domain registers for
am335x/am437x suspend to RTC only mode. There is also a non-urgent fix
for omap4 PM where we could end up losing GPIO interrupts if bootloader
has LOGICRETSTATE cleared for domains. And there is a clean-up patch for
omap1 to use device properties for at24 eeprom.
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Merge tag 'omap-for-v4.18/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omap variants for v4.18 merge window
This series mostly adds saving of power and clock domain registers for
am335x/am437x suspend to RTC only mode. There is also a non-urgent fix
for omap4 PM where we could end up losing GPIO interrupts if bootloader
has LOGICRETSTATE cleared for domains. And there is a clean-up patch for
omap1 to use device properties for at24 eeprom.
* tag 'omap-for-v4.18/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Make sure LOGICRETSTATE bits are not cleared
ARM: OMAP2+: prm44xx: Inroduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: prm44xx: Introduce context save/restore for am43 PRCM IO
ARM: OMAP2+: powerdomain: Introduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: Add functions to save and restore powerdomain context
ARM: OMAP2+: clockdomain: Inroduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: Add functions to save and restore clockdomain context en-masse.
ARM: omap1: osk: use device properties for at24 eeprom
Signed-off-by: Olof Johansson <olof@lixom.net>
The A83t, unlike the other Allwinner SoCs, cannot use PSCI because of a
silicon bug. As such, we needed to have some smp_ops in order to bringup
the various cores (and clusters) found on this SoC.
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Merge tag 'sunxi-core-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Allwinner core changes for 4.18
The A83t, unlike the other Allwinner SoCs, cannot use PSCI because of a
silicon bug. As such, we needed to have some smp_ops in order to bringup
the various cores (and clusters) found on this SoC.
* tag 'sunxi-core-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: smp: Add support for A83T
ARM: sun9i: smp: Add is_a83t field
ARM: sun9i: smp: Rename clusters's power-off
ARM: shmobile: Convert file to use cntvoff
ARM: sunxi: Add initialization of CNTVOFF
ARM: smp: Add initialization of CNTVOFF
ARM: sunxi: smp: Move assembly code into a file
ARM: Allow this header to be included by assembly files
Signed-off-by: Olof Johansson <olof@lixom.net>
Here is our usual bunch of changes for the H3 and H5 SoCs that share the
same SoC design but with different CPUs.
This time, most of the changes are about supporting CPUFreq on these SoCs,
with voltage scaling being enabled for a number of boards.
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Merge tag 'sunxi-h3-h5-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3/H5 support for 4.18
Here is our usual bunch of changes for the H3 and H5 SoCs that share the
same SoC design but with different CPUs.
This time, most of the changes are about supporting CPUFreq on these SoCs,
with voltage scaling being enabled for a number of boards.
* tag 'sunxi-h3-h5-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: h3: Add SY8106A regulator to Orange Pi PC
arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.
arm64: dts: allwinner: Sort dtb entries in Makefile
arm64: dts: allwinner: h5: Add cpu0 label for first cpu
ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.
ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile
arm: dts: sun8i: h3: libretech-all-h3-cc: Move board definition to common dtsi
ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage
ARM: dts: sun8i: h3: set the cpu-supply to VDD-CPUX on ALL-H3-CC H3 ver
ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VDD-CPUX voltage
ARM: dts: sun8i: h3: add SY8113B regulator used by Orange Pi One board
ARM: dts: sun8i: h2+: add SY8113B regulator used by Orange Pi Zero board
ARM: dts: sun8i: h3: add operating-points-v2 table for CPU
ARM: dts: sunxi: h3/h5: Add r_i2c I2C controller
ARM: dts: sunxi: h3/h5: Add r_i2c pinmux node
Signed-off-by: Olof Johansson <olof@lixom.net>
Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
- MIPI-DSI support for the A33
- NAND support for the A33
- SMP support for the A83t
- GMAC support for the R40
- And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
Classic
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Merge tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT additions for 4.18
Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
- MIPI-DSI support for the A33
- NAND support for the A33
- SMP support for the A83t
- GMAC support for the R40
- And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
Classic
* tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC
ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
ARM: dts: sun8i: a83t: Add CCI-400 node
ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi
ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
ARM: dts: sun8i: a23/a33: declare NAND pins
ARM: dts: sunxi: Add sid for a83t
ARM: dts: sun8i: a33: Add the DSI-related nodes
ARM: dts: sunxi: Change sun7i-a20-olimex-som204-evb to not use cd-inverted
ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
Signed-off-by: Olof Johansson <olof@lixom.net>
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
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Merge tag 'imx-defconfig-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig update for 4.18:
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
* tag 'imx-defconfig-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select CONFIG_GPIO_MAX732X by default
ARM: imx_v6_v7_defconfig: enable imx6sll by default
ARM: imx_v6_v7_defconfig: enable Vybrid OCOTP driver
ARM: imx_v6_v7_defconfig: add mwifiex driver
ARM: imx_v6_v7_defconfig: add RN5T618 PMIC family support
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
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Merge tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.18:
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
* tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (72 commits)
ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source
ARM: dts: imx51-zii-rdu1: cleanup eMMC node
ARM: dts: vf610-zii-dev: enable vf610 builtin temp sensor
ARM: dts: imx7d: use operating-points-v2 for cpu
ARM: dts: imx7s-warp: remove unnecessary cpu regulator supply
ARM: dts: imx7d: correct cpu supply name for voltage scaling
ARM: dts: imx51-zii-rdu1: limit usbh1 to full-speed
ARM: dts: imx6/7: Remove unit-address from anatop regulators
ARM: dts: imx: Switch NXP boards to SPDX identifier
ARM: dts: imx6qdl-phytec-pfla02: Use IRQ_TYPE specifier
ARM: dts: imx53-voipac-dmm-668: Use IRQ_TYPE specifier
ARM: dts: imx53-qsb: Use IRQ_TYPE specifier
ARM: dts: vf-colibri-eval-v3: Use IRQ_TYPE specifier
ARM: dts: imx6q-gk802: Do not hardcode input codes
ARM: dts: imx53-smd: Do not hardcode input codes
ARM: dts: imx53-ard: Do not hardcode input codes
ARM: dts: imx7: Fix error in coresight TPIU graph connection
ARM: dts: imx53: Fix LDB OF graph warning
ARM: dts: imx: fix IPU OF graph endpoint node names
ARM: dts: imx: Switch to SPDX identifier
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
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Merge tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.18:
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
* tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: select imx6sll pinctrl when imx6sll enabled
ARM: imx: pcm037: use device properties for at24 eeprom
ARM: imx: pca100: use device properties for at24 eeprom
ARM: imx: pcm043: use device properties for at24 eeprom
ARM: imx: vpr200: drop at24_platform_data
ARM: imx: Update spi_imx platform data to reflect current state
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the common data for all dk07 based boards.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the common parts for the dk04 boards.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The max opp frequency is 716MHZ. So update that.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Now with the driver updates for some peripherals being there,
add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available
peripheral support.
Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add a 'chosen' node to select the serial console.
This is needed when bootloaders do not pass the
'console=' bootargs.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The PXA3xx SoCs feature dedicated pins for wakeup functionality. These pins
have no alternate functions, so let's always enable them as wakeup source on
DT enabled boards. The WAKEUP1 pin is only available on PXA320.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
We want to work towards phasing out the at24_platform_data structure.
There are few users and its contents can be represented using generic
device properties. Using device properties only will allow us to
significantly simplify the at24 configuration code.
Remove the at24_platform_data structure and replace it with an array
of property entries. Drop the byte_len/size property, as the model name
already implies the EEPROM's size.
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
- Update 32-bit Marvell EBU NAND DT nodes with new bindings
- Add NAND pinctrl information for the Armada 98DX3236 and variants
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Merge tag 'mvebu-dt-4.18-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.18 (part 1)
- Update 32-bit Marvell EBU NAND DT nodes with new bindings
- Add NAND pinctrl information for the Armada 98DX3236 and variants
* tag 'mvebu-dt-4.18-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-xp-98dx: Add NAND pinctrl information
ARM: dts: armada-39x: update NAND node with new bindings
ARM: dts: armada-38x: update NAND node with new bindings
ARM: dts: armada-375: update NAND node with new bindings
ARM: dts: armada-370-xp: update NAND node with new bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as
well as IOMMU enablement for various devices on Tegra30 and Tegra30.
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Merge tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.18-rc1
Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as
well as IOMMU enablement for various devices on Tegra30 and Tegra30.
* tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra114: Add IOMMU nodes to Host1x and its clients
ARM: dts: tegra30: Add IOMMU nodes to Host1x and its clients
ARM: tegra: apalis-tk1: Fix high speed UART compatible
Signed-off-by: Olof Johansson <olof@lixom.net>
Contains a single patch that instantiates a platform device for the CPU
frequency driver.
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Merge tag 'tegra-for-4.18-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
ARM: tegra: Core changes for v4.18-rc1
Contains a single patch that instantiates a platform device for the CPU
frequency driver.
* tag 'tegra-for-4.18-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Create platform device for tegra20-cpufreq driver
Signed-off-by: Olof Johansson <olof@lixom.net>
* DA850 EVM gains USB support, SD card write-protect, card detect
and some clean-up
* Support for gpio-ranges makes using gpios from DT much easier
* Lego EV3 clean-up
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Merge tag 'davinci-for-v4.18/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
DaVinci device-tree updates for v4.18
* DA850 EVM gains USB support, SD card write-protect, card detect
and some clean-up
* Support for gpio-ranges makes using gpios from DT much easier
* Lego EV3 clean-up
* tag 'davinci-for-v4.18/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-evm: add WP and CD to MMC
ARM: dts: da850-lego-ev3: remove unnecessary gpio-keys properties
ARM: dts: da850-evm: use phandles to extend nodes
ARM: dts: da850: use gpio-ranges
ARM: dts: da850-evm: Enable usb_phy, usb0 and usb1
Signed-off-by: Olof Johansson <olof@lixom.net>
Mainly contains patches to move NAND chipselect to platform data
(currently platform device id is being used). These patches have
been acked by NAND maintainer and because of the driver dependency
an immutable branch has been provided to Boris.
The other patch is to remove an unnecessary postcore_initcall() on
DM644x which is needed for common clock framework conversion.
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Merge tag 'davinci-for-v4.18/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
DaVinci SoC support updates for v4.18
Mainly contains patches to move NAND chipselect to platform data
(currently platform device id is being used). These patches have
been acked by NAND maintainer and because of the driver dependency
an immutable branch has been provided to Boris.
The other patch is to remove an unnecessary postcore_initcall() on
DM644x which is needed for common clock framework conversion.
* tag 'davinci-for-v4.18/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: dm644x: remove unnecessary postcore_initcall()
ARM: davinci: aemif: stop using pdev->id as nand chipselect
mtd: rawnand: davinci: stop using pdev->id as chipselect
ARM: davinci: neuros-osd2: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm646x-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: mityomapl138: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm644x-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm365-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm355-leopard: specify the chipselect in davinci_nand_pdata
ARM: davinci: dm355-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: da850-evm: specify the chipselect in davinci_nand_pdata
ARM: davinci: da830-evm: specify the chipselect in davinci_nand_pdata
mtd: rawnand: davinci: store the core chipselect number in platform data
Signed-off-by: Olof Johansson <olof@lixom.net>
- add support for meson8m2 SoC
- new board: Tronsmart MXIII Plus using meson8m2 SoC
- odroid-c1: add IR
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Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT updates for v4.18
- add support for meson8m2 SoC
- new board: Tronsmart MXIII Plus using meson8m2 SoC
- odroid-c1: add IR
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8m2: add support for the Tronsmart MXIII Plus
ARM: dts: meson8: add the uart_A pins
ARM: dts: meson: add support for the Meson8m2 SoC
ARM: meson: add support for the Meson8m2 SoCs
ARM: dts: meson8b: odroid-c1: enable the IR receiver
ARM: dts: meson8b: odroid-c1: sort nodes alphabetically
ARM: dts: meson8b: add the cortex-a5-pmu compatible PMU
ARM: dts: meson8: add the cortex-a9-pmu compatible PMU
Signed-off-by: Olof Johansson <olof@lixom.net>
This new attribute allows the userspace to set the base address
of a reditributor region, relaxing the constraint of having all
consecutive redistibutor frames contiguous.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Now that the host SVE context can be saved on demand from Hyp,
there is no longer any need to save this state in advance before
entering the guest.
This patch removes the relevant call to
kvm_fpsimd_flush_cpu_state().
Since the problem that function was intended to solve now no longer
exists, the function and its dependencies are also deleted.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds SVE context saving to the hyp FPSIMD context switch
path. This means that it is no longer necessary to save the host
SVE state in advance of entering the guest, when in use.
In order to avoid adding pointless complexity to the code, VHE is
assumed if SVE is in use. VHE is an architectural prerequisite for
SVE, so there is no good reason to turn CONFIG_ARM64_VHE off in
kernels that support both SVE and KVM.
Historically, software models exist that can expose the
architecturally invalid configuration of SVE without VHE, so if
this situation is detected at kvm_init() time then KVM will be
disabled.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch refactors KVM to align the host and guest FPSIMD
save/restore logic with each other for arm64. This reduces the
number of redundant save/restore operations that must occur, and
reduces the common-case IRQ blackout time during guest exit storms
by saving the host state lazily and optimising away the need to
restore the host state before returning to the run loop.
Four hooks are defined in order to enable this:
* kvm_arch_vcpu_run_map_fp():
Called on PID change to map necessary bits of current to Hyp.
* kvm_arch_vcpu_load_fp():
Set up FP/SIMD for entering the KVM run loop (parse as
"vcpu_load fp").
* kvm_arch_vcpu_ctxsync_fp():
Get FP/SIMD into a safe state for re-enabling interrupts after a
guest exit back to the run loop.
For arm64 specifically, this involves updating the host kernel's
FPSIMD context tracking metadata so that kernel-mode NEON use
will cause the vcpu's FPSIMD state to be saved back correctly
into the vcpu struct. This must be done before re-enabling
interrupts because kernel-mode NEON may be used by softirqs.
* kvm_arch_vcpu_put_fp():
Save guest FP/SIMD state back to memory and dissociate from the
CPU ("vcpu_put fp").
Also, the arm64 FPSIMD context switch code is updated to enable it
to save back FPSIMD state for a vcpu, not just current. A few
helpers drive this:
* fpsimd_bind_state_to_cpu(struct user_fpsimd_state *fp):
mark this CPU as having context fp (which may belong to a vcpu)
currently loaded in its registers. This is the non-task
equivalent of the static function fpsimd_bind_to_cpu() in
fpsimd.c.
* task_fpsimd_save():
exported to allow KVM to save the guest's FPSIMD state back to
memory on exit from the run loop.
* fpsimd_flush_state():
invalidate any context's FPSIMD state that is currently loaded.
Used to disassociate the vcpu from the CPU regs on run loop exit.
These changes allow the run loop to enable interrupts (and thus
softirqs that may use kernel-mode NEON) without having to save the
guest's FPSIMD state eagerly.
Some new vcpu_arch fields are added to make all this work. Because
host FPSIMD state can now be saved back directly into current's
thread_struct as appropriate, host_cpu_context is no longer used
for preserving the FPSIMD state. However, it is still needed for
preserving other things such as the host's system registers. To
avoid ABI churn, the redundant storage space in host_cpu_context is
not removed for now.
arch/arm is not addressed by this patch and continues to use its
current save/restore logic. It could provide implementations of
the helpers later if desired.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds a DTS file for Sony Xperia Z1 Compact with support for
regulators, serial UART, eMMC/SD-card, USB, charger, backlight,
coincell and buttons.
Work based on arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts.
Signed-off-by: Attila Szöllősi <ata2001@airmail.cc>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This enables both USB ports as host with EHCI and UHCI
attached to them.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the USB controllers to the DT template of the
AST24xx and AST25xx SoCs.
This patch doesn't enable them by default on any board specific
.dts yet. This will be done when we have the necessary clock/reset
and pinmux support. In the meantime though, this will work if
u-boot configures things properly.
For the AST2400 I only added pinmux definition for port 1
which is dual USB1/USB2. There are additional USB1 only ports
that might require more work but I don't have HW to test at
hand so I'm leaving that to whoever cares.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
S2600WF is a Intel platform family with an ASPEED AST2500 BMC.
Signed-off-by: James Feist <james.feist@linux.intel.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The Inventec Lanyang is Power 9 platform with ast2500 BMC.
Signed-off-by: Brian Yang <yang.brianc.w@inventec.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Initial introduction of Portwell Neptune family equipped with
Aspeed 2500 BMC SoC. Neptune is a x86 server development kit with a
ASPEED ast2500 BMC manufactured by Portwell. Specifically, This
adds the neptune platform device tree file including the flash
layout used by the neptune machines.
Signed-off-by: Amithash Prasad <amithash@fb.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Set watchdog 2 to boot from the alternate flash chip when the watchdog
timer expires and the system is reset. This enables "brick protection."
Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable gpio-keys events for the checkstop and water/air cooled
gpios for use by applications on the Witherspoon system.
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add GPIO key to check presence of PCIE E2B.
Signed-off-by: Lei YU <mine260309@gmail.com>
Acked-by: Xo Wang <xow@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This reverts the following commits that change CMA design in MM.
3d2054ad8c ("ARM: CMA: avoid double mapping to the CMA area if CONFIG_HIGHMEM=y")
1d47a3ec09 ("mm/cma: remove ALLOC_CMA")
bad8c6c0b1 ("mm/cma: manage the memory of the CMA area by using the ZONE_MOVABLE")
Ville reported a following error on i386.
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
microcode: microcode updated early to revision 0x4, date = 2013-06-28
Initializing CPU#0
Initializing HighMem for node 0 (000377fe:00118000)
Initializing Movable for node 0 (00000001:00118000)
BUG: Bad page state in process swapper pfn:377fe
page:f53effc0 count:0 mapcount:-127 mapping:00000000 index:0x0
flags: 0x80000000()
raw: 80000000 00000000 00000000 ffffff80 00000000 00000100 00000200 00000001
page dumped because: nonzero mapcount
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 4.17.0-rc5-elk+ #145
Hardware name: Dell Inc. Latitude E5410/03VXMC, BIOS A15 07/11/2013
Call Trace:
dump_stack+0x60/0x96
bad_page+0x9a/0x100
free_pages_check_bad+0x3f/0x60
free_pcppages_bulk+0x29d/0x5b0
free_unref_page_commit+0x84/0xb0
free_unref_page+0x3e/0x70
__free_pages+0x1d/0x20
free_highmem_page+0x19/0x40
add_highpages_with_active_regions+0xab/0xeb
set_highmem_pages_init+0x66/0x73
mem_init+0x1b/0x1d7
start_kernel+0x17a/0x363
i386_start_kernel+0x95/0x99
startup_32_smp+0x164/0x168
The reason for this error is that the span of MOVABLE_ZONE is extended
to whole node span for future CMA initialization, and, normal memory is
wrongly freed here. I submitted the fix and it seems to work, but,
another problem happened.
It's so late time to fix the later problem so I decide to reverting the
series.
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Laura Abbott <labbott@redhat.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds support of external interrupt for
gpio[a..k], gpioz
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This patch adds external interrupt (exti) support
on stm32mp157c SoC.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Follow the recent trend for the license description, and also fix the
wrongly stated X11 to MIT.
As already pointed on the DT ML, the X11 license text [1] is explicitly
for the X Consortium and has a couple of extra clauses. The MIT
license text [2] is actually what the current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
fix below warning about PPI interrupts configuration:
"GIC: PPI13 is secure or misconfigured"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
fix below warning about PPI interrupts configuration:
"GIC: PPI13 is secure or misconfigured"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Without this property, we get this boot warning:
"L2C: device tree omits to specify unified cache"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Control the Chromecast's two LEDs using PWM instead of GPIO pins. This
allows for variable brightness.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
On the Chromecast, the bootloader provides us with an ATAG_MEM of
start=0x01000000 and size=0x3eff8000. This is clearly incorrect, as the
range given encompasses nearly a GiB but the Chromecast only has 512MiB
of RAM! Additionally, this causes the kernel to be decompressed at
0x00008000, below the claimed beginning of RAM, and so the boot fails.
Since the existing ATAG parsing code runs before the kernel is even
decompressed and irrevocably patches the device tree, don't even try
to bypass it. Instead, use the "linux,usable-memory" property instead
of the "reg" property to define the real range. The ATAG code only
overwrites reg, but linux,usable-memory is checked first in the OF
driver, so the fact that reg gets changed makes no difference.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Valve Steam Link is a consumer device built around the Marvell BG2CD SoC.
This board file enables the UART, USB and Ethernet interfaces as well as
internal I2C and SDIO, and adds SoC voltage regulator and board-specific
GPIO restart method info.
Cc: Sam Lantinga <saml@valvesoftware.com>
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This is useful if the board file needs to reference it.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This adds most of the remaining Designware IP cores under APB trees in
the interest of documenting assignment of interrupts and memory ranges.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
This adds DT nodes for the Cortex-A9 MPCore SCU, local watchdog and
most importantly the global timer.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Cortex-A9 PMU has no associated memory ranges and "make dtbs W=1" warns
about missing reg or ranges property. To avoid the warning, move the PMU
node out of soc subtree to the root.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Use the correct trigger type for Cortex-A9. This was fixed for several
other SoCs since the kernel started issuing a boot-time warning.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
I believe the flush_cache_all() after scu_enable() is to "Ensure that
the data accessed by CPU0 before the SCU was initialised is visible
to the other CPUs." as commented in scu_enable(). So here
flush_cache_all() is a duplication, remove it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
BG2CD SoC uses r3p0 Cortex-A9 MPCore single-CPU cluster. Autoselect
pertinent errata, the SCU and the global timer, and allow use of the
local timer on uniprocessor kernels.
PL310 L2 cache controller has revision r3p2; no errata to select.
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Add the save and restore for clksrc as part of suspend and resume
so that it saves the counter value and restores. This is needed in
modes like rtc+ddr in self-refresh not doing this stalls the time.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These registers are part of the wkup domain and are lost during RTC only
suspend and also hibernation, so storing/restoring their state is
necessary.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now as the Amstrad Delta board provides GPIO lookup tables, switch from
GPIO numbers to GPIO descriptors and use the table to locate required
GPIO pins.
The card uses two pins, one for jack and the other for voice modem
codec DAI control.
For jack pin, remove hardcoded GPIO number and use GPIO descriptor
based variant of jack GPIO initialization.
For modem_codec pin, declare static variable for storing its GPIO
descriptor, obtain it on card initialization and replace obsolete
ams_delta_latch2_write() with gpiod_set_value(). For that to work,
don't request the modem_codec pin from the board init code anymore.
If the modem_codec GPIO lookup fails, skip initialization of
functionality of the card which depends on its availability.
Pin naming used by the driver should be followed while respective GPIO
lookup table is initialized by a board init code.
Created and tested against linux-4.17-rc3, on top of patch 1/6 "ARM:
OMAP1: ams-delta: add GPIO lookup tables"
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Scope of the change is limited to GPIO pins used by board specific
device drivers which will be updated by follow-up patches of the
series. Those are some OMAP GPIO (gpio-0-15) and most of Amstrad Delta
latch2 GPIO bank pins. Remaining pins of those banks, as well as
Amstrad Delta latch1 pins, will be addressed later.
Assign a label ("latch2") to the bank, enumerate its pins and put that
information, together with OMAP GPIO bank pins, in GPIO lookup tables.
Assign lookup tables to devices as soon as those devices are registered
and their names can be obtained.
A step froward in:
- removal of hard-coded GPIO numbers from drivers,
- removal of board mach includes from drivers,
- switching to dynamically assigned GPIO numbers.
Created and compile tested agains linux-4.17-rc3
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently there are no differences between the MACH_MESON8 and
MACH_MESON8B Kconfig symbols (except the help text). Since both
platforms are very similar (Meson8b being a slightly updated,
cost-reduced version of Meson8 which even shares some peripherals with
Meson8m2) no notable differences are expected in the future either.
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Currently there are two identical Kconfig options where only differences
are the Kconfig help text and the list of .dtbs that are built:
- MACH_MESON8
- MACH_MESON8B
Build the Meson8b .dtbs when MACH_MESON8 is selected to get rid of the
latter Kconfig symbol later.
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
S390 bpf_jit.S is removed in net-next and had changes in 'net',
since that code isn't used any more take the removal.
TLS data structures split the TX and RX components in 'net-next',
put the new struct members from the bug fix in 'net' into the RX
part.
The 'net-next' tree had some reworking of how the ERSPAN code works in
the GRE tunneling code, overlapping with a one-line headroom
calculation fix in 'net'.
Overlapping changes in __sock_map_ctx_update_elem(), keep the bits
that read the prog members via READ_ONCE() into local variables
before using them.
Signed-off-by: David S. Miller <davem@davemloft.net>
The arm_pmu::handle_irq() callback has the same prototype as a generic
IRQ handler, taking the IRQ number and a void pointer argument which it
must convert to an arm_pmu pointer.
This means that all arm_pmu::handle_irq() take an IRQ number they never
use, and all must explicitly cast the void pointer to an arm_pmu
pointer.
Instead, let's change arm_pmu::handle_irq to take an arm_pmu pointer,
allowing these casts to be removed. The redundant IRQ number parameter
is also removed.
Suggested-by: Hoeun Ryu <hoeun.ryu@lge.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
With the new rev.E of A20-SOM-EVB, there is option for 16GB eMMC.
Currently used card is KLMAG2GEND, wired to MMC2 slot.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Pull ARM fixes from Russell King:
- Łukasz Stelmach spotted a couple of issues with the decompressor.
- a couple of kdump fixes found while testing kdump
- replace some perl with shell code
- resolve SIGFPE breakage
- kprobes fixes
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: fix kill( ,SIGFPE) breakage
ARM: 8772/1: kprobes: Prohibit kprobes on get_user functions
ARM: 8771/1: kprobes: Prohibit kprobes on do_undefinstr
ARM: 8770/1: kprobes: Prohibit probing on optimized_callback
ARM: 8769/1: kprobes: Fix to use get_kprobe_ctlblk after irq-disabed
ARM: replace unnecessary perl with sed and the shell $(( )) operator
ARM: kexec: record parent context registers for non-crash CPUs
ARM: kexec: fix kdump register saving on panic()
ARM: 8758/1: decompressor: restore r1 and r2 just before jumping to the kernel
ARM: 8753/1: decompressor: add a missing parameter to the addruart macro
The touchscreen driver no longer configures the device as wakeup source by
default. A "wakeup-source" property is needed.
To avoid regressions, this patch changes the DTS files for the only two
users of this driver that didn't have this property yet.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On RDU1, sdhc1 is used for eMMC, and that is 3.3V only.
Thus configure device node not to probe it as SD/SDIO and not try 1.8V.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vybrid has single internal temperature sensor connected to both internal
ADC modules.
vf610-zii-dev already has ADC0 enabled. Now, to get temperature sensor
captured by iio_hwmon driver, need to configure iio_hwmon node to use
that ADC.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch uses "operating-points-v2" instead of
"operating-points" to be more fit with cpufreq-dt
driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7S does NOT support CPU frequency scaling, so no
need to specify the CPU regulator supply.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Correct CPU supply name to meet cpufreq-dt driver's
requirement for voltage scaling.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On RDU1, imx51 usbh1 interface is either not used, or used via external
block that breaks USB2 signalling.
To keep things working if high-speed device gets connected to that
block, use ChipIdea feature to limit port to full speed.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove unit-address and reg property from anatop regulators to fix
the following DTC warnings with W=1:
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
A handful of fixes. I've been queuing them up a bit too long so the list
is longer than it otherwise would have been spread out across a few -rcs.
In general, it's a scattering of fixes across several platforms, nothing
truly serious enough to point out.
There's a slightly larger batch of them for the Davinci platforms due
to work to bring them back to life after some time, so there's a handful
of regressions, some of them going back very far, others more recent.
There's also a few patches fixing DT on Renesas platforms since they
changed some bindings without remaining backwards compatible, splitting
up describing LVDS as a proper bridge instead of having it as part of the
display unit. We could push for them to be backwards compatible with old
device trees, but it's likely to regress eventually if nobody's actually
using said compatibility.
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A handful of fixes. I've been queuing them up a bit too long so the
list is longer than it otherwise would have been spread out across a
few -rcs.
In general, it's a scattering of fixes across several platforms,
nothing truly serious enough to point out.
There's a slightly larger batch of them for the Davinci platforms due
to work to bring them back to life after some time, so there's a
handful of regressions, some of them going back very far, others more
recent.
There's also a few patches fixing DT on Renesas platforms since they
changed some bindings without remaining backwards compatible,
splitting up describing LVDS as a proper bridge instead of having it
as part of the display unit.
We could push for them to be backwards compatible with old device
trees, but it's likely to regress eventually if nobody's actually
using said compatibility"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (36 commits)
ARM: davinci: board-dm646x-evm: set VPIF capture card name
ARM: davinci: board-dm646x-evm: pass correct I2C adapter id for VPIF
ARM: davinci: dm646x: fix timer interrupt generation
ARM: keystone: fix platform_domain_notifier array overrun
arm64: dts: exynos: Fix interrupt type for I2S1 device on Exynos5433
ARM: dts: imx51-zii-rdu1: fix touchscreen bindings
firmware: arm_scmi: Use after free in scmi_create_protocol_device()
ARM: dts: cygnus: fix irq type for arm global timer
Revert "ARM: dts: logicpd-som-lv: Fix pinmux controller references"
tee: check shm references are consistent in offset/size
tee: shm: fix use-after-free via temporarily dropped reference
ARM: dts: imx7s: Pass the 'fsl,sec-era' property
ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
ARM: dts: correct missing "compatible" entry for ti81xx SoCs
ARM: OMAP1: ams-delta: fix deferred_fiq handler
arm64: tegra: Make BCM89610 PHY interrupt as active low
ARM: davinci: fix GPIO lookup for I2C
ARM: dts: logicpd-som-lv: Fix pinmux controller references
ARM: dts: logicpd-som-lv: Fix Audio Mute
ARM: dts: logicpd-som-lv: Fix WL127x Startup Issues
...
Commit 7771c66457 ("signal/arm: Document conflicts with SI_USER and
SIGFPE") broke the siginfo structure for userspace triggered signals,
causing the strace testsuite to regress. Fix this by eliminating
the FPE_FIXME definition (which is at the root of the breakage) and
use FPE_FLTINV instead for the case where the hardware appears to be
reporting nonsense.
Fixes: 7771c66457 ("signal/arm: Document conflicts with SI_USER and SIGFPE")
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Russell King
Wang YanQing
Linus Torvalds
David S. Miller
Olof Johansson
Joel Stanley
Anson Huang
Marc Orr
Paolo Bonzini
Luc Van Oostenryck
Catalin Marinas
Marc Zyngier
Arnd Bergmann
Adam Langley
Mark Brown
Linus Walleij
Viresh Kumar
Daniel Mack
Sricharan R
Bartosz Golaszewski
Eric Auger
Dave Martin
Attila Szöllősi
Benjamin Herrenschmidt
James Feist
Brian Yang
Amithash Prasad
Eddie James
Christopher Bostic
Brad Bishop
Lei YU
Joonsoo Kim
Ludovic Barre
Jisheng Zhang
Thomas Hebb
Alexander Monakov
Keerthy
Tero Kristo
Janusz Krzysztofik
Martin Blumenstingl
Tony Lindgren
Mark Rutland
Stefan Mavrodiev
Nikita Yushchenko
Fabio Estevam