Rename SD3 functions and groups to EMMC to better reflect their intended
use before the binding escapes too far into the wild. Also clean up the
SD3 pin groups to eliminate some silliness that slipped through the
cracks (SD3DAT[4-7]) by unifying them into three new groups: EMMCG1,
EMMCG4 and EMMCG8 for 1, 4 and 8-bit data buses respectively.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20191008044153.12734-2-andrew@aj.id.au
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the documentation for this new driver for pin configuration
with the pinctrl framework on MSM8976/56 and its APQ variants.
Link: https://lore.kernel.org/r/20191005105936.31216-3-kholk11@gmail.com
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for the PM6150 and PM6150L GPIO support to the
Qualcomm PMIC GPIO binding.
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Link: https://lore.kernel.org/r/1570188039-22122-1-git-send-email-kgunda@codeaurora.org
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As there is only one item "st,syscfg" this commit moves phandle description
fields under "description" tag. It'll fix a validation issue seen during
stm32 DT check.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
cycle:
Core changes:
- Fix errors in example code in the documentation.
New drivers:
- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to
the Ingenic driver.
- Support Cirrus Logic Madera CS47L92 and CS47L15.
- Support Allwinner Sunxi V3S.
- Support Aspeed 2600 BMC.
- Support Qualcomm SC7180.
- Support Marvell MVEBU CS115.
Driver improvements:
- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.
- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.
- Support suspend/resume in the Tegra driver.
- Support pull-up on the Broadcom BCM2711.
- The Intel driver can now request locked pads.
- Fix the UFS reset pin in the Qualcomm SDM845 driver.
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Merge tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.4 kernel cycle:
Core changes:
- Fix errors in example code in the documentation.
New drivers:
- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the
Ingenic driver.
- Support Cirrus Logic Madera CS47L92 and CS47L15.
- Support Allwinner Sunxi V3S.
- Support Aspeed 2600 BMC.
- Support Qualcomm SC7180.
- Support Marvell MVEBU CS115.
Driver improvements:
- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.
- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.
- Support suspend/resume in the Tegra driver.
- Support pull-up on the Broadcom BCM2711.
- The Intel driver can now request locked pads.
- Fix the UFS reset pin in the Qualcomm SDM845 driver"
* tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c
pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()
pinctrl: bcm: remove redundant assignment to pointer log
pinctrl: iproc: Add 'get_direction' support
pinctrl: iproc-gpio: Handle interrupts for multiple instances
pinctrl: iproc-gpio: Fix incorrect pinconf configurations
pinctrl: intel: mark intel_pin_to_gpio __maybe_unused
pinctrl: qcom: sdm845: Fix UFS_RESET pin
pinctrl: mvebu: add additional variant for standalone CP115
pinctrl: mvebu: Add CP110 missing pin functionality
dt-bindings: cp110: document the new CP115 pinctrl compatible
pinctrl: bcm2835: Pass irqchip when adding gpiochip
pinctrl: meson: meson: Add of_node_put() before return
pinctrl/gpio: Take MUX usage into account
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support
pinctrl: amd: disable spurious-firing GPIO IRQs
pinctrl: rza2: Include the appropriate headers
pinctrl: rza2: Drop driver use of consumer flags
...
The device-tree properties documentation-file specifies the property
"microchip,spi-present-mask" as required for MCP23SXX chips. However,
the device-tree-source example below it uses only "spi-present-mask".
Without "microchip," on the front, the driver will print "missing
spi-present-mask" when it initializes.
Update the device-tree example with the correct property-name.
Signed-off-by: Peter Vernia <peter.vernia@gmail.com>
Reviewed-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Signed-off-by: Rob Herring <robh@kernel.org>
The proper way to add additional contraints to an existing json-schema
is using 'allOf' to reference the base schema. Using just '$ref' doesn't
work. Fix this for the 'st,syscfg' property.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: linux-arm-kernel@lists.infradead.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Guide readers away from using the aspeed,g[45].* compatible patterns.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190724081313.12934-4-andrew@aj.id.au
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The AST260 differs from the 2400 and 2500 in that it supports multiple
groups for a subset of functions.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190729055604.13239-2-andrew@aj.id.au
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
TSIF is the Transport Stream Interface.
First, rename tsif1 to tsif0, and tsif2 to tsif1.
Then squash all 5 tsif0 pins into a single function.
Same for tsif1.
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Link: https://lore.kernel.org/r/503b2ae8-ead6-70cd-7b21-ce5f5166a23a@free.fr
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that examples are validated against the DT schema, an error with
required 'clocks' property missing is exposed:
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \
pinctrl@40020000: gpio@0: 'clocks' is a required property
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \
pinctrl@50020000: gpio@1000: 'clocks' is a required property
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \
pinctrl@50020000: gpio@2000: 'clocks' is a required property
Add the missing 'clocks' properties to the examples to fix the errors.
Fixes: 2c9239c125 ("dt-bindings: pinctrl: Convert stm32 pinctrl bindings to json-schema")
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
The schema examples are now validated against the schema itself. The
AST2500 pinctrl schema has a couple of errors:
Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \
example-0: $nodename:0: 'example-0' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \
pinctrl: aspeed,external-nodes: [[1, 2]] is too short
Fixes: 0a617de167 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema")
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Joel Stanley <joel@jms.id.au>
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Rob Herring <robh@kernel.org>
The Aspeed pinctl schema have errors in the 'compatible' schema:
Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml: \
properties:compatible:enum: ['aspeed', 'ast2400-pinctrl', 'aspeed', 'g4-pinctrl'] has non-unique elements
Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml: \
properties:compatible:enum: ['aspeed', 'ast2500-pinctrl', 'aspeed', 'g5-pinctrl'] has non-unique elements
Flow style sequences have to be quoted if the vales contain ','. Fix
this by using the more common one line per entry formatting.
Fixes: 0a617de167 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema")
Fixes: 07457937bb ("dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema")
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Joel Stanley <joel@jms.id.au>
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Rob Herring <robh@kernel.org>
Properties which are child node definitions need to have an explict
type. Otherwise, a matching (DT) property can silently match when an
error is desired. Fix this up tree-wide. Once this is fixed, the
meta-schema will enforce this on any child node definitions.
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: linux-mtd@lists.infradead.org
Cc: linux-gpio@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: linux-spi@vger.kernel.org
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
cycle:
Core changes:
- Device links can optionally be added between a pin control
producer and its consumers. This will affect how the system
power management is handled: a pin controller will not suspend
before all of its consumers have been suspended. This was
necessary for the ST Microelectronics STMFX expander and
need to be tested on other systems as well: it makes sense
to make this default in the long run. Right now it is
opt-in per driver.
- Drive strength can be specified in microamps. With decreases
in silicon technology, milliamps isn't granular enough, let's
make it possible to select drive strengths in microamps. Right
now the Meson (AMlogic) driver needs this.
New drivers:
- New subdriver for the Tegra 194 SoC.
- New subdriver for the Qualcomm SDM845.
- New subdriver for the Qualcomm SM8150.
- New subdriver for the Freescale i.MX8MN (Freescale is now a
product line of NXP).
- New subdriver for Marvell MV98DX1135.
Driver improvements:
- The Bitmain BM1880 driver now supports pin config in
addition to muxing.
- The Qualcomm drivers can now reserve some GPIOs as taken
aside and not usable for users. This is used in ACPI systems
to take out some GPIO lines used by the BIOS so that
noone else (neither kernel nor userspace) will play with them
by mistake and crash the machine.
- A slew of refurbishing around the Aspeed drivers (board
management controllers for servers) in preparation for the
new Aspeed AST2600 SoC.
- A slew of improvements over the SH PFC drivers as usual.
- Misc cleanups and fixes.
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Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.3 kernel cycle:
Core changes:
- Device links can optionally be added between a pin control producer
and its consumers. This will affect how the system power management
is handled: a pin controller will not suspend before all of its
consumers have been suspended.
This was necessary for the ST Microelectronics STMFX expander and
need to be tested on other systems as well: it makes sense to make
this default in the long run.
Right now it is opt-in per driver.
- Drive strength can be specified in microamps. With decreases in
silicon technology, milliamps isn't granular enough, let's make it
possible to select drive strengths in microamps.
Right now the Meson (AMlogic) driver needs this.
New drivers:
- New subdriver for the Tegra 194 SoC.
- New subdriver for the Qualcomm SDM845.
- New subdriver for the Qualcomm SM8150.
- New subdriver for the Freescale i.MX8MN (Freescale is now a product
line of NXP).
- New subdriver for Marvell MV98DX1135.
Driver improvements:
- The Bitmain BM1880 driver now supports pin config in addition to
muxing.
- The Qualcomm drivers can now reserve some GPIOs as taken aside and
not usable for users. This is used in ACPI systems to take out some
GPIO lines used by the BIOS so that noone else (neither kernel nor
userspace) will play with them by mistake and crash the machine.
- A slew of refurbishing around the Aspeed drivers (board management
controllers for servers) in preparation for the new Aspeed AST2600
SoC.
- A slew of improvements over the SH PFC drivers as usual.
- Misc cleanups and fixes"
* tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits)
pinctrl: aspeed: Strip moved macros and structs from private header
pinctrl: aspeed: Fix missed include
pinctrl: baytrail: Use GENMASK() consistently
pinctrl: baytrail: Re-use data structures from pinctrl-intel.h
pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()
pinctrl: qcom: Add SM8150 pinctrl driver
dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding
dt-bindings: pinctrl: qcom: Document missing gpio nodes
pinctrl: aspeed: Add implementation-related documentation
pinctrl: aspeed: Split out pinmux from general pinctrl
pinctrl: aspeed: Clarify comment about strapping W1C
pinctrl: aspeed: Correct comment that is no longer true
MAINTAINERS: Add entry for ASPEED pinctrl drivers
dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
dt-bindings: pinctrl: aspeed: Split bindings document in two
pinctrl: qcom: Add irq_enable callback for msm gpio
pinctrl: madera: Fixup SPDX headers
pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard
pinctrl: tegra: Add bitmask support for parked bits
...
Add the binding for the TLMM pinctrl block found in the SM8150 platform.
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
[vkoul: add missing nodes of gpio range and reserved
rewrote function names and order them]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20190702105045.27646-3-vkoul@kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The bindings for msm8998-pinctrl was missing gpio-ranges and
gpio-reserved-ranges, so document them as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20190702105045.27646-2-vkoul@kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Convert ASPEED pinctrl bindings to DT schema format using json-schema.
Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-4-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Convert ASPEED pinctrl bindings to DT schema format using json-schema
Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-3-andrew@aj.id.au
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Have one for each of the AST2400 and AST2500. The only thing that was
common was the fact that both support ASPEED BMC SoCs.
Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-2-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The 98DX1135 is similar to the 98DX4122 except the MPP options differ.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
"git diff" says:
\ No newline at end of file
after modifying the files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
The Allwinner V3 SoC, despite come with the same die with V3s, has more
GPIO pins than V3s, and a different compatible string for pinctrl is
needed.
Add the compatible string for V3 pinctrl.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl driver of V3s is already available and used in the kernel,
but the compatible string of it is forgotten to be added.
Add the missing compatible string.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add SGPM pinmux to ast2500-pinctrl function and group, to prepare for
supporting SGPIO in AST2500 SoC.
Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pinr
Reorder the pins and expose it as gpio 150, so that the UFS driver can
toggle it.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The i.MX8MM pinfunc head file is located in DT folder, correct it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The spelling of configured is incorrect in the documentation. Fix it.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Earlier, the PWM registers were included as part of the pinctrl memory
map, but this turned to be useless as the muxing is being handled by the
SoC pin controller itself. So, lets modify the pinctrl memory map to
reflect the same.
Fixes: 07b734fbde ("dt-bindings: pinctrl: Add BM1880 pinctrl binding")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
add support for the pinconf DT property output-enable, output-disable,
output-low and output-high in the meson pinctrl driver.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Convert the STM32 pinctrl binding to DT schema format using json-schema.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
BCM7211 has a slightly different block layout and some additional GPIO
registers that were added, document the compatible string.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This property allow drive-strength parameter in uA instead of mA.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Document (kerneldoc) core mfd_add_devices() API
- New Drivers
- Add support for Altera SOCFPGA System Manager
- Add support for Maxim MAX77650/77651 PMIC
- Add support for Maxim MAX77663 PMIC
- Add support for ST Multi-Function eXpander (STMFX)
- New Device Support
- Add support for LEDs to Intel Cherry Trail Whiskey Cove PMIC
- Add support for RTC to SAMSUNG Electronics S2MPA01 PMIC
- Add support for SAM9X60 to Atmel HLCDC (High-end LCD Controller)
- Add support for USB X-Powers AXP 8xx PMICs
- Add support for Integrated Sensor Hub (ISH) to ChromeOS EC
- Add support for USB PD Logger to ChromeOS EC
- Add support for AXP223 to X-Powers AXP series PMICs
- Add support for Power Supply to X-Powers AXP 803 PMICs
- Add support for Comet Lake to Intel Low Power Subsystem
- Add support for Fingerprint MCU to ChromeOS EC
- Add support for Touchpad MCU to ChromeOS EC
- Move TI LM3532 support to LED
- New Functionality
- Add/extend DT support; max77650, max77620
- Add support for power-off; max77620
- Add support for clocking; syscon
- Add support for host sleep event; cros_ec
- Fix-ups
- Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs
- Remove unused functionality; rk808, da9063-*
- SPDX conversion; da9063-*, atmel-*,
- Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr
- Fix-up DT bindings; ti-lmu, cirrus,lochnagar
- Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb
- Bug Fixes
- Fix incorrect defined values; max77620, da9063
- Fix device initialisation; twl6040
- Reset device on init; intel-lpss
- Fix build warnings when !OF; sun6i-prcm
- Register OF match tables; tps65912-spi
- Fix DMI matching; intel_quark_i2c_gpio
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Merge tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Core Framework:
- Document (kerneldoc) core mfd_add_devices() API
New Drivers:
- Altera SOCFPGA System Manager
- Maxim MAX77650/77651 PMIC
- Maxim MAX77663 PMIC
- ST Multi-Function eXpander (STMFX)
New Device Support:
- LEDs support in Intel Cherry Trail Whiskey Cove PMIC
- RTC support in SAMSUNG Electronics S2MPA01 PMIC
- SAM9X60 support in Atmel HLCDC (High-end LCD Controller)
- USB X-Powers AXP 8xx PMICs
- Integrated Sensor Hub (ISH) in ChromeOS EC
- USB PD Logger in ChromeOS EC
- AXP223 in X-Powers AXP series PMICs
- Power Supply in X-Powers AXP 803 PMICs
- Comet Lake in Intel Low Power Subsystem
- Fingerprint MCU in ChromeOS EC
- Touchpad MCU in ChromeOS EC
- Move TI LM3532 support to LED
New Functionality:
- max77650, max77620: Add/extend DT support
- max77620 power-off
- syscon clocking
- croc_ec host sleep event
Fix-ups:
- Trivial; Formatting, spelling, etc; Kconfig, sec-core, ab8500-debugfs
- Remove unused functionality; rk808, da9063-*
- SPDX conversion; da9063-*, atmel-*,
- Adapt/add new register definitions; cs47l35-tables, cs47l90-tables, imx6q-iomuxc-gpr
- Fix-up DT bindings; ti-lmu, cirrus,lochnagar
- Simply obtaining driver data; ssbi, t7l66xb, tc6387xb, tc6393xb
Bug Fixes:
- Fix incorrect defined values; max77620, da9063
- Fix device initialisation; twl6040
- Reset device on init; intel-lpss
- Fix build warnings when !OF; sun6i-prcm
- Register OF match tables; tps65912-spi
- Fix DMI matching; intel_quark_i2c_gpio"
* tag 'mfd-next-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (65 commits)
mfd: Use dev_get_drvdata() directly
mfd: cros_ec: Instantiate properly CrOS Touchpad MCU device
mfd: cros_ec: Instantiate properly CrOS FP MCU device
mfd: cros_ec: Update the EC feature codes
mfd: intel-lpss: Add Intel Comet Lake PCI IDs
mfd: lochnagar: Add links to binding docs for sound and hwmon
mfd: ab8500-debugfs: Fix a typo ("deubgfs")
mfd: imx6sx: Add MQS register definition for iomuxc gpr
dt-bindings: mfd: LMU: Fix lm3632 dt binding example
mfd: intel_quark_i2c_gpio: Adjust IOT2000 matching
mfd: da9063: Fix OTP control register names to match datasheets for DA9063/63L
mfd: tps65912-spi: Add missing of table registration
mfd: axp20x: Add USB power supply mfd cell to AXP803
mfd: sun6i-prcm: Fix build warning for non-OF configurations
mfd: intel-lpss: Set the device in reset state when init
platform/chrome: Add support for v1 of host sleep event
mfd: cros_ec: Add host_sleep_event_v1 command
mfd: cros_ec: Instantiate the CrOS USB PD logger driver
mfd: cs47l90: Make DAC_AEC_CONTROL_2 readable
mfd: cs47l35: Make DAC_AEC_CONTROL_2 readable
...
This patch adds documentation of device tree bindings for the
STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Nex drivers:
- New driver for Bitmain BM1880 pin controller
- New driver for Mediatek MT8516
- New driver for Cirrus Logich Lochnagar PMIC pins
Updates:
- Incremental development on Renesas SH-PFC
- Incremental development on Intel pin controller and some
particular updates for Cedarfork.
- Pin configuration support in Allwinner SunXi drivers
- Suspend/resume support in the NXP/Freescale i.MX8MQ driver
- Support for more packaging of the ST Micro STM32
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Merge tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"It is pretty calm and chill in pin control for the moment. Just
incremental development.
There is an odd patch to the Super-H architecture, it's coming from
the maintainers so should be fine.
Summary:
New drivers:
- Bitmain BM1880 pin controller
- Mediatek MT8516
- Cirrus Logich Lochnagar PMIC pins
Updates:
- Incremental development on Renesas SH-PFC
- Incremental development on Intel pin controller and some particular
updates for Cedarfork.
- Pin configuration support in Allwinner SunXi drivers
- Suspend/resume support in the NXP/Freescale i.MX8MQ driver
- Support for more packaging of the ST Micro STM32"
* tag 'pinctrl-v5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: mcp23s08: Do not complain about unsupported params
pinctrl: Rework Kconfig dependency for BM1880 pinctrl driver
MAINTAINERS: Add entry for BM1880 pinctrl
pinctrl: Add pinctrl support for BM1880 SoC
dt-bindings: pinctrl: Add BM1880 pinctrl binding
pinctrl: stm32: check irq controller availability at probe
pinctrl: mediatek: Add MT8516 Pinctrl driver
pinctrl: zte: fix leaked of_node references
pinctrl: intel: Increase readability of intel_gpio_update_pad_mode()
pinctrl: intel: Retain HOSTSW_OWN for requested gpio pin
pinctrl: pistachio: fix leaked of_node references
pinctrl: sunxi: Support I/O bias voltage setting on H6
pinctrl: sunxi: Prepare for alternative bias voltage setting methods
pinctrl: st: fix leaked of_node references
pinctrl: samsung: fix leaked of_node references
pinctrl: stm32: align stm32mp157 pin names
pinctrl: stm32: add package information for stm32mp157c
pinctrl: stm32: introduce package support
dt-bindings: pinctrl: stm32: add new entry for package information
pinctrl: imx8mq: Add suspend/resume ops
...
Add pinctrl binding for Bitmain BM1880 SoC. The SoC is not capable
of handling pinconf, thereby supporting only pinmux and this limitation
is documented.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch fixes a shared typo in several qcom pinctrl dt-bindings.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
In the iMX7d datasheet, the PAD_CTL_DSE_X* values are different from
the documentation.
Changes since v2:
* Changed patch title to 'dt-bindings: pinctrl: imx7d:'
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The commit adds mt8183 compatible node in binding document.
Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Lochnagar is an evaluation and development board for Cirrus
Logic Smart CODEC and Amp devices. It allows the connection of
most Cirrus Logic devices on mini-cards, as well as allowing
connection of various application processor systems to provide a
full evaluation platform. This driver supports the board
controller chip on the Lochnagar board.
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
AFAICS from the i.MX50 Reference Manual, the i.MX50 IOMUXC works the
same as the one in i.MX51, so I copied fsl,imx51-pinctrl.txt and changed
the text to imx50.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Cc: Dong Aisheng <dong.aisheng@linaro.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
like pull-enable, pull should be optional has this region is available on
every controllers. Also, the g12a feature a new region "ds" for the
drive-strength
All this region thing is one big mess. I suspect that there is only one
big GPIO region with holes in it. All registers between the current
regions reads '0' so it is probably just spare space to handle more pins.
Since we need to continue to handle the existing controllers, switching to
one single region now would not simplify things. However, if more
organisation layouts and features keep on being added, we may have to look
at this again
Fixes: 3cd3c83f67 ("pinctrl: Add compatibles for Amlogic Meson G12A pin controllers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for the PMI8998 GPIO variant to the Qualcomm PMIC GPIO
binding document.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
While it was possible to configure the PCIe1 Wakeup pin, it was missing
in the bidding, let's document it.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is a cleanup and fix of the patch by Ken Ma <make@marvell.com>.
Fix the mpp definitions according to newest revision of the
specification:
- northbridge:
fix pmic1 gpio number to 7
fix pmic0 gpio number to 6
- southbridge
split pcie1 group bit mask to BIT(5) and BIT(9)
fix ptp group bit mask to BIT(11) | BIT(12) | BIT(13)
add smi group with bit mask BIT(4)
[gregory: split the pcie group in 2, as at hardware level they can be
configured separately]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jaguar2 has the same register layout as Ocelot but it has 64 pins, meaning
that there are 2 registers instead of one.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As pointed by Rob, CRU is a kind of block that can't be guaranteed to
have everything exposed as subnodes. It's a set of various registers
that aren't tied to any single device. It could be described much more
accurately as MFD (Multi-Function Device).
Some hardware blocks may indeed want to access a register or two of the
CRU which requires describing it as the "syscon".
While at it replace exmple node name with the standard "pinctrl" (also
pointed out by Rob).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl node can have multiple regulators for each of its GPIO banks.
Add the property descriptions.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rather than gpio1-gpio11 for pms405, there are 12 GPIOs for pms405.
But gpio1, gpio9 and gpio10 are not available. Fix the bindings doc
to make it correct for pms405.
Fixes: ed80f6eb79 ("dt-bindings: pinctrl: qcom-pmic-gpio: Add pms405 support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
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Merge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.21
- Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W,
- Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C,
- Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3,
- Add QSPI pin groups on R-Car V3M and V3H,
- Add VIN and CAN(FD) pin groups on R-Car M3-N,
- Add I2C[035] pin groups on R-Car H3 and M3-W,
- Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC,
- Small cleanups,
- Maintainership updates.
This updates bindings for MT7629 pinctrl driver.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Sean Wang <sean.wang@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We already had an earlier conclusion that all new i.MX Socs will keep
using the legacy i.MX Pinctrl bindings instead of generic pin config.
However, MX7ULP generic pin config binding support has already been in
tree before that time. Per SoC maintainers' suggestions, in order to
get a better consistency for all i.MX devices, we'd like to go back to
imx legacy binding for MX7ULP as well.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or
"Central Resource Unit") registers. There are more CRU registers and
functions so CRU should be represented as a separated block in DT.
Moreover CRU is a sub-block of DMU ("Device Management Unit") so that
one should also get its own node.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033)
SoCs,
- Add INTC-EX pin groups on R-Car E3.
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Merge tag 'sh-pfc-for-v4.20-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.20 (take three)
- Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033)
SoCs,
- Add INTC-EX pin groups on R-Car E3.
Northstar has mux controller just like Northstar Plus and Northstar2.
It's a bit different though (different registers & pins) so it requires
its own binding.
It's needed to allow other block bindings specify required mux setup.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the binding for the TLMM pinctrl block found in the SDM660 platform.
Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Renesas RZ/N1 device family PINCTRL node description.
Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
- Add MSIOF pin groups on R-Car E3 and D3,
- Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs,
- Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C,
- Convert to SPDX license identifiers,
- Small cleanups.
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Merge tag 'sh-pfc-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.20 (take two)
- Add MSIOF pin groups on R-Car E3 and D3,
- Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs,
- Add I2C4, DU0, QSPI0, SDHI2, and USB pin groups on RZ/G1C,
- Convert to SPDX license identifiers,
- Small cleanups.
Add the binding for the TLMM pinctrl block found in the QCS404 platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for the PMS405 GPIO support to the Qualcomm PMIC GPIO
binding.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Document PFC support for the R8A774C0 SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document PFC support for the RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
- Add SATA and audio pin groups on R-Car M3-N,
- Add EtherAVB pin groups on RZ/G1C,
- Add PWM and display (DU) pin groups on R-Car E3,
- Add support for the new RZ/G2M (r8a774a1) SoC.
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Merge tag 'sh-pfc-for-v4.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.20
- Add SATA and audio pin groups on R-Car M3-N,
- Add EtherAVB pin groups on RZ/G1C,
- Add PWM and display (DU) pin groups on R-Car E3,
- Add support for the new RZ/G2M (r8a774a1) SoC.
The pinctrl-ingenic driver now supports the JZ4725B SoC.
Furthermore, the gpio-ingenic driver was dropped and the pinctrl-ingenic
driver is now responsible for providing the GPIO functionality.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add new compatible name for Amlogic's Meson-G12A pin controllers,
add a dt-binding header file which document the detail pin names.
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Document PFC support for the R8A774A1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
- Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
- Add ChromeOS EC CEC driver
- Add ROHM BD71837 PMIC driver
- New Device Support
- Add support for Dialog Semi DA9063L PMIC variant to DA9063
- Add support for Intel Ice Lake to Intel-PLSS-PCI
- Add support for X-Powers AXP806 to AXP20x
- New Functionality
- Add support for USB Charging to the ChromeOS Embedded Controller
- Add support for HDMI CEC to the ChromeOS Embedded Controller
- Add support for HDMI CEC to Intel HDMI
- Add support for accessory detection to Madera devices
- Allow individual pins to be configured via DT' wlf,csnaddr-pd
- Provide legacy platform specific EEPROM/Watchdog commands; rave-sp
- Fix-ups
- Trivial renaming/spelling fixes; cros_ec, da9063-*
- Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
- Transition to helper macros/functions; da9063-*
- Constify; kempld-core
- Improve error path/messages; wm8994-core
- Disable IRQs locally instead of relying on USB subsystem; dln2
- Remove unused code; rave-sp
- New exports; sec-core
- Bug Fixes
- Fix possible false I2C transaction error; arizona-core
- Fix declared memory area size; hi655x-pmic
- Fix checksum type; rave-sp
- Fix incorrect default serial port configuration: rave-sp
- Fix incorrect coherent DMA mask for sub-devices; sm501
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Merge tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Drivers:
- Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
- Add ChromeOS EC CEC driver
- Add ROHM BD71837 PMIC driver
New Device Support:
- Add support for Dialog Semi DA9063L PMIC variant to DA9063
- Add support for Intel Ice Lake to Intel-PLSS-PCI
- Add support for X-Powers AXP806 to AXP20x
New Functionality:
- Add support for USB Charging to the ChromeOS Embedded Controller
- Add support for HDMI CEC to the ChromeOS Embedded Controller
- Add support for HDMI CEC to Intel HDMI
- Add support for accessory detection to Madera devices
- Allow individual pins to be configured via DT' wlf,csnaddr-pd
- Provide legacy platform specific EEPROM/Watchdog commands; rave-sp
Fix-upsL
- Trivial renaming/spelling fixes; cros_ec, da9063-*
- Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
- Transition to helper macros/functions; da9063-*
- Constify; kempld-core
- Improve error path/messages; wm8994-core
- Disable IRQs locally instead of relying on USB subsystem; dln2
- Remove unused code; rave-sp
- New exports; sec-core
Bug Fixes:
- Fix possible false I2C transaction error; arizona-core
- Fix declared memory area size; hi655x-pmic
- Fix checksum type; rave-sp
- Fix incorrect default serial port configuration: rave-sp
- Fix incorrect coherent DMA mask for sub-devices; sm501"
* tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits)
mfd: madera: Add register definitions for accessory detect
mfd: sm501: Set coherent_dma_mask when creating subdevices
mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC
mfd: bd71837: Core driver for ROHM BD71837 PMIC
media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC
mfd: sec-core: Export OF module alias table
mfd: as3722: Disable auto-power-on when AC OK
mfd: axp20x: Support AXP806 in I2C mode
mfd: axp20x: Add self-working mode support for AXP806
dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts
mfd: wm8994: Allow to configure Speaker Mode Pullup from dts
mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it
mfd: rave-sp: Add legacy watchdog ping command translation
mfd: rave-sp: Add legacy EEPROM access command translation
mfd: rave-sp: Initialize flow control and parity of the port
mfd: rave-sp: Fix incorrectly specified checksum type
mfd: rave-sp: Remove unused defines
mfd: hi655x: Fix regmap area declared size for hi655x
mfd: ti_am335x_tscadc: Fix struct clk memory leak
...
Here are all of the driver core and related patches for 4.19-rc1.
Nothing huge here, just a number of small cleanups and the ability to
now stop the deferred probing after init happens.
All of these have been in linux-next for a while with only a merge issue
reported. That merge issue is in fs/sysfs/group.c and Stephen has
posted the diff of what it should be to resolve this. I'll follow up
with that diff to this pull request.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core updates from Greg KH:
"Here are all of the driver core and related patches for 4.19-rc1.
Nothing huge here, just a number of small cleanups and the ability to
now stop the deferred probing after init happens.
All of these have been in linux-next for a while with only a merge
issue reported"
* tag 'driver-core-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (21 commits)
base: core: Remove WARN_ON from link dependencies check
drivers/base: stop new probing during shutdown
drivers: core: Remove glue dirs from sysfs earlier
driver core: remove unnecessary function extern declare
sysfs.h: fix non-kernel-doc comment
PM / Domains: Stop deferring probe at the end of initcall
iommu: Remove IOMMU_OF_DECLARE
iommu: Stop deferring probe at end of initcalls
pinctrl: Support stopping deferred probe after initcalls
dt-bindings: pinctrl: add a 'pinctrl-use-default' property
driver core: allow stopping deferred probe after init
driver core: add a debugfs entry to show deferred devices
sysfs: Fix internal_create_group() for named group updates
base: fix order of OF initialization
linux/device.h: fix kernel-doc notation warning
Documentation: update firmware loader fallback reference
kobject: Replace strncpy with memcpy
drivers: base: cacheinfo: use OF property_read_u32 instead of get_property,read_number
kernfs: Replace strncpy with memcpy
device: Add #define dev_fmt similar to #define pr_fmt
...
- Remove an obsolete hack for PPC32 longtrail systems
- Make of_io_request_and_map() "name" arg optional
- Add vendor prefixes for bitmain, Asus, and Y Soft
- Remove 'interrupt-parent' from bindings as it is implicit
- New properties for wm8994 audio codec
- Add 'clocks' property support to SRAM binding
- Add binding for ASPEED coprocessor interrupt controller
- Various binding spelling and link fixes
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Merge tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
- Remove an obsolete hack for PPC32 longtrail systems
- Make of_io_request_and_map() "name" arg optional
- Add vendor prefixes for bitmain, Asus, and Y Soft
- Remove 'interrupt-parent' from bindings as it is implicit
- New properties for wm8994 audio codec
- Add 'clocks' property support to SRAM binding
- Add binding for ASPEED coprocessor interrupt controller
- Various binding spelling and link fixes
* tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
Documentation: remove dynamic-resolution-notes reference to non-existent file
dt-bindings: Add Y Soft Corporation vendor prefix
of/fdt: Remove PPC32 longtrail hack in memory scan
dt-bindings: remove 'interrupt-parent' from bindings
pinctrl: tegra: fix spelling in devicetree binding document
usb: dwc3: rockchip: Fix PHY documentation links.
dt-bindings: sound: wm8994: document wlf,csnaddr-pd property
dt-bindings: sound: wm8994: document wlf,spkmode-pu property
dt-bindings: sram: Add 'clocks' as an optional property
dt-bindings: Add vendor prefix for AsusTek Computer Inc.
dt-bindings: misc: ASPEED coprocessor interrupt controller
dt-bindings: gpio: pca953x: Document interrupts, update example
drivers/of: Make of_io_request_and_map() "name" argument optional
dt-bindings: Add bitmain vendor prefix
Documentation: devicetree: tilcdc: fix spelling mistake "suppors" -> "supports"
This patch adds mask parameter to define IRQ mux field.
This field could vary depend of IRQ mux selection register.
This parameter is needed if the mask is different of 0xf.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In case the exti line is not in line with the bank number (that is the case
when there is an hole between two banks, for example GPIOK and then GPIOZ),
use "st,bank-ioport" DT property to get the right exti line.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Immutable Branch which moves the cros_ec_i2c and cros_ec_spi
transport drivers from mfd to platform/chrome. Changes in arm are a simple
rename in defconfigs. Change in input is a rename in help text.
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Merge branches 'ib-mfd-4.19', 'ib-mfd-gpio-pinctrl-4.19', 'ib-mfd-i915-media-platform-4.19' and 'ib-mfd-regulator-4.19', tag 'ib-platform-chrome-mfd-move-cros-ec-transport-for-4.19' into ibs-for-mfd-merged
Immutable branch (mfd, chrome) due for the v4.19 window
Immutable Branch which moves the cros_ec_i2c and cros_ec_spi
transport drivers from mfd to platform/chrome. Changes in arm are a simple
rename in defconfigs. Change in input is a rename in help text.
1. Add handling of external wakeup interrupts mask inside the pin
controller driver.
Existing solution is spread between the driver and machine code. The
machine code writes the mask but its value is taken from pin
controller driver.
This moves everything into pin controller driver allowing later to
remove the cross-subsystem interaction. Also this is a necessary
step for implementing later Suspend to RAM on ARMv8 Exynos5433.
2. Bring necessary suspend/resume callbacks for Exynos542x and
Exynos5260.
3. Document hidden requirement about one external wakeup interrupts
device node.
4. Minor documentation cleanups.
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Merge tag 'samsung-pinctrl-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v4.19
1. Add handling of external wakeup interrupts mask inside the pin
controller driver.
Existing solution is spread between the driver and machine code. The
machine code writes the mask but its value is taken from pin
controller driver.
This moves everything into pin controller driver allowing later to
remove the cross-subsystem interaction. Also this is a necessary
step for implementing later Suspend to RAM on ARMv8 Exynos5433.
2. Bring necessary suspend/resume callbacks for Exynos542x and
Exynos5260.
3. Document hidden requirement about one external wakeup interrupts
device node.
4. Minor documentation cleanups.
'interrupt-parent' is often documented as part of define bindings, but
it is really outside the scope of a device binding. It's never required
in a given node as it is often inherited from a parent node. Or it can
be implicit if a parent node is an 'interrupt-controller' node. So
remove it from all the binding files.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
This fixes a spelling mistake.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
The S5Pv210 external wakeup interrupts differ from Exynos therefore
separate compatible is needed. Duplicate existing flavor specific data
from exynos4210_wkup_irq_chip and add new compatible for S5Pv210.
At this point this new compatible does not bring anything new and works
exactly as existing "samsung,exynos4210-wakeup-eint".
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <snawrocki@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
ARMv7 hardware (S5Pv210 and Exynos SoCs) provides only 32 external
interrupts which can wakeup device from deep sleep modes. On S5Pv210
these are gph0-gph3. On all ARMv7 Exynos designs these are gpx0-gpx3.
There is only one 32-bit register for controlling the external wakeup
interrupt mask (masking and unmasking waking capability of these
interrupts).
This lead to implementation in pinctrl driver and machine code which was
using static memory for storing the mask value and not caring about
multiple devices of pin controller... because only one pin controller
device will be handling this.
Since each pin controller node in Device Tree maps onto one device, this
corresponds to hidden assumption in parsing the Device Tree: external
wakeup interrupts can be defined only once. Make this assumption an
explicit requirement.
ARMv8 Exynos5433 and Exynos7 bring additional 32 external wakeup
interrupts (up to 64 total, banks gpa0-gpa3 and gpf1-gpf5) and another
32-bit wide register for controlling them. Existing code does not
support it but anyway these additional interrupts will be belonging to
the same pin controller device/node.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <snawrocki@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
This adds the binding for the i.MX8MQ pin controller, in the same
fashion as earlier i.MX SoCs.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for the drive strength configuration. Usually, this value is
expressed in mA. Since the numeric value depends on VDDIOP voltage, a
value we can't retrieve at runtime, the controller uses low, medium and
high to define the drive strength.
The PIO controller accepts two values for the low drive configuration: 0
and 1. Most of the time, we don't care about the drive strength. So we
keep the default value which is 0. The drive strength is advertised
through the sysfs only when it has been explicitly set in the device
tree i.e. if its value is different from 0.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pin setup may be optional in some cases such as the reset default works
or the pin setup is done by the bootloader. In these cases, it is optional
for the OS to support managing the pin controller and pin setup. In order
to support this scenario, add a property 'pinctrl-use-default' to indicate
that the pin configuration is optional.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch adds the gpio-ranges and gpio-reserved-ranges property
definitions to the binding text files supported by the pinctrl-msm
driver framework.
gpio-ranges:
For DT-based platforms the pinctrl-msm framework currently relies
on the deprecated-for-DT gpiochip_add_pin_range() function to add
the range of GPIOs to be handled by the pin controller. Due to
interactions within gpiolib code, this causes the pinctrl-msm
driver to bail out (-517) during boot when a gpio-hog is declared.
This can be fatal and cause the system to not boot or reset
(for a detailed explanation and call-trace, refer to patch:
"pinctrl: msm: fix gpio-hog related boot issues" in this series).
gpio-reserved-ranges:
The binding has been added as a precaution since the TrustZone
firmware (aka QSEE), which is running as the hypervisor, might
have reserved certain, but undisclosed pins. Hence reading or
writing to the registers for those pins will cause an
XPU violation and this subsequently crashes the kernel.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Update the binding for two more PMICs supported by the same driver.
While we're here, remove the duplicate pmi8994 lines because that
support got merged twice.
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rename:
pinctrl-binding.txt -> pinctrl-bindings.txt
In order to match the current name of this file.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
No core changes this time! Just a calm all-over-the-place
drivers, updates and fixes cycle as it seems.
New drivers/subdrivers:
- Actions Semiconductor S900 driver with more Actions
variants for S700, S500 in the pipe. Also generic GPIO
support on top of the same driver and IRQ support is in
the pipe.
- Renesas r8a77470 PFC support.
- Renesas r8a77990 PFC support.
- Allwinner Sunxi H6 R_PIO support.
- Rockchip PX30 support.
- Meson Meson8m2 support.
- Remove support for the ill-fated Samsung Exynos 5440 SoC.
Improvements:
- Context save/restore support in pinctrl-single.
- External interrupt support for the Mediatek MT7622.
- Qualcomm ACPI HID QCOM8002 supported.
Fixes:
- Fix up suspend/resume support for Exynos 5433.
- Fix Strago DMI fixes on the Intel Cherryview.
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Merge tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for v4.18.
No core changes this time! Just a calm all-over-the-place drivers,
updates and fixes cycle as it seems.
New drivers/subdrivers:
- Actions Semiconductor S900 driver with more Actions variants for
S700, S500 in the pipe. Also generic GPIO support on top of the
same driver and IRQ support is in the pipe.
- Renesas r8a77470 PFC support.
- Renesas r8a77990 PFC support.
- Allwinner Sunxi H6 R_PIO support.
- Rockchip PX30 support.
- Meson Meson8m2 support.
- Remove support for the ill-fated Samsung Exynos 5440 SoC.
Improvements:
- Context save/restore support in pinctrl-single.
- External interrupt support for the Mediatek MT7622.
- Qualcomm ACPI HID QCOM8002 supported.
Fixes:
- Fix up suspend/resume support for Exynos 5433.
- Fix Strago DMI fixes on the Intel Cherryview"
* tag 'pinctrl-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
pinctrl: cherryview: limit Strago DMI workarounds to version 1.0
pinctrl: at91-pio4: add missing of_node_put
pinctrl: armada-37xx: Fix spurious irq management
gpiolib: discourage gpiochip_add_pin[group]_range for DT pinctrls
pinctrl: msm: fix gpio-hog related boot issues
MAINTAINERS: update entry for Mediatek pin controller
pinctrl: mediatek: remove unused fields in struct mtk_eint_hw
pinctrl: mediatek: use generic EINT register maps for each SoC
pinctrl: mediatek: add EINT support to MT7622 SoC
pinctrl: mediatek: refactor EINT related code for all MediaTek pinctrl can fit
dt-bindings: pinctrl: add external interrupt support to MT7622 pinctrl
pinctrl: freescale: Switch to SPDX identifier
pinctrl: samsung: Fix suspend/resume for Exynos5433 GPF1..5 banks
pinctrl: sh-pfc: rcar-gen3: Fix grammar in static pin comments
pinctrl: sh-pfc: r8a77965: Add I2C pin support
pinctrl: sh-pfc: r8a77990: Add EthernetAVB pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add I2C{1,2,4,5,6,7} pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add SCIF pins, groups and functions
pinctrl: sh-pfc: r8a77990: Add bias pinconf support
pinctrl: sh-pfc: Initial R8A77990 PFC support
...
This is the binding description of the pinctrl driver for Cirrus Logic
Madera codecs. The binding uses the generic pinctrl binding so the main
purpose here is to describe the device-specific names for groups and
functions.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Extend the capability of MT7622 pinctrl with adding EINT so that each
GPIO can be used to notify CPU when a signal state is changing on the
line as an external interrupt.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Add support for the new R-Car E3 SoC,
- Add I2C pin groups on R-Car M3-N,
- Small fixes and cleanups.
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Merge tag 'sh-pfc-for-v4.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.18 (take two)
- Add support for the new R-Car E3 SoC,
- Add I2C pin groups on R-Car M3-N,
- Small fixes and cleanups.
This patch adds initial pinctrl driver to support for the R8A77990 SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
There are 4 banks (GPIO0 ~ GPIO3), bank0 is in PD_PMU
subsystem, bank1/bank2/bank3 are in PD_BUS subsystem.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Allwinner H6 SoC has a R_PIO pin controller like other Allwinner SoCs,
which controls the PL and PM pin banks.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b
(such as the Gigabit capable DesignWare MAC).
It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins
get an additional function (four of these are Ethernet RXD2, RXD3, TXD2
and TXD3 which are required when the board uses an RGMII PHY).
The AOBUS pins seem to be identical on Meson8 and Meson8m2.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl-mcp23s08 driver doesn't provide a specific gpiospec
of_xlate() function, causing the gpiolib-of's of_gpio_simple_xlate()
function to be used instead, which takes the gpiospec's second cell as
the flags specifier according to 'include/dt-bindings/gpio/gpio.h'.
The pinctrl-mcp23s08 bindings document was mentioning that the flags
were unused, which is not accurate because values in that second cell
are indeed used by the gpiolib-of's of_gpio_simple_xlate() for
configuring the gpio (e.g. its polarity).
This way, replace the "flags currently unused" reference in the
dt-bindings document with references to the appropriate files specifying
the possible flag values and gpiospec description.
CC: devicetree@vger.kernel.org
Signed-off-by: Ricardo Silva <rjpdasilva@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Added generic pin configuration and multiplexing support,
and should be preferred than brcm legacy one.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes and
the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we get
two new machines based on its older siblings: the H5 based OrangePi
Zero+ and the A64 based Teres-I Laptop from Olimex. On the 32-bit side,
we add The Olimex som204 based on Allwinner A20, and the Banana Pi M2
Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6
family of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones Qualcomm
msm8974 based Galaxy S5 is a rather different phone made by the same
company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre Computer
Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on Rockchips
RK3368 and made by Theobroma Systems.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is the usual set of changes for device trees, with over 700
non-merged changesets. There is an ongoing set of dtc warning fixes
and the usual bugfixes, cleanups and added device support.
The most interesting bit as usual is support for new machines listed
below:
- The Allwinner H6 makes its debut with the Pine-H64 board, and we
get two new machines based on its older siblings: the H5 based
OrangePi Zero+ and the A64 based Teres-I Laptop from Olimex. On the
32-bit side, we add The Olimex som204 based on Allwinner A20, and
the Banana Pi M2 Zero development board (based on H2).
- NVIDIA adds support for Tegra194 aka "Xavier", plus their p2972
development board and p2888 CPU module.
- The Nuvoton npcm750 is a BMC that was newly added, for now we only
support running on the evaluation board.
- STmicroelectronics stm32 gains support for the stm32mp157c and two
evaluation boards.
- The Toradex Colibri board family grows a few members based on the
i.MX6ULL variant.
- The Advantec DMS-BA16 is a Qseven module using the NXP i.MX6 family
of chips.
- The Phytec phyBOARD Mira is a family of industrial boards based on
i.MX6. For now, four models get added.
- TI am335x based PDU-001 is an industrial embedded machine used for
traffic monitoring
- The Aspeed platform now supports running on the BMC on the Qualcomm
Centriq 2400 server
- Samsung Exynos4 based Galaxy S3 is a family of mobile phones
Qualcomm msm8974 based Galaxy S5 is a rather different phone made
by the same company.
- The Xilinx Zynq and ZynqMP platforms now gained a lot of dts file
for the various boards made by Xilinx themselves, as well as the
Digilent Zybo Z7.
- The ARM Versatile family now supports the "IB2" interface board.
- The Renesas H2 based "Stout" and the H3 based Salvator-X are more
evaluation boards named after a kind of beer, as most of them are.
The r8a77980 (V3H) based "Condor" apparently doesn't follow that
tradition. ;-)
- ROC-RK3328-CC is a simple developement board from the Libre
Computer Project, based on the Rockchips RK3328 SoC
- Haiku is another development board plus Qseven module based on
Rockchips RK3368 and made by Theobroma Systems"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (701 commits)
arm: dts: modify Nuvoton NPCM7xx device tree structure
arm: dts: modify Makefile NPCM750 configuration name
arm: dts: modify clock binding in NPCM750 device tree
arm: dts: modify timer register size in NPCM750 device tree
arm: dts: modify UART compatible name in NPCM750 device tree
arm: dts: add watchdog device to NPCM750 device tree
arm64: dts: uniphier: add ethernet node for PXs3
ARM: dts: uniphier: add pinctrl groups of ethernet for second instance
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for board using GPL-2.0+
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0+/MIT
arm: dts: kirkwood*.dts: use SPDX-License-Identifier for boards using GPL-2.0
arm: dts: armada-385-turris-omnia: use SPDX-License-Identifier
arm: dts: armada-385-db-ap: use SPDX-License-Identifier
arm: dts: armada-388-rd: use SPDX-License-Identifier
arm: dts: armada-xp-db-xc3-24g4xg: use SPDX-License-Identifier
arm: dts: armada-xp-db-dxbc2: use SPDX-License-Identifier
arm: dts: armada-370-db: use SPDX-License-Identifier
arm: dts: armada-*.dts: use SPDX-License-Identifier for most of the Armada based board
arm: dts: armada-xp-98dx: use SPDX-License-Identifier for prestara 98d SoCs
arm: dts: armada-*.dtsi: use SPDX-License-Identifier for most of the Armada SoCs
...
The Allwinner H6 SoC has two pin controllers, one main controller
(called CPUX-PORT in user manual) and one controller in CPUs power
domain (called CPUS-PORT in user manual).
This commit introduces support for the main pin controller on H6.
The pin bank A and B are not wired out and hidden from the SoC's
documents, however it's shown that the "ATE" (an AC200 chip
co-packaged with the H6 die) is connected to the main SoC die via these
pin banks. The information about these banks is just copied from the BSP
pinctrl driver, but re-formatted to fit the mainline pinctrl driver
format. The GPIO functions are dropped, as they're impossible to use --
except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- Add USB pin groups on R-Car M3-N,
- Add support for the new R-Car V3H SoC,
- Add EtherAVB pin groups on R-Car V3M,
- Miscellaneous fixes and cleanups.
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Merge tag 'sh-pfc-for-v4.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.17 (take two)
- Add USB pin groups on R-Car M3-N,
- Add support for the new R-Car V3H SoC,
- Add EtherAVB pin groups on R-Car V3M,
- Miscellaneous fixes and cleanups.
Add the PFC support for the R8A77980 SoC including pin groups for some
on-chip devices such as AVB, CAN-FD, GETHER, [H]SCIF, I2C, INTC-EX, MMC,
MSIOF, PWM, and VIN...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
- Add DU and VIN pin groups on R-Car D3,
- Add HDMI, TMU, and VIN pin groups on R-Car H3 and M3-W,
- Add support for the new R-Car M3-N SoC,
- Small fixes and cleanups.
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Merge tag 'sh-pfc-for-v4.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.17
- Add DU and VIN pin groups on R-Car D3,
- Add HDMI, TMU, and VIN pin groups on R-Car H3 and M3-W,
- Add support for the new R-Car M3-N SoC,
- Small fixes and cleanups.
It should be good that no use "_" is in examples. Consequently,
those nodes in certain files which have an inappropriate name containing
"_" are all being replaced with "-".
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-gpio@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add group configuration for uarts that are cut down
variants, the standard being full, i.e. all signals,
flow control, i.e. rx/tx and cts/rts, and rx/tx only.
This allows us to be more precise in which pins we're
actually using.
Unfortunately the existing naming scheme leaves things
to be desired, e.g. uart3grp0 means RX/TX and CTS/RTS,
yet uart0grp0 means all pins.
Since the exising suffixes have different meaning for
different uarts, and the fact that we cannot change
the name of existing groups, makes it hard to use a
descriptive name for the newly added groups.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing pin group uart5nocts (all pins except cts), which has been
supported by the artpec6 pinctrl driver since its initial submission.
Fixes: 00df0582ea ("pinctrl: Add pincontrol driver for ARTPEC-6 SoC")
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that arch/metag/ has been removed, along with TZ1090 SoC support,
remove the TZ1090 pinctrl drivers. They are of no value without the
architecture and SoC platform code.
Signed-off-by: James Hogan <jhogan@kernel.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-metag@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This flag set the mcp23s08 device irq type to open drain active low.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add initial PFC support for R-Car M3-N (r8a77965) SoC.
No groups or functions defined, just pin and registers enumeration.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This adds the DeviceTree binding for the Qualcomm SDM845 TLMM block.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- After lengthy discussions and partly due to my ignorance, we have
merged a patch making pinctrl_force_default() and pinctrl_force_sleep()
reprogram the states into the hardware of any hogged pins, even
if they are already in the desired state. This only apply to hogged
pins since groups of pins owned by drivers need to be managed by
each driver, lest they could not do things like runtime PM and
put pins to sleeping state even if the system as a whole is not
in sleep.
New drivers:
- New driver for the Microsemi Ocelot SoC. This is used in ethernet
switches.
- The X-Powers AXP209 GPIO driver was extended to also deal with pin
control and moved over from the GPIO subsystem. This circuit is
a mixed-mode integrated circuit which is part of AllWinner designs.
- New subdriver for the Qualcomm MSM8998 SoC, core of a high end
mobile devices (phones) chipset.
- New subdriver for the ST Microelectronics STM32MP157 MPU and
STM32F769 MCU from the STM32 family.
- New subdriver for the MediaTek MT7622 SoC. This is used for routers,
repeater, gateways and such network infrastructure.
- New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC has
multimedia features and target "smart devices", I guess in-car
entertainment, in-flight entertainment, industrial control panels etc.
General improvements:
- Incremental improvements on the SH-PFC subdrivers for things like
the CAN bus.
- Enable the glitch filter on Baytrail GPIOs used for interrupts.
- Proper handling of pins to GPIO ranges on the Semtec SX150X
- An IRQ setup ordering fix on MCP23S08.
- A good set of janitorial coding style fixes.
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Merge tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.16 kernel cycle.
Like with GPIO it is actually a bit calm this time.
Core changes:
- After lengthy discussions and partly due to my ignorance, we have
merged a patch making pinctrl_force_default() and
pinctrl_force_sleep() reprogram the states into the hardware of any
hogged pins, even if they are already in the desired state.
This only apply to hogged pins since groups of pins owned by
drivers need to be managed by each driver, lest they could not do
things like runtime PM and put pins to sleeping state even if the
system as a whole is not in sleep.
New drivers:
- New driver for the Microsemi Ocelot SoC. This is used in ethernet
switches.
- The X-Powers AXP209 GPIO driver was extended to also deal with pin
control and moved over from the GPIO subsystem. This circuit is a
mixed-mode integrated circuit which is part of AllWinner designs.
- New subdriver for the Qualcomm MSM8998 SoC, core of a high end
mobile devices (phones) chipset.
- New subdriver for the ST Microelectronics STM32MP157 MPU and
STM32F769 MCU from the STM32 family.
- New subdriver for the MediaTek MT7622 SoC. This is used for
routers, repeater, gateways and such network infrastructure.
- New subdriver for the NXP (former Freescale) i.MX 6ULL. This SoC
has multimedia features and target "smart devices", I guess in-car
entertainment, in-flight entertainment, industrial control panels
etc.
General improvements:
- Incremental improvements on the SH-PFC subdrivers for things like
the CAN bus.
- Enable the glitch filter on Baytrail GPIOs used for interrupts.
- Proper handling of pins to GPIO ranges on the Semtec SX150X
- An IRQ setup ordering fix on MCP23S08.
- A good set of janitorial coding style fixes"
* tag 'pinctrl-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (102 commits)
pinctrl: mcp23s08: fix irq setup order
pinctrl: Forward declare struct device
pinctrl: sunxi: Use of_clk_get_parent_count() instead of open coding
pinctrl: stm32: add STM32F769 MCU support
pinctrl: sx150x: Add a static gpio/pinctrl pin range mapping
pinctrl: sx150x: Register pinctrl before adding the gpiochip
pinctrl: sx150x: Unregister the pinctrl on release
pinctrl: ingenic: Remove redundant dev_err call in ingenic_pinctrl_probe()
pinctrl: sprd: Use seq_putc() in sprd_pinconf_group_dbg_show()
pinctrl: pinmux: Use seq_putc() in pinmux_pins_show()
pinctrl: abx500: Use seq_putc() in abx500_gpio_dbg_show()
pinctrl: mediatek: mt7622: align error handling of mtk_hw_get_value call
pinctrl: mediatek: mt7622: fix potential uninitialized value being returned
pinctrl: uniphier: refactor drive strength get/set functions
pinctrl: imx7ulp: constify struct imx_cfg_params_decode
pinctrl: imx: constify struct imx_pinctrl_soc_info
pinctrl: imx7d: simplify imx7d_pinctrl_probe
pinctrl: imx: use struct imx_pinctrl_soc_info as a const
pinctrl: sunxi-pinctrl: fix pin funtion can not be match correctly.
pinctrl: qcom: Add msm8998 pinctrl driver
...
We get a moderate number of new machines this time, and only one
new SoC variant (Actions S700):
Actions:
S700 Soc and CubieBoard7 development board
Allo.com Sparky Single-board-computer
Allwinner:
Orange Pi R1 development board
Libre Computer Board ALL-H3-CC H3 single-board computer
ASpeed ast2x00:
Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
AT91:
Axentia Nattis/Natte digital signage
sama5d2 PTC-ek Evaluation board
Freescale/NXP i.MX:
SolidRun Humminboard2 development board
Variscite DART-MX6 SoM and Carrier-board
Technologic TS-4600 and TS-7970 development board
Toradex Colibri iMX7D SoM board
v1.5 variant of Solidrun Cubox-i and Hummingboard
Freescale/NXP Layerscape:
Moxa UC-8410A Series industrial computer
Gemini:
D-Link DNS-313 NAS enclosure
OMAP:
LogicPD OMAP35xx SOM-LV devkit
LogicPD OMAP35xx Torpedo devkit
Renesas:
r8a77970 (V3M) Starter Kit board
r8a7795 (M3-W) Salvator-XS board
We finally managed to get the dtc warnings under control, with no more
build-time warnings for bad device tree files. This includes fixes for
the majority of platforms, including nomadik, samsung, lpc32xx, STi,
spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood,
renesas, hisilicon, and broadcom.
Files get rearranged on a few platforms, in particular the Marvell
Armada 7K/8K device tree files are changed in preparation for future
SoC support, based on more than two of the same chips in one package,
and some boards get renamed for oxnas for consistency.
Finally, many existing SoCs gain descriptions for additional on-chip
devices that we can now support with kernel drivers:
Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG)
Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi)
Aspeed clk controller support
Freescale LS1088A, LS1021A device support
Gemini Ethernet, PCI, TVE, panel
Keystone gpio, qspi, more uarts
Mediatek cpufreq, regulator, clock, reset
Marvell thermal, cpufreq, nand
Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu
Rockchip Mipi, GPU, display
Samsung Exynos5433 PMU, power domain, nfc
Spreadtrum: sc9860 clocks
Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ...
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"We get a moderate number of new machines this time, and only one new
SoC variant (Actions S700):
Actions:
- S700 Soc and CubieBoard7 development board
- Allo.com Sparky Single-board-computer
Allwinner:
- Orange Pi R1 development board
- Libre Computer Board ALL-H3-CC H3 single-board computer
ASpeed ast2x00:
- Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
- Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
- Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
AT91:
- Axentia Nattis/Natte digital signage
- sama5d2 PTC-ek Evaluation board
Freescale/NXP i.MX:
- SolidRun Humminboard2 development board
- Variscite DART-MX6 SoM and Carrier-board
- Technologic TS-4600 and TS-7970 development board
- Toradex Colibri iMX7D SoM board
- v1.5 variant of Solidrun Cubox-i and Hummingboard
Freescale/NXP Layerscape:
- Moxa UC-8410A Series industrial computer
Gemini:
- D-Link DNS-313 NAS enclosure
OMAP:
- LogicPD OMAP35xx SOM-LV devkit
- LogicPD OMAP35xx Torpedo devkit
Renesas:
- r8a77970 (V3M) Starter Kit board
- r8a7795 (M3-W) Salvator-XS board
We finally managed to get the dtc warnings under control, with no more
build-time warnings for bad device tree files. This includes fixes for
the majority of platforms, including nomadik, samsung, lpc32xx, STi,
spear, mediatek, freescale, qcom, realview, keystone, omap, kirkwood,
renesas, hisilicon, and broadcom.
Files get rearranged on a few platforms, in particular the Marvell
Armada 7K/8K device tree files are changed in preparation for future
SoC support, based on more than two of the same chips in one package,
and some boards get renamed for oxnas for consistency.
Finally, many existing SoCs gain descriptions for additional on-chip
devices that we can now support with kernel drivers:
- Allwinner A83t (drm, ethernet, i2c, ...), H3/H5 (USB-OTG)
- Amlogic AXG family (clk, pinctrl, pwm, ...), and others (vpu, hdmi)
- Aspeed clk controller support
- Freescale LS1088A, LS1021A device support
- Gemini Ethernet, PCI, TVE, panel
- Keystone gpio, qspi, more uarts
- Mediatek cpufreq, regulator, clock, reset
- Marvell thermal, cpufreq, nand
- Renesas SMP, thermal, timer, PWM, sound, phy, ipmmu
- Rockchip Mipi, GPU, display
- Samsung Exynos5433 PMU, power domain, nfc
- Spreadtrum: sc9860 clocks
- Tegra TX2 PSDI, HDMI, I2C,SMMU, display, fuse, ..."
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (690 commits)
arm64: dts: stratix10: fix SPI settings
ARM: dts: socfpga: add i2c reset signals
arm64: dts: stratix10: add USB ECC reset bit
arm64: dts: stratix10: enable USB on the devkit
ARM: dts: socfpga: disable over-current for Arria10 USB devkit
ARM: dts: Nokia N9: add support for up/down keys in the dts
ARM: dts: nomadik: add interrupt-parent for clcd
ARM: dts: Add ethernet to a bunch of platforms
ARM: dts: Add ethernet to the Gemini SoC
ARM: dts: rename oxnas dts files
ARM: dts: s5pv210: add interrupt-parent for ohci
ARM: lpc3250: fix uda1380 gpio numbers
ARM: dts: STi: Add gpio polarity for "hdmi,hpd-gpio" property
ARM: dts: dra7: Reduce shut down temperature of non-cpu thermal zones
ARM: dts: n900: Add aliases for lcd and tvout displays
ARM: dts: Update ti-sysc data for existing users
ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string
arm: spear13xx: Fix spics gpio controller's warning
arm: spear13xx: Fix dmas cells
...
Andrew Jeffery
AngeloGioacchino Del Regno
Jianqun Xu
Kiran Gunda
Alexandre Torgue
Biju Das
Linus Torvalds
Peter Vernia
Vinod Koul
Linus Walleij
Rob Herring
Jitendra Sharma
Stefan Wahren
Zhou Yanjie
Marc Gonzalez
Prasad Sodagudi
Chris Packham
Anson Huang
Geert Uytterhoeven
Icenowy Zheng
Hongwei Zhang
Bjorn Andersson
Manivannan Sadhasivam
Krishna Yarlagadda
Colin Ian King
Jerome Brunet
Florian Fainelli
Guillaume La Roque
Amelie Delaunay
Christian Lamparter
Fabien Parent
Christina Quast
Zhiyong Tao
Charles Keepax
Jonathan Neuschäfer
Claudiu Beznea
Bai Ping
Brian Masney
Gregory CLEMENT
Marek Behún
Alexandre Belloni
Rafał Miłecki
Maxime Ripard
Shawn Guo
Mesih Kilinc
Chris Brandt
Ryder Lee
Saravanan Sekar
Benjamin Gaignard
A.s. Dong
Craig Tatlor
Phil Edworthy
Fabrizio Castro
Paul Cercueil
Yixun Lan
Tomer Maimon
Ludovic Barre
Lee Jones
Marcel Ziswiler
Krzysztof Kozlowski
Jisheng Zhang
Abel Vesa
Ludovic Desroches
Christian Lamparter
Stephen Boyd
Mauro Carvalho Chehab
Richard Fitzgerald
Sean Wang
Takeshi Kihara
David Wu
Martin Blumenstingl
Ricardo Silva
Matheus Castello
Sergei Shtylyov
Niklas Cassel
James Hogan
Phil Reid
Jacopo Mondi