Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the two BCM63138 PMB busses nodes found on this System-on-a-Chip as
described in their corresponding binding document.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVU1KlAAoJEN0jrNd/PrOhMKgP/jOIwMgc+RC6uud66kAb8oQ8
itcNWwhHFv/7fiCeIbCq8qsp51DHPxhDuWeBP/FIhfExJcDD+P2pfrKpXlI1bCrz
jgOHfgauKSzSEIQcFU3uYWMr7qR7euVtaBsB0v16HtSpTcRnNKv/hvlvYPFYVl5D
NvWyYB7hjHrbAur97vrJJ9e+RKZGfKo0bOqikyQ5ftbKcASa9HNY6JAeOrV+Delw
LPA3P98eXcwVSBgdHw++iOqVZNbs+kNXnRV8dcjgWXdXsI2LQGgZrbEb5WS7/29j
0Jaz9dwMJ4EC9yZaiT2sOXxdOjnSJ5MC1lE/CuCjE8Kz4fsq8sCudTp90fi6eFxT
QcrneJ7d7LzjprDpKdK8E/YgPHjp5pOVuBvqtJ/RtjHFCVlaZ5OvZMdNX0zqY7SU
T+3kYNXTcFhJHyQOtajGOSixVyqOEVddjjCvSyH+QXB6MmkH37Jcg6A7J/t6VrX3
eK0VQMqkB10hZj8pzP/kN4dpiw3YQXxszF9luQ10AjHZvnADyGKesaDXYEjGD3FL
ux1hjQHTAuRauID4XUzu2vfNQqYbLb0papQ+6RnlgBn4P+jS/45xTZEchUU5Xoj/
SGTgxqNM4TjCDGf6iYzpbKi/A/T46w5Xt05r2g57qkQPcITVJK6MHtbEmPjWR1jP
3CJ0qItO/dSTi61vV0XW
=8R5I
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding:
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
* tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix hda2codec_2x clock and reset names
ARM: tegra: Add Tegra30 HDA support
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply
ARM: tegra: venice2: Mark eMMC as non-removable
ARM: tegra: jetson-tk1: Enable HDA support
ARM: tegra: Add missing HDMI +5V regulator
ARM: tegra: cardhu: Add power and volume keys
ARM: tegra: Correct which USB controller has the UTMI pad registers
- Add a DTS node for the A9 SCU
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVU1L4AAoJEBmUBAuBoyj05zEP/02UJVcqCHT2P/z/1XJnIwed
hZgO0Oej4ZEc+futAIx6IeMEkgNoIDZX1rdijiQe3Uv2QK8niC7R8yOjwcZrM8jZ
ws/jyKWpCBsV0J+lzZevxa3DpxMHPmcx0W9gAqYpikrwgbXt0Dyy62CQkp+XKZ5d
mluxSEbkSlORddzD8eQbM1yuVlFGg9RAzdwaeZk4j6x+vq2Zk+jEwq5EKLBIiO/U
kGwu/mEryiWl+lzqV7Nlagt4uLASsT5ZxEjr4zUx9ddDTJo4mqStqONdDPMTdf9h
0qzHrWa9mMhI7RLoOWBuvTEcvEVPSRNhVfo6cY8ZnQcZ/V5tj4sG3jAPUFXkFSMd
iZW3mud5P45ugbKiumR5R7ve3t6yxhvNqWH9FZqfnlPPNXtCaUqBGB772A0Xr2Hz
mRPu2Vl9cjmGdrWQHqF5sViPdm52E8Het3/HO0ccsx4aoH+jhgGKeqmiK779EKTA
lA0NPBrL5PRzjNacNwnR7RxtLpcISf5CbsV0ojiIDtB8x11TCg1Zct+ogeE03luT
YpTNuOgTEg7Gy4oa6LPPXahUS+6RffHmASjlt15xaWx/x5MaCXTyk3H4JtSumDiL
blFzdQmNUcO2YpggSgyS0UzRFyqYJIRPq7lHKMJz5NMfaHVzu4VzoDKmJVo4zG2T
BftEOP7ROh5wq1HkWJs3
=23ne
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen:
- Add a DTS node for the A9 SCU
* tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add the a9-scu node
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJVU2Y0AAoJEPOmecmc0R2BXCQIAIV6yQP+f6ACIPJEVRk8yD3W
YyJ/mXgrSD/RaaFYnEO3PPVC8TibVI6a7SIoa4y92g0LW7VYn7UQY1wzlrt3rzR5
rY71uB/Ew0yQBJe1rsw+Sn7couG9U/g3YB/guJmFfO2rS9xn6wICKcLxYNaIp9sb
WOwzNlpWwpejCdYLzxw9BP0qxFRE2ZlxoF96VB+j5s+IcnvKGGo3twYqtyN5YEjK
dB7Bbnq6n9VWgYMkuijxyQ00skUNUb+7ciHSO4pksPtuSa4K+GsqjkTu37nkBPmn
t53c+M93WuI5hplFRM3UwXKH6ELqhEuq0GN4dPzRD5VBWcWYOMXl8AmhfOlR6cU=
=39uK
-----END PGP SIGNATURE-----
Merge tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner:
Some misc improvements defining additional supply regulators, enabling
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
* tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
ARM: dts: rockchip: add properties for dwc2 usb otg controller
ARM: dts: rockchip: enable tsadc on rk3288 boards
ARM: dts: rockchip: add act8846 supplies on rk3288-firefly
ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUyYjAAoJEEEQszewGV1zZGIP/jiHCMNtMgFOjPxfDI3lwvpl
p9b6YUeEVknUk0yObYmHcqt6vg71zhiAUndJV5P/dN7jN2n8Cr7JIs52uVkpGuhh
2CkQgXTMlCpR6LnFWgUT1OMRKg6EBP/JFOJdHbFq+HD6QsBAD9oKULt9VPValtrM
2VkktKaetXHJND7nwdC8MTKe+4oOs/YpOy+yKVYb/iWNMrTCPCFLBI5BRKLUaPdd
A0EtGARSkCGU9QZkGvuyhI4UY1KWi4JjKfD9GNmka3FTq8y5MGjdgn1VEw9whZcW
wtJFiTuZ9CM+Jm+WyJx6bdZwlIjMKMrGaaMDeRnoh9UQml4+DDyJJWgbeAT8rhQS
XP5NG4I9X1RSqen1XUikPPBl2V5u1baIfaP4noLxuu4yVYfUTuC76T+k+FCAPxQu
Ymw/RWWmPwodXrN7OBlpPW7rTUk269LVCrWpIFQkhkDnrmYH4Rs8CAv4boDd3yj1
P4ew49Cu0Y489vR8DBndbUlXjL/ssD2Uh4DZp8fzURTfnu2P6Yzk9Q98At87uqqp
Hz/OfLBcnX5N7myu+fMkKBf7Ju3Nz/Ho1hA/q8rsPXfazvQcYm5gL9vI1wljRn0B
b8++F+scoiM0iEY/OpjWX8box9w+gE7lq/14QqRVpRmCNyC1JtlQT7AoXCSDMkic
EJn4vhHoLu4Bhl9/ypND
=+QE+
-----END PGP SIGNATURE-----
Merge tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Ux500 Device Tree changes for the v4.2 series" form Linus Walleij:
Define CPU topology, connect that with CoreSight blocks,
add sensor information to DT boards.
* tag 'ux500-v4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: add the sensors to the STUIB board
ARM: ux500: assign the sensor trigger IRQs
ARM: ux500: fix lsm303dlh magnetometer compat string
ARM: ux500: add CoreSight blocks to DTS file
ARM: ux500: define CPU topology
This adds the device tree data for the LIS331DL and the
AK8974 magnetometer to the STUIB board device tree include
file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The ST sensors on the Ux500 boards were not utilizing the IRQs
for data ready sample triggers. Enable this by assigning the
right GPIO lines and interrupt lines (when the GPIO lines are
used for IRQs) to the accelerometer, gyro and magnetometer
sensors.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The magnetometer found on the Ux500 TVK and Snowball boards
is a LSM303DLH not a LSM303DLM, small differences but still
different. Put in the right compatible strings and things start
working smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This registers all the CoreSight blocks on the DB8500 SoC:
each core has a PTM (v1.0, r1p0-00rel0) connected, both connected
to a funnel (DK-TM908-r0p1-00rel0) which in turn connects to a
replicator (DM-TM909-r0p1-00rel0). The replicator has two outputs,
port 0 to a TPIU interface and port 1 to an ETB
(DK-TM907-r0p3-00rel0). The CoreSight blocks are all clocked by
the APEATCLK from the PRCMU and their AHB interconnect is clocked
from a separate clock called APETRACECLK.
The SoC also has a CTI/CTM block which can be added later as we
have upstream support in the CoreSight subsystem.
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.
Here we are enabling PMU IRQs on both channels.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is ARM's generic Performance Monitoring Unit.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
All the infrastructure is now in place for ST's PWM controller. This
patch takes the final step and enables the IP on the 2020 Rev-E
development platform.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416
based development boards.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Supply top level nodes for the STiH407 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Each pxa has an embedded OS Timers IP. The kernel cannot work without a
valid clocksource, and this adds the OS Timers to the pxa device-tree
description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Add clocks to the IPs already described in the pxa device-tree
files. There are more clocks in the clock tree than IPs described in the
current pxa device-tree.
This patch ensures that :
- the current description is correct
- the clocks are actually claimed, so that clock framework doesn't
disable them automatically (unused clocks shutdown)
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
pxa27x variant has 2 I2C busses on the SoC :
- the casual I2C
- the power I2C, normally driving power regulators, and capable of
receiving orders on core frequency modifications
Add the missing pwri2c to pxa27x description.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The act8846 is the main pmic and system-power-controller on radxarock boards,
so add the necessary property.
Signed-off-by: Michael Niewoehner <mniewoeh@stud.hs-offenburg.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVUQKFAAoJEBx+YmzsjxAgescP/3hr9XCfBlJ7Grxcw85cpgsc
6qsUYVIUSZWD1SDwxXtSbcqqbLjLnVkfmn4//TK38Vtlod79rMrMEwCBiM9ugNF0
KdsvaX9Y/lhT8vT37wqwxy36JYP1BYciYtQn1x+gitBlgkwAtHmNHnbJgw1pgAtR
yK3xjACBn3mw17NlXq2/cQ0aPX7eap1OZ7X14UM82tiFBMUDKb6xh1oz52Yh6bYE
h+KYI7GVCzmfLk3keqdv1KjhJQC1Xu2t9aWixSU+r5F9vu3/dVzZhQQ+4c3lQJCC
71V2uW7KblWEjrJwftqP6hjTAQlWbR8gVx/ICM44gpwnKXYANDL7O+FDgemW4wim
er2EFuzKPcll9jYwzrXe1w5jllxLae2lvmQy1in9fW80FUZExTjOuJxtKPWc2t7J
2DBn8PspwoJDKgo2OkAydNstef+WmFM0xDPeP7xTU7k0k3QpjQY5bTEm39PzVuoa
CtLhV63ndpxbGXoJglZ7PQiMH+APkX3rjYH2aRvD6cAuVDqPjAJTKkNJ0VLx2gaz
wd5rw726Ob8p/1T34/z84c6Rh0wOhBnNGzb0zbAMhXveyjfmLLS9sUwvD8Yuv7EU
5p0TfM5uRxoxQP2VOFPxHr0ZGEYHVaX918khfD3ykF0jpAfz5FhCCZsbhoJDMLuY
HLUb0hp5v6D1zRM95tdg
=6TQo
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.1, take 1" from Maxime Ripard:
All the device tree related changes for the 4.1 merge window.
It has a rather big diffstat, because of a lot of mechanical and harmless
changes, as described below.
There is mostly:
- The end of the DT relicensing. All our DT should now be under the dual
X11/GPL license.
- Convertion of all the DT to a label based syntax, instead of
duplicating the tree like was done before.
- Rework of the A10s and A13 DTSI to share the common devices
- A few drivers enablings: A80 USB, the A31 PMIC, A31 and A23 arch
timers, etc
- Fix the checkpatch warnings
- A few new boards : cubieboard4, mele i7, utoo p66, auxtex t004,
pcduino3 nano, gemei G9, mk808c, jesurun q5, orange pi, orange pi mini
* tag 'sunxi-dt-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (84 commits)
ARM: sunxi: dt: Split the SPI pinctrl groups
ARM: sunxi: dt: Fix whitespace errors
ARM: sunxi: DT: Fix lines over 80 characters
ARM: sunxi: dt: Remove the FSF address
ARM: sunxi: dts: split IR pins for A10 and A20
ARM: sun7i: dt: Add new MK808C device
ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node
ARM: dts: sunxi: Update ahb clocks for sun5i and sun7i
ARM: dts: sun7i: Add dts file for the Jesurun Q5 top set box
ARM: dts: sun5i: Enable touchscreen on Utoo P66
ARM: dts: sun7i: Add dts file for the Orangepi mini SBC
ARM: dts: sun7i: Add dts file for the Orangepi SBC
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller
ARM: dts: sun4i: Add A10 SRAM and SRAM controller
ARM: dts: sun5i: Add broken-hpi property for Utoo-P66 eMMC
ARM: sun8i: dt: Enable A23 SMP support
ARM: dts: sun6i: Add cpu thermal zones to dtsi
ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi
ARM: sunxi: DT: Add stdout-path property
...
Highlights:
-----------
- Add DT nodes for SSC on STiH407 family
- Add DT nodes for SD/MMC on STiH407 & STiH418
- Add DT node for LPC on STiH407
- Add Sata DT nodes for STiH407
- Fix PIO3 & PIO35 pins retiming on STiH407
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVQjPFAAoJEMo4jShGhw+JdX0P/AmZ8/+UhflYisudIVvCH1Ok
QPUno7423gjgwGNIyOI8E2ueQA80FJohpabeIRSIzMz/rQsWsCFMsc/f5rr7CKdj
rFx11I9t7xabYZxgEzbfzJMXEKP1ZndBbt3p76no/ynSo515Y8t+mxsTxW8maqCZ
8l8Cr8eSp292foZujs74O6xno77NXZvf/O9zvLNcTrUOT8RBzKMyQ9L0gcMz8FKT
GZB2CVDMHgUBnaQdaPKOa3adJ2IOzQcJjDhGIisLwF2Mv5Li3YPjI41t/b5g591Q
Jvf5NZmz0v0cSZltfZsSuulYUeXBizzHLWMM+viRharsZf2UahiFilr8uyXtnBJI
QgkCbWlaDmz+YEzJQaHy359eDw4NjGNE54AcjSE+sNImu0N4s0WUPdaXt5DQADvq
Xi4KlMGfkiwpt9Lm8PoM4vY8NoNeGH0CRKdUQQhBkYn3De4VW/G0N+NOgOsTsEyQ
hLqGvJnnmps3gMn/m+XSBMVNVZEwDmxMFt4hzNCwaDn0NKhzxxYrbQNK0sdbf8tR
H8yWpQLtO+pVoSTrvOPqHWiGcfe+vHmynVmVHQj17/w7ho3JW0cTgXHmgSNZahnW
omluWSFi5CswNYG/So6vsThXemp+omsCOUMCfaPoFz/6pE+kTsYvw245JvgtrD4w
DcWnjE7MQ8NQc8lK9YX7
=fWhS
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Pull "STi DT updates for v4.2, round 1." from Maxime Coquelin:
Highlights:
-----------
- Add DT nodes for SSC on STiH407 family
- Add DT nodes for SD/MMC on STiH407 & STiH418
- Add DT node for LPC on STiH407
- Add Sata DT nodes for STiH407
- Fix PIO3 & PIO35 pins retiming on STiH407
* tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: DT: STi: STiH407: Add sata DT nodes.
ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35
ARM: STi: DT: STiH407: Add Device Tree node for the LPC
mfd: dt-bindings: Provide human readable defines for LPC mode choosing
ARM: STi: DT: STiH418: Add dt nodes for sdhci and emmc.
ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc.
ARM: sti: Provide DT nodes for SBC SSC[0..2]
ARM: sti: Provide DT nodes for SSC[0..4]
This patch adds DMA properties to the HSUSB node.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds DMA properties to the HSUSB node.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add all the clock nodes for the Arria10 platform. At the same time, update
the peripherals with their respective clocks property.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add the l4_sys_free_clk node
Add tx-fifo-depth and rx-fifo-depth devicetree properties for socfpga
stmmac. These devicetree properties will be used to configure certain
features of the stmmac on the socfpga.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add multicast-filter-bins and perfect-filter-entries configuration properties
to the socfpga devicetree for the Arria 10 socfpga.
Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc
as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus
we will need to have 2 separate board files, one for SDMMC and one for
QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi
so that we use common peripherals for each flavor of the devkits.
Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Arria10 devkit is using UART1 for the debug uart port. Remove
unused aliases.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: Add removal of unused aliases
Add status = "disabled" in the base DTSI for Arria10. The SDMMC and uart
nodes should be enabled in the appropriate board file.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This patch adds the DTS bindings for the adxl34x digital
accelerometer.
Signed-off-by: Walter Lozano <walter@vanguardiasur.com.ar>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
With reworked device tree files for Compulab CM-A510 SoM and SBC-A510
base board, now add the correspoding board file to Makefile again.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Existing dts file for Compulab CM-A510 was very limited due to missing
hardware. Now that we actually found somebody with that board, properly
rework it to provide a CoM/SoM include and a board file for Compulab's
SBC-A510.
Both the CM-A510 SoM and the SBC-A510 can be configured with different
options, so we only enable a minimum set of options. The actual board
configuration will have to be set by either the bootloader or user.
Although functionally not required, repeat even disabled nodes again
to increse their visibility in the dtsi/dts files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Gabriel Dobato <dobatog@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Prior reworking Dove based Compulab CM-A510 device tree, remove it
from the compiled device tree files.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This adds a i2c-mux-pinctrl node to dove.dtsi for the internal i2c
mux found on Dove SoCs. Up to now, we had no board using any of the
two additional i2c busses, so make sure the change does not break
any existing boards.
Therefore, we rename the i2c-controller node label to "i2c" and
enable it by default. Also, the dedicated sub-bus (now "i2c0") is
enabled by default. The two optional sub-busses require additional
external pin-muxing, so disable them by default.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The clock-frequency property became obsolete since the rework of the main
clock driver in 3.16 (see commit 27cb1c2083).
It now get and uses the clock-frequency from the main_xtal node.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add DT file for Kizbox 2 board.
This board is based on Atmel's SAMA5D31 Cortex-A5 SoC.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add DT file for Kizbox mini board.
This board is based on Atmel's AT91SAM9G25 SoC.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Note that from now on any of the pfc8575 gpio keys will wake up the
system, as the pfc8575 cannot mask individual interrupts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl008k is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Spansion s25fl512s is compatible with "nor-jedec". Hence add the
"nor-jedec" compatible value, so the driver can bind against the generic
name, cfr. commit 8ff16cf77c ("Documentation: devicetree: m25p80:
add "nor-jedec" binding").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module
clock, so they can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: corrected typo in changelog to refer to r8a73a4]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- fixes commit ea08de16eb ("ARM: dts: Add DISP1 power
domain for exynos5420") which causes 'unhandled fault:
imprecise external abort' error when PD turned off.
: make DP a consumer of DISP1 power domain
- fixes 's3c-rtc' probe failure on Odriod-X2/U2/U3 boards.
: add 'rtc_src' clock to rtc node for source clock of rtc
- fixes typo for 'cpu-crit-0' trip point on exynos5420/5440
- fixes S2R failure on exynos5250-snow due to card power of
Marvell WiFi driver (suspend/resume)
: add keep-power-in-susped to WiFi SDIO node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVT23xAAoJEA0Cl+kVi2xqZIcP/0CAA25uvidVXdNVYlJbSvr3
4kesNDG/LGrVnv6xt132iJsXtIfWQxG6nJkhE1x5G9zSgsAjtQWcsCr068Itktsg
CG1yl/8z6TB+wS0PhTXaa985V62euTws89YGJau6YCZVSXKKcGDjM5e2RJn80yOL
IMipw8x5xTt0GsIKtC2AyewcNq05SSNtwvYe8CPJ9wGFQPy3gZ1t5WqSwW2mMG+K
C6mibaN7gs9+sS2ncHglZtHKAR2VxJTNCkq/LOCYlDSftT01GhmhG1fl/tUxEqUD
1bFTTajA21CNnEvWCdkFkMHkEy7lzW8WCX3tAwDHGON/NdWERV4FSaLTqR0o1ekO
vLeUSvgtRntBtUY3ojvyfoYq4vrdQF1uoL2r932iO9FILUBpwRYAyG152VFJyZRx
Hx50yCgyljG3X8xUp5VgiuNwDCgatiFBCeb3YT0qrB9YbnLXqqAUAfMSng8a15dc
rbD02YsYvYcJPf7RDnS9QQV+ZSSmZIkY7JmxkJ/UJ0SA7dAJBtKrXQyliLVlExHu
Cz0ye5NHjC+jxwPU/OEFRSZi8bKJXe/q6bAXDRA0vkZWd0G6C+wOq8bnzSWkRM+D
+/uzxajdDbfs7mr2mPFyc3H22MiwWSOFIRVsCXVKqTN0yVvlaLvHtolUayAD3RrR
oo25jYh9CYGZhxd+7TVb
=YBxq
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
Pull samsung fixes from Kukjin Kim:
"Here is Samsung fixes for v4.1. Since I've missed to send this via
arm-soc tree before v4.1-rc3, so I'm sending this to you directly
- fix commit ea08de16eb ("ARM: dts: Add DISP1 power domain for
exynos5420") which causes 'unhandled fault: imprecise external
abort' error when PD turned off. ("make DP a consumer of DISP1
power domain")
- fix 's3c-rtc' probe failure on Odriod-X2/U2/U3 boards ("add
'rtc_src' clock to rtc node for source clock of rtc")
- fix typo for 'cpu-crit-0' trip point on exynos5420/5440
- fix S2R failure on exynos5250-snow due to card power of Marvell
WiFi driver (suspend/resume) ("add keep-power-in-susped to WiFi
SDIO node")"
* tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for exynos5250-snow
ARM: dts: Fix typo in trip point temperature for exynos5420/5440
ARM: dts: add 'rtc_src' clock to rtc node for exynos4412-odroid boards
ARM: dts: Make DP a consumer of DISP1 power domain on Exynos5420
The pinctrl groups for SPI until now were also adding the chip selects in
the SPI pinctrl group.
This was causing a few issues, since a board was forced to use a random
number of chipselects, even though it might use one of these chip selects
for another pin.
The number of chipselects defined was also not the same from one group to
another because of different needs at the time these groups have been
introduced, resulting in no clear view from the board DTS on what exactly
is being muxed, which even might change in the future.
Solve this by creating different pinctrl groups for the chipselects and the
standard SPI pins (CLK, MOSI and MISO) so that we fix both issues.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A few lines (probably copy pasted) have an indentation mixing tabs and
spaces that triggers a checkpatch warning.
Fix those, and while we're at it, fix the space-indented sections.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
A few lines in our DTSIs are over the 80 characters limit, making
checkpatch complain about that.
If possible (and relevant), wrap these lines to 80 characters.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The FSF address triggers a warning on checkpatch, saying that the FSF
license is already present in the Linux source code, and that it has
already changed in the past.
Remove it from our DT, as suggested.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Marvell mwifiex driver prevents the system to enter into a suspend
state if the card power is not preserved during a suspend/resume cycle.
So Suspend-to-RAM and Suspend-to-idle are failing on Exynos5250 Snow.
Add the keep-power-in-suspend Power Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Remove the extra zero in the "cpu-crit-0" trip point for exynos5420
and exynos5440.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Exynos4412 SoC has a s3c6410 RTC where the source clock
is now a mandatory property.
This patch fixes probe failure of s3c-rtc on Odroid-X2/U2/U3 boards.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Commit ea08de16eb ("ARM: dts: Add DISP1 power domain for exynos5420")
added a device node for the Exynos5420 DISP1 power domain but dit not
make the DP controller a consumer of that power domain.
This causes an "Unhandled fault: imprecise external abort" error if the
exynos-dp driver tries to access the DP controller registers and the PD
was turned off. This lead to a kernel panic and a complete system hang.
Make the DP controller device node a consumer of the DISP1 power domain
to ensure that the PD is turned on when the exynos-dp driver is probed.
Fixes: ea08de16eb ("ARM: dts: Add DISP1 power domain for exynos5420")
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
add the device tree binding for the HiSilicon hip04 ethernet controller
based on Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Fathi Boudra <fathi.boudra@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This patch adds dts support for NAND flash controller of Hisilicon Soc Hip04.
Changes in v3:
- Change E-mail address in signed-off-by to "wangzhou1@hisilicon.com"
Changes in v2:
- Base on v3.19-rc1
- Use nand-ecc-strength, nand-ecc-step-size to replace hisi,nand-ecc-bits
Changes in v1:
- Move partition and other board related information into board dts file:
hip04-d01.dts
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Hisilicon Soc hip04 has four GPIO controllers, each one has 32
GPIOs and can be configured to be an interrupt controller.The GPIO
controllers are compatible with the snps,dw-apb-gpio driver.
This patch add the corresponding device tree nodes.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
in the Ux500 DT but triggered by proper error handling in v4.1-rc1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVP3/HAAoJEEEQszewGV1zl14QALjFq5SHR2sZJMxpXtnPA9+o
Gh/Xe+zx59VqxVFuxT13zY3YcD1b61DSQ4L8oLkMeNNx4Q3+YV4rl50aLiy3DUxf
oOHuIObv7rj70sYXVtMXX64mJCjAu9Y4+WAW4kqVrt5mnewptWp29jw7ioum6/+Q
NXg/qNGwRMmhvcDOybKMfTsro7g6VnB+qMDbm4//IOJlgldS13tUFGhRGdkC0mkM
pjM0a0bj2hHvkJ6+cvzzId3hcjVZwhqValOMA+rKdFTxarMFxUM3+QskhuVTl3ew
x+4uvXWmRa+44w4u9DgRXeIBXavpS2CpdqQkvuNPRa9IPD89iFGc5PaU9iCOchg8
xvN6l1Vm5pYbnmboLyT4aQ7MfFaScodFAQKIAJMUpMDl6CxjujQe7YEviLajuEQr
mDpap2Nc6Bdo9zcRzZ/PxJIvNXHe/MqAF0unsdTLEgyASrnkawxizLJ5rMsAJfAJ
ONI2DAafJenCf8wZV0XFzI1L4/UnH76w3r0DETV1YfExr3Wnx2c4ZcPJKXINcp1K
mle2dKsmN6q300hrOMyMPaykz1ndWhhkfy3d+Y3O8LE+hhjfJbZv+VWAOe0UaN+Q
pMDCngI+uoM63Vsh5WDe7x3M5AZ2QK3B/gWgwfDQ8KINnejBjfwH9LMnNSqDtdbz
jNtxHeeGAF86v8dCiXi7
=2YtL
-----END PGP SIGNATURE-----
Merge tag 'stericsson-fixes-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes
Merge "Ux500 fixes" from Linus Walleij:
This fixes an MMC/SD configuration issue present for some time
in the Ux500 DT but triggered by proper error handling in v4.1-rc1.
* tag 'stericsson-fixes-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Enable GPIO regulator for SD-card for snowball
ARM: ux500: Enable GPIO regulator for SD-card for HREF boards
ARM: ux500: Move GPIO regulator for SD-card into board DTSs
creeping up during idle, and two l3-noc device fixes:
- Fix power consumption creeping up with I2C4 staying on
- Fix n900 microphone bias voltages
- Fix dra7 l3-noc for host clock
- Fix omap5 l3-noc id address decoding
The rest are all just minor dts fixes:
- Fix changed EXTCON_USB_GPIO_USB in defconfig
- Fix missing isp and iva #iommu-cells property
- Various beagle x15 dts fixes for pre-production changes
- Fix am437x-sk display dts entries
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVR9VWAAoJEBvUPslcq6VzQSEP/1D526fNwGoivn3MmV5yi2yV
alVYxbcxOAbRrintH+ip2LXOzuQ4OdsMD+PbF9OzdiW2ynPiINq/tuchwC0vVcvU
Tv7kUA9GjeT/s+0pNodQYLRxAksw0SnBmz4ZnUwaY46MjGwO6nRirKtE1Ucb96M2
A61swMKtE+lYxc4Zxrr0QU7MRas7ukC9IGOjAFDasTzr3T/xm0IsWz79PE3rMVlI
kUncW+g42RigeikzpqTELU5lvmRzobO47MWHWsECyyIiLp9fsei+r8HmJc0gosaz
CTuUydUYNbxM9xbCKFXb2n7hBCzGiySQpFR25LXHJ8AAXKhR44rwjoZMwCF6j50C
ad5NXik/FcLuI8HSqFOPc0gIFIk4oM+0AmRGGvaKgBt1Wv2gViCtd+0CNuk07/vE
sFCc0Mnek9oLdWMwvSQ0g4ehJP/ejWiu1ZGsrQN7OliMe84340AkIVblMrHF6v4I
OULFeMr1e+/XVNaj15YXQBMRbNK7JcR+npPzhGZvuXnio73VuwbIOaz42CSnY3EI
ZiRLBfr8yGP5NQXOWNPp5ig+zcRviNRvr5o7hYR8LRtIyHvOGOafpSRn+7T0FEXK
SBD1u1yXoCB2rwoulTSWWVplUD5yn8duv0gDAGXgBuWhTuTdHc5FPbLf8KZ0KSsW
qGh6zuo3GvYJHi88DVjX
=tOGf
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.1/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v4.1-rc1" from Tony Lindgren:
Fixes for omaps, mostly a fix for power power consumption
creeping up during idle, and two l3-noc device fixes:
- Fix power consumption creeping up with I2C4 staying on
- Fix n900 microphone bias voltages
- Fix dra7 l3-noc for host clock
- Fix omap5 l3-noc id address decoding
The rest are all just minor dts fixes:
- Fix changed EXTCON_USB_GPIO_USB in defconfig
- Fix missing isp and iva #iommu-cells property
- Various beagle x15 dts fixes for pre-production changes
- Fix am437x-sk display dts entries
* tag 'omap-for-v4.1/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: omap_l3_noc: Fix master id address decoding for OMAP5
bus: omap_l3_noc: Fix offset for DRA7 CLK1_HOST_CLK1_2 instance
ARM: dts: dra7: Fix efuse register size for ABB
ARM: dts: am57xx-beagle-x15: Switch GPIO fan number
ARM: dts: am57xx-beagle-x15: Switch UART mux pins
ARM: dts: am437x-sk: reduce col-scan-delay-us
ARM: dts: am437x-sk: fix for new newhaven display module revision
ARM: dts: am57xx-beagle-x15: Fix RTC aliases
ARM: dts: am57xx-beagle-x15: Fix IRQ type for mcp7941x
ARM: dts: omap3: Add #iommu-cells to isp and iva iommu
ARM: omap2plus_defconfig: Enable EXTCON_USB_GPIO
ARM: dts: OMAP3-N900: Add microphone bias voltages
ARM: OMAP2+: Fix omap off idle power consumption creeping up
Disable the unused internal RTC in the dts of the OpenBlock AX3
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlVDtLIACgkQCwYYjhRyO9WCiwCfTBYFFDMZxK/W9qLdhU8mj/iD
tDQAn3TDsfWEIHm+c6DeZqj35Q74yPGA
=Gggv
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-4.1' of git://git.infradead.org/linux-mvebu into fixes
Pull "mvebu fix for 4.1" from Gregory CLEMENT:
Disable the unused internal RTC in the dts of the OpenBlock AX3
* tag 'mvebu-fixes-4.1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: armada-xp-openblocks-ax3-4: Disable internal RTC
The USB3 controller is present on the b2199 board, so enable
it in the board specific DT file.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
STiH418 miphy28lp port0/1 need the oscillator clock configured in the same way
as on STiH407/STiH410 platforms.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The USB3 controller is present on both variants of the b2120 board so
enable the controller in the generic stihxxx-b2120.dtsi file.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Now that both usb2 and usb3 phy drivers, and also the ST dwc3 glue code
are all present upstream, we can add the dwc3 DT node and have a working
usb3 controller on stih407-b2120 and stih410-b2020.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Ths picophyreset is incorrectly defined, which stops the usb2 phy being
taken out of reset.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The binding documentation says that these should be named hda2codec_2x
but the DTSI names them hdacodec_2x.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
[treding@nvidia.com: add a brief commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device node for the HDA controller found on Tegra30.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The word "sticker" was misspelled as "stciker". Fix it.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
[treding@nvidia.com: add a brief commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
eMMC is soldered on to the board, and as such isn't removable. Mark it
as non-removable so that operating systems can treat it appropriately.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:
1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
11 bits on OMAP5 as against 8 bits on OMAP4, with the master
NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
field.
2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
input sources on OMAP5. The common DEBUGSS source is at a
different input on each SoC.
Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix a typo in DRA7 dtsi where 12 bytes are needed for register
description of ABB efuse registers, however only 8 bytes are provided
to map. For some weird reason, this does not generate abort at offset
0x8, probably due to default maps already provided in io.c for the bus
register ranges.
Reported-by: Matt Gessner <Matt.Gessner@windriver.com>
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 pre-production change includes switching the GPIO fan
gpio over from 1 to 2 to allow for a potential fix at a later point in
time for USB client VBUS detection using PMIC VBUS detect capability.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 pre-production change includes switching over to UART
pins that now allow for UART download capability. All original boards
should either have been returned for modifications or already modified
for the required change and maintaining compatibility for older boards
are no longer needed.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The new AM437x SK Beta boards have removed the
large capacitors on the gpio-matrix column lines
which means we can reduce col-scan-delay-us to 5us
without loosing functionality.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM437x Starter Kit uses a NewHaven Display module with
a 4.3" display and EDT FT5306 touchscreen
On that module's new revision, NewHave decided to change
the pinout on the 6 pin flat-pcb touchscreen connector so
that instead of having WAKE pin, we now have RESETn.
The new display module is available on AM437x SK Beta and
all new revisions while the older revision is only available
on AM437x SK Alpha which, unfortunately, can't be supported
anymore in mainline without a revert of this patch.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With commit bc078316d8 ("ARM: dts: DRA7: Add node for RTC"), we now
have AM57xx RTC register itself as alias 0 even before DS1307 or TPS
rtc drivers are loaded up. However, since neither TPS, nor AM57xx RTC
are capable of being backedup by battery, we would like to maintain
the "primary" rtc as mcp79410 rtc device.
This also generates the following warnings in the bootlog highlighting
the issue:
[ 5.895445] rtc-ds1307 2-006f: /aliases ID 0 not available
...
[ 6.476285] palmas-rtc 48070000.i2c:tps659038@58:tps659038_rtc: /aliases ID 1 not available
So, add proper aliases to ensure that RTC order is always consistent
to userspace immaterial of probe order.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The interrupt polarity provided in devicetree is used to configure
the interrupt controller(ARM GIC), however, it seems that we have an
inverter at the GIC boundary inside AM57xx which inverts the signal
input from sys_irq external interrupt source.
Further, as per GIC distributor TRM,
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438d/BGBHIACJ.html#BABJFCFB
ARM GIC distributor does not support IRQ trigger type
IRQ_TYPE_LEVEL_LOW, and only rising or level high signals.
However, for some reason, the current configuration(which gets ignored
by GIC driver) functions on some platforms, however, on few platforms
results in infinite interrupts hogging the system down.
Switch over to rising edge for GIC configuration which is also aligned
with trigger point from the RTC chip and the internal inversion.
Fixes: 5a0f93c657 ("ARM: dts: Add am57xx-beagle-x15")
Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add missing #iommu-cells property to the isp and iva iommu nodes. This
fixes the binding (property is required according to the generic iommu
binding) and removes the following kernel warning triggered once the
iommu nodes are referenced:
[ 0.647521] /ocp/isp@480bc000: could not get #iommu-cells for /ocp/mmu@480bd400
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
N900 audio recording needs that codec provides bias voltage for integrated
digital microphone and headset microphone depending which one is used.
Digital microphone uses 2 V bias and it comes from the codec A part. Codec
B part drives the headset microphone bias and that is set to 2.5 V.
Cc: stable@vger.kernel.org # v3.16+
Signed-off-by: Pavel Machek <pavel@ucw.cz>
[Jarkko: Headset mic bias changed to 2 (2.5 V) as it was before commit
e2e8bfdf61 ("ASoC: tlv320aic3x: Convert mic bias to a supply widget")]
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit fb50a116bb ("drm/tegra: hdmi - Add connector supply support")
introduced a new supply for HDMI connectors that is used to control the
voltage on the +5V pin. Not all boards have had the corresponding supply
added to their device tree files, causing the following warning message
during boot:
[ 0.859698] 54280000.hdmi supply hdmi not found, using dummy regulator
Add such a regulator to the Seaboard DTS to enable the driver to control
this voltage and get rid of the warning.
Reported-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Cardhu has a power key on the top-right as well as volume up and
volume down keys on the right side.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Currently none of the target boards nor the driver supports
IR TX. However this pin is used in a few instances as a GPIO.
Split the pin ctrl descriptions so that only the IR RX is
configured to be used.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The adv7511 IRQ is low level triggered, not falling edge triggered. The
wrong sense configuration results in no interrupt being triggered at
all, breaking hotplug detection. Fix it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Fixes: 83a0731b39 ("ARM: shmobile: koelsch: Add DU HDMI output support")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that the miphy28lp is upstream, we can add the sata dt nodes
for stih407 family silicon. This has been tested on b2120 board
J4 (sata0 channel). These nodes are disabled by default as a
special mini pci-e to sata daughter board is required which
isn't shipped with the board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This will avoid programming the retime registers when not implemented
- PIO5 : no retime registers assigned to pins 6 and 7
- PIO35 : pin 7 is reserved so no retime register assigned to it
Signed-off-by: Karim BEN BELGACEM <karim.ben-belgacem@st.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
On current ST platforms the LPC controls a number of functions. This
patch enables support for the LPC Watchdog and LPC RTC devices on LPC1
and LPC2 respectively.
Signed-off-by: David Paris <david.paris@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Add dt nodes to enable sdhci / eMMC for stih418-b2199 board.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The nodes have been split to allow as much commonality as possible.
The stih407 has a silicon bug with eMMC UHS modes (with top regs)
and as such doesn't have any of the uhs dt properties.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Simplify the bootargs since the platform is booting from an initramfs and
set the kernel stdout path to DBGU.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Re-size NAND partitions since the bootstrap is able to read volumes from an
UBI image.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This:
* moves to pwm-leds using tcb-pwm driver and
* renames leds to pwm:<color>:<function>.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This:
* fixes active level of GPIO (active high) and
* renames buttons:
- reset (PB_RST), and
- mode to user (PB_USER).
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
USART3 is the only serial UART accessible.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Consists in:
* sorting nodes by address as possible or alphabetically,
* adding myself as new maintainer and
* update license.
Signed-off-by: Gaël PORTAY <g.portay@overkiz.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The MK808C is an A20 based android stick, with 1G RAM, 8G NAND flash,
a RTL8723au wifi + bt combo chip, a USB host ports using USB-A receptacles,
a mini USB-B receptacle for USB OTG, mini HDMI and a TRS connector for AV.
This patch adds basic support for the device, more information can be found
here (http://linux-sunxi.org/MK808C).
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Synchronous Serial Controller is used to provide SPI.
These are the ports which are located on the Stand-By Controller (SBC).
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The Synchronous Serial Controller is used to provide SPI.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
It should be the first controller, not the second. The indexes of the
usb resets were also wrong and have been fixed.
The issue was caused by the changes in 308efde ("ARM: tegra: Add resets
& has-utmi-pad-registers flag to all USB PHYs") being misapplied by git
due to the patch context being insufficient.
This broke USB after 6261b06 ("regulator: Defer lookup of supply to
regulator_get"), because it changed the order in which the controllers
were probed.
The fix for this issue was suggested by Mikko Perttunen and Tuomas
Tynkkynen.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Cc: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The pinctrl-assert-gpios is an invalid pinctrl property. It was
probably sneaked from vendor tree. Remove it.
Fixes: 4e18a2243a ("ARM: imx6qdl-sabreauto.dtsi: add max7310 support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The single SCIFB on SH-Mobile AG5 is called "scifb", not "scifb8".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The single SCIFB on R-Mobile A1 is called "scifb", not "scifb8".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable perf events on msm8660 devices by adding the pmu node.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add configuration nodes for following devices:
* GPIO block, with 22 pins
* MPP block, with 8 pins
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature.
* RTC device
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add configuration nodes for following devices:
* GPIO block, with 36 pins
* MPP block, with 8 pins
* Current ADC (IADC)
* Volatage ADC (VADC), with multiple inputs
* Thermal sensor device, which is using on chip VADC
channel report PMIC die temperature
* Power key device, which is responsible for clean system
reboot or shutdown
* White LED device
* RTC device
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>