Граф коммитов

17 Коммитов

Автор SHA1 Сообщение Дата
Ralf Baechle f8647b506d Merge branch '3.15-fixes' into mips-for-linux-next 2014-06-04 22:53:02 +02:00
David Daney a36d8225bc MIPS: OCTEON: Enable use of FPU
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.

Add r4k_fpu.o to handle low level FPU initialization.

Modify octeon_switch.S to save the FPU registers.  And include
r4k_switch.S to pick up more FPU support.

Get rid of "#define cpu_has_fpu		0"

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7006/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 21:01:09 +02:00
Ralf Baechle 76fbfc318d MIPS: Sort out mm_isBranchInstr.
mm_isBranchInstr() did reside in the math emu code even though it logically
is separate and also is used outside the math emu code.  In addition GCC 4.9.0
leaves the following unnnecessarily bloated function body for a non-microMIPS
configuration:

<mm_isBranchInstr>:
    105c:       afa50004        sw      a1,4(sp)
    1060:       afa60008        sw      a2,8(sp)
    1064:       afa7000c        sw      a3,12(sp)
    1068:       03e00008        jr      ra
    106c:       00001021        move    v0,zero

which stores arguments that are never going to be used on the stack frame.

Move mm_isBranchInstr() from cp1emu.c to branch.c, then split mm_isBranchInstr()
into a __mm_isBranchInstr() core and a mm_isBranchInstr() wrapper inline function
which only invokes __mm_isBranchInstr() on microMIPS configurations.

This shaves off 112 bytes off the kernel and improves code flow a bit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-23 15:12:37 +02:00
Ralf Baechle 41ca86e850 MIPS: Fix branch emulation of branch likely instructions.
Two issues:

  o For beql_op, beql_op, bne_op, bnel_op, blez_op, blezl_op, bgtz_op and
    bgtzl_op the wrong field was being checked for the instruction opcode.
  o For blez_op / blezl_op and bgtz_op / bgtzl_op the test was testing
    for the wrong opcode.

This bug got introduced by d8d4e3ae0b [MIPS
Kprobes: Refactor branch emulation].

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Acked-by: Victor Kamensky <kamensky@cisco.com>
2014-05-23 01:00:26 +02:00
Tony Wu fc192e50f8 MIPS: Cleanup indentation and whitespace
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5536/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01 15:10:57 +02:00
Steven J. Hill 8508488fe7 MIPS: MIPS16e: Support handling of delay slots.
Add logic needed to properly calculate exceptions for delay slots
when in MIPS16e mode.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09 17:55:20 +02:00
Leonid Yegoshin fb6883e580 MIPS: microMIPS: Support handling of delay slots.
Add logic needed to properly calculate exceptions for delay slots
when in microMIPS mode.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09 17:55:18 +02:00
Ralf Baechle 7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Maneesh Soni d8d4e3ae0b MIPS Kprobes: Refactor branch emulation
This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs->cp0_epc
as in case of kprobes where pt_regs->cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni <manesoni@cisco.com>
Signed-off-by: Victor Kamensky <kamensky@cisco.com>
Cc: David Daney <david.daney@cavium.com>
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:04:03 +00:00
Al Viro 8f5a00eb42 MIPS: Sanitize restart logics
Put the original syscall number into ->regs[0] when we leave syscall
with error.  Use it in restart logics.  Everything else will have
it 0 since we pass through SAVE_SOME on all the ways in.  Note that
in places like bad_stack and inllegal_syscall we leave it 0 - it's not
restartable.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1698/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-18 16:59:02 +01:00
David Daney 126336f065 MIPS: Compute branch returns for Cavium OCTEON specific branch instructions.
For Cavium OCTEON, compute the return epc value for OCTEON specific
branch instructions.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11 09:57:24 +00:00
Atsushi Nemoto 5e0373b8e4 [MIPS] Add some __user tags
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-13 17:40:01 +01:00
Atsushi Nemoto eae89076e6 [MIPS] Unify mips_fpu_soft_struct and mips_fpu_hard_structs.
The struct mips_fpu_soft_struct and mips_fpu_hard_struct are
completely same now and the kernel fpu emulator assumes that.  This
patch unifies them to mips_fpu_struct and get rid of mips_fpu_union.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00
Ralf Baechle ee1cca1b06 [MIPS] Fix branch emulation for floating-point exceptions.
In the branch emulation for floating-point exceptions, __compute_return_epc
must determine for bc1f et al which condition code bit to test. This is
based on bits <4:2> of the rt field. The switch statement to distinguish
bc1f et al needs to use only the two low bits of rt, but the old code tests
on the whole rt field.  This patch masks off the proper bits.
    
Signed-off-by: Win Treese <treese@acm.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-27 15:13:50 +01:00
Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:17 +01:00
Ralf Baechle 1d74f6bc85 __compute_return_epc() uses CFC1 instruction which might result in a
coprocessor unusable exception since the process can lose its fpu
context by preemption.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:31:13 +01:00
Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00