Billy Tsai ffa6e4d2d5 pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T ... [ Upstream commit c10cd03d69403fa0f00be8631bd4cb4690440ebd ] The register offset to disable the internal pull-down of GPIOR~T is 0x630 instead of 0x620, as specified in the Ast2600 datasheet v15 The datasheet can download from the official Aspeed website. Fixes: 15711ba6ff ("pinctrl: aspeed-g6: Add AST2600 pinconf support") Reported-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Message-ID: <20240313092809.2596644-1-billy_tsai@aspeedtech.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2024-05-17 11:50:44 +02:00
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Kconfig	pinctrl: aspeed: Add AST2600 pinmux support	2019-08-05 12:41:18 +02:00
Makefile	pinctrl: aspeed: Add AST2600 pinmux support	2019-08-05 12:41:18 +02:00
pinctrl-aspeed-g4.c	pinctrl: aspeed: Use masks to describe pinconf bitfields	2019-12-13 09:40:37 +01:00
pinctrl-aspeed-g5.c	pinctrl: aspeed: Fix minor documentation error	2021-05-19 02:11:18 +02:00
pinctrl-aspeed-g6.c	pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T	2024-05-17 11:50:44 +02:00
pinctrl-aspeed.c	pinctrl: aspeed: Fix confusing types in return value	2023-02-14 19:18:02 +01:00
pinctrl-aspeed.h	pinctrl: aspeed-g6: Add AST2600 pinconf support	2019-12-13 09:41:01 +01:00
pinmux-aspeed.c	pinctrl: aspeed: placate kernel-doc warnings	2021-08-10 15:29:44 +02:00
pinmux-aspeed.h	isystem: trim/fixup stdarg.h and other headers	2021-08-19 09:02:55 +09:00