WSL2-Linux-Kernel/include/dt-bindings/clock
Linus Torvalds db06f826ec The new and exciting feature this time around is in the clk core.
We've added duty cycle support to the clk API so that clk signal
 duty cycle ratios can be adjusted while taking into account things
 like clk dividers and clk tree hierarchy. So far only one SoC has
 implemented support for this, but I expect there will be more to
 come in the future.
 
 Outside of the core, we have the usual pile of clk driver updates
 and additions. The Amlogic meson driver got the most lines in the
 diffstat this time around because it added support for a whole bunch
 of hardware and duty cycle configuration. After that the Rockchip PX30,
 Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the diff.
 We're left with the collection of non-critical fixes after that. Overall
 it looks pretty quiet this time.
 
 Core:
  - Clk duty cycle support
  - Proper CLK_SET_RATE_GATE support throughout the tree
 
 New Drivers:
  - Actions Semi Owl series S700 SoC clk driver
  - Qualcomm SDM845 display clock controller
  - i.MX6SX ocram_s clk support
  - Uniphier NAND, USB3 PHY, and SPI clk support
  - Qualcomm RPMh clk driver
  - i.MX7D mailbox clk support
  - Maxim 9485 Programmable Clock Generator
  - Expose 32 kHz PLL on PXA SoCs
  - imx6sll GPIO clk gate support
  - Atmel at91 I2S audio clk support
  - SI544/SI514 clk on/off support
  - i.MX6UL GPIO clock gates in CCM CCGR
  - Renesas Crypto Engine clocks on R-Car H3
  - Renesas clk support for the new RZ/N1D SoC
  - Allwinner A64 display engine clock support
  - Support for Rockchip's PX30 SoC
  - Amlogic Meson axg PCIe and audio clocks
  - Amlogic Meson GEN CLK on gxbb, gxl and axg
 
 Updates:
  - Remove an unused variable from Exynos4412 ISP driver
  - Fix a thinko bug in SCMI clk division logic
  - Add missing of_node_put()s in some i.MX clk drivers
  - Tegra SDMMC clk jitter improvements with high speed signaling modes
  - SPDX tagging for qcom and cs2000-cp drivers
  - Stop leaking con ids in __clk_put()
  - Fix a corner case in fixed factor clk probing where node is in DT but
    parent clk is registered much later
  - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value
  - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
  - Convert to CLK_IS_CRITICAL for i.MX51/53 driver
  - Fix Tegra BPMP driver oops when xlating a NULL clk
  - Proper default configuration for vic03 and vde clks on Tegra124
  - Mark Tegra memory controller clks as critical
  - Fix array bounds clamp in Tegra's emc determine_rate() op
  - Ingenic i2s bit update and allow UDC clk to gate
  - Fix name of aspeed SDC clk define to have only one 'CLK'
  - Fix i.MX6QDL video clk parent
  - Critical clk markings for qcom SDM845
  - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
  - Mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it supplying
    the pwm used to drive the logic supply of the rk3399 core.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The new and exciting feature this time around is in the clk core.
  We've added duty cycle support to the clk API so that clk signal duty
  cycle ratios can be adjusted while taking into account things like clk
  dividers and clk tree hierarchy. So far only one SoC has implemented
  support for this, but I expect there will be more to come in the
  future.

  Outside of the core, we have the usual pile of clk driver updates and
  additions. The Amlogic meson driver got the most lines in the diffstat
  this time around because it added support for a whole bunch of
  hardware and duty cycle configuration. After that the Rockchip PX30,
  Qualcomm SDM845, and Renesas SoC drivers fill in a majority of the
  diff. We're left with the collection of non-critical fixes after that.
  Overall it looks pretty quiet this time.

  Core:
   - Clk duty cycle support
   - Proper CLK_SET_RATE_GATE support throughout the tree

  New Drivers:
   - Actions Semi Owl series S700 SoC clk driver
   - Qualcomm SDM845 display clock controller
   - i.MX6SX ocram_s clk support
   - Uniphier NAND, USB3 PHY, and SPI clk support
   - Qualcomm RPMh clk driver
   - i.MX7D mailbox clk support
   - Maxim 9485 Programmable Clock Generator
   - expose 32 kHz PLL on PXA SoCs
   - imx6sll GPIO clk gate support
   - Atmel at91 I2S audio clk support
   - SI544/SI514 clk on/off support
   - i.MX6UL GPIO clock gates in CCM CCGR
   - Renesas Crypto Engine clocks on R-Car H3
   - Renesas clk support for the new RZ/N1D SoC
   - Allwinner A64 display engine clock support
   - support for Rockchip's PX30 SoC
   - Amlogic Meson axg PCIe and audio clocks
   - Amlogic Meson GEN CLK on gxbb, gxl and axg

  Updates:
   - remove an unused variable from Exynos4412 ISP driver
   - fix a thinko bug in SCMI clk division logic
   - add missing of_node_put()s in some i.MX clk drivers
   - Tegra SDMMC clk jitter improvements with high speed signaling modes
   - SPDX tagging for qcom and cs2000-cp drivers
   - stop leaking con ids in __clk_put()
   - fix a corner case in fixed factor clk probing where node is in DT
     but parent clk is registered much later
   - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return
     value
   - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
   - convert to CLK_IS_CRITICAL for i.MX51/53 driver
   - fix Tegra BPMP driver oops when xlating a NULL clk
   - proper default configuration for vic03 and vde clks on Tegra124
   - mark Tegra memory controller clks as critical
   - fix array bounds clamp in Tegra's emc determine_rate() op
   - Ingenic i2s bit update and allow UDC clk to gate
   - fix name of aspeed SDC clk define to have only one 'CLK'
   - fix i.MX6QDL video clk parent
   - critical clk markings for qcom SDM845
   - fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
   - mark Rockchip's pclk_rkpwm_pmu as critical clock, due to it
     supplying the pwm used to drive the logic supply of the rk3399
     core"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (85 commits)
  clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
  clk: cs2000-cp: convert to SPDX identifiers
  clk: scmi: Fix the rounding of clock rate
  clk: qcom: Add display clock controller driver for SDM845
  clk: mvebu: armada-37xx-periph: Remove unused var num_parents
  clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable
  clk: actions: Add S700 SoC clock support
  dt-bindings: clock: Add S700 support for Actions Semi Soc's
  clk: actions: Add missing REGMAP_MMIO dependency
  clk: uniphier: add clock frequency support for SPI
  clk: uniphier: add more USB3 PHY clocks
  clk: uniphier: add NAND 200MHz clock
  clk: tegra: make sdmmc2 and sdmmc4 as sdmmc clocks
  clk: tegra: Add sdmmc mux divider clock
  clk: tegra: Refactor fractional divider calculation
  clk: tegra: Fix includes required by fence_udelay()
  clk: imx6sll: fix missing of_node_put()
  clk: imx6ul: fix missing of_node_put()
  clk: imx: add ocram_s clock for i.mx6sx
  clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent
  ...
2018-08-15 21:41:21 -07:00
..
actions,s700-cmu.h dt-bindings: clock: Add S700 support for Actions Semi Soc's 2018-07-25 16:40:53 -07:00
actions,s900-cmu.h dt-bindings: clock: Add Actions S900 clock bindings 2018-03-19 17:59:38 -07:00
alphascale,asm9260.h
am3.h
am4.h
aspeed-clock.h clk: aspeed: Fix SDCLK name 2018-07-06 13:56:06 -07:00
at91.h
ath79-clk.h
axg-aoclkc.h dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings 2018-05-15 14:07:11 +02:00
axg-audio-clkc.h dt-bindings: clock: add meson axg audio clock controller bindings 2018-06-22 12:59:05 +02:00
axg-clkc.h clk: meson: expose GEN_CLK clkid 2018-07-09 13:37:31 +02:00
axis,artpec6-clkctrl.h
bcm-cygnus.h
bcm-ns2.h
bcm-nsp.h
bcm-sr.h dt-bindings: clk: Update Stingray binding doc 2018-06-01 23:26:36 -07:00
bcm281xx.h
bcm2835-aux.h
bcm2835.h
bcm21664.h
berlin2.h
berlin2q.h
boston-clock.h
clps711x-clock.h
cortina,gemini-clock.h
dm814.h
dm816.h
dra7.h
efm32-cmu.h
exynos-audss-clk.h
exynos4.h
exynos7-clk.h
exynos3250.h
exynos5250.h
exynos5260-clk.h
exynos5410.h
exynos5420.h
exynos5433.h
exynos5440.h
gxbb-aoclkc.h
gxbb-clkc.h clk: meson: expose GEN_CLK clkid 2018-07-09 13:37:31 +02:00
hi3516cv300-clock.h
hi3519-clock.h
hi3620-clock.h
hi3660-clock.h
hi6220-clock.h
hip04-clock.h
histb-clock.h clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC 2018-05-15 15:12:06 -07:00
hix5hd2-clock.h
imx1-clock.h
imx5-clock.h
imx6qdl-clock.h clk: imx6: add EPIT clock support 2018-06-01 19:19:30 -07:00
imx6sl-clock.h
imx6sll-clock.h clk: imx6sll: add GPIO LPCGs 2018-07-06 13:58:20 -07:00
imx6sx-clock.h clk: imx6sx: add missing lvds2 clock to the clock tree 2018-05-04 19:56:58 -07:00
imx6ul-clock.h clk: imx6ul: add GPIO clock gates 2018-06-29 11:41:19 -07:00
imx7d-clock.h clk: imx7d: correct enet clock CCGR registers 2018-06-01 12:15:21 -07:00
imx21-clock.h
imx27-clock.h
jz4740-cgu.h
jz4770-cgu.h
jz4780-cgu.h
lpc18xx-ccu.h
lpc18xx-cgu.h
lpc32xx-clock.h
lsi,axm5516-clks.h
marvell,mmp2.h
marvell,pxa168.h
marvell,pxa910.h
marvell,pxa1928.h
maxim,max9485.h dts: clk: add devicetree bindings for MAX9485 2018-07-06 11:27:24 -07:00
maxim,max77620.h
maxim,max77686.h
maxim,max77802.h
meson8b-clkc.h dt-bindings: clock: meson8b: export the NAND clock 2018-04-25 12:05:55 +02:00
microchip,pic32-clock.h
mpc512x-clock.h
mt2701-clk.h Merge branches 'clk-hisi-usb', 'clk-silent-bulk', 'clk-mtk-hdmi', 'clk-mtk-mali' and 'clk-imx6ul-ccosr' into clk-next 2018-06-04 12:27:40 -07:00
mt2712-clk.h dt-bindings: clock: add clocks for MT2712 2018-03-19 14:37:31 -07:00
mt6797-clk.h
mt7622-clk.h clk: mediatek: update missing clock data for MT7622 audsys 2018-03-19 13:40:57 -07:00
mt8135-clk.h
mt8173-clk.h
nuvoton,npcm7xx-clock.h dt-binding: clk: npcm750: Add binding for Nuvoton NPCM7XX Clock 2018-03-23 10:11:25 -07:00
omap4.h
omap5.h
oxsemi,ox810se.h
oxsemi,ox820.h
pistachio-clk.h
px30-cru.h clk: rockchip: add dt-binding header for px30 2018-07-03 20:49:09 +02:00
pxa-clock.h clk: pxa: export 32kHz PLL 2018-07-06 13:52:57 -07:00
qcom,dispcc-sdm845.h dt-bindings: clock: Introduce QCOM Display clock bindings 2018-07-06 16:46:22 -07:00
qcom,gcc-apq8084.h
qcom,gcc-ipq806x.h
qcom,gcc-ipq4019.h
qcom,gcc-ipq8074.h
qcom,gcc-mdm9615.h
qcom,gcc-msm8660.h
qcom,gcc-msm8916.h
qcom,gcc-msm8960.h
qcom,gcc-msm8974.h
qcom,gcc-msm8994.h
qcom,gcc-msm8996.h
qcom,gcc-msm8998.h clk: qcom: Add MSM8998 Global Clock Control (GCC) driver 2018-04-16 22:51:27 -07:00
qcom,gcc-sdm845.h clk: qcom: Enable clocks which needs to be always on for SDM845 2018-07-03 10:10:36 -07:00
qcom,lcc-ipq806x.h
qcom,lcc-mdm9615.h
qcom,lcc-msm8960.h
qcom,mmcc-apq8084.h
qcom,mmcc-msm8960.h
qcom,mmcc-msm8974.h
qcom,mmcc-msm8996.h
qcom,rpmcc.h clk: qcom: rpmcc: Add support to XO buffered clocks 2018-03-19 14:40:26 -07:00
qcom,rpmh.h dt-bindings: clock: Introduce QCOM RPMh clock bindings 2018-05-02 08:11:15 -07:00
qcom,videocc-sdm845.h dt-bindings: clock: Introduce QCOM Video clock bindings 2018-06-01 11:49:07 -07:00
r7s72100-clock.h
r8a73a4-clock.h
r8a7740-clock.h
r8a7743-cpg-mssr.h
r8a7745-cpg-mssr.h
r8a7778-clock.h
r8a7779-clock.h
r8a7790-clock.h
r8a7790-cpg-mssr.h
r8a7791-clock.h
r8a7791-cpg-mssr.h
r8a7792-clock.h
r8a7792-cpg-mssr.h
r8a7793-clock.h
r8a7793-cpg-mssr.h
r8a7794-clock.h
r8a7794-cpg-mssr.h
r8a7795-cpg-mssr.h
r8a7796-cpg-mssr.h
r8a77470-cpg-mssr.h clk: renesas: Add r8a77470 CPG Core Clock Definitions 2018-04-16 13:39:38 +02:00
r8a77965-cpg-mssr.h clk: renesas: cpg-mssr: Add support for R-Car M3-N 2018-02-26 09:13:29 +01:00
r8a77970-cpg-mssr.h
r8a77980-cpg-mssr.h dt-bindings: clock: add R8A77980 CPG core clock definitions 2018-02-20 13:38:32 +01:00
r8a77990-cpg-mssr.h clk: renesas: Add r8a77990 CPG Core Clock Definitions 2018-04-24 09:54:34 +02:00
r8a77995-cpg-mssr.h
r9a06g032-sysctrl.h dt-bindings: clock: Add the r9a06g032-sysctrl.h file 2018-06-22 15:24:42 +02:00
renesas-cpg-mssr.h
rk3036-cru.h
rk3066a-cru.h
rk3128-cru.h
rk3188-cru-common.h
rk3188-cru.h
rk3228-cru.h
rk3288-cru.h
rk3328-cru.h
rk3368-cru.h
rk3399-cru.h
rk3399-ddr.h dt-bindings: clock: add rk3399 DDR3 standard speed bins. 2018-07-18 13:58:30 +09:00
rockchip,rk808.h
rv1108-cru.h
s3c2410.h
s3c2412.h
s3c2443.h
s5pv210-audss.h
s5pv210.h
samsung,s2mps11.h
samsung,s3c64xx-clock.h
sh73a0-clock.h
sprd,sc9860-clk.h dt-bindings: clocks: add APB RTC gate for SC9860 2018-03-16 15:53:31 -07:00
ste-ab8500.h
stih407-clks.h
stih410-clks.h
stih416-clks.h
stih418-clks.h
stm32fx-clock.h clk: stm32: Add DSI clock for STM32F469 Board 2018-03-19 13:45:11 -07:00
stm32h7-clks.h
stm32mp1-clks.h clk: stm32mp1: remove ck_apb_dbg clock 2018-04-06 13:43:23 -07:00
stratix10-clock.h dt-bindings: documentation: add clock bindings information for Stratix10 2018-04-06 09:54:59 -07:00
sun4i-a10-ccu.h
sun4i-a10-pll2.h
sun5i-ccu.h
sun6i-a31-ccu.h
sun7i-a20-ccu.h
sun8i-a23-a33-ccu.h
sun8i-a83t-ccu.h
sun8i-de2.h
sun8i-h3-ccu.h clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO 2018-03-02 08:42:30 +01:00
sun8i-r-ccu.h
sun8i-r40-ccu.h clk: sunxi-ng: r40: Export video PLLs 2018-06-27 19:06:56 +02:00
sun8i-tcon-top.h dt-bindings: display: sunxi-drm: Add TCON TOP description 2018-06-27 21:43:47 +02:00
sun8i-v3s-ccu.h
sun9i-a80-ccu.h
sun9i-a80-de.h
sun9i-a80-usb.h
sun50i-a64-ccu.h
sun50i-h6-ccu.h clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU 2018-03-21 12:27:13 +01:00
sun50i-h6-r-ccu.h clk: sunxi-ng: add support for H6 PRCM CCU 2018-05-04 17:05:46 +02:00
tegra20-car.h
tegra30-car.h
tegra114-car.h
tegra124-car-common.h
tegra124-car.h
tegra186-clock.h
tegra194-clock.h arm64: tegra: Add Tegra194 chip device tree 2018-03-08 14:31:13 +01:00
tegra210-car.h clk: tegra: Add la clock for Tegra210 2018-03-08 15:26:11 +01:00
vf610-clock.h
zx296702-clock.h
zx296718-clock.h