This commit adds management functionality for packet streaming.
As long as investigating Fireface 400, there're three modes depending
on sampling transmission frequency. The number of data channels in each
data block is different depending on the mode. The set of available
data channels for each mode might be different for each protocol and
model.
The length of registers for the number of isochronous channel is just
three bits, therefore 0-7ch are available.
When bus reset occurs on IEEE 1394 bus, the device discontinues to
transmit packets. This commit aborts PCM substreams at bus reset handler.
As I described in followed commits, The device manages its sampling clock
independently of sampling transmission frequency against IEC 61883-6.
Thus, it's a lower cost to change the sampling transmission frequency,
while data fetch between streaming layer and DSP require larger buffer
for resampling. As a result, device latency might tend to be larger than
ASICs for IEC 61883-1/6 such as DM1000/DM1100/DM1500 (BeBoB),
DiceII/TCD2210/TCD2220/TCD3070 and OXFW970/971.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
75d6d89897