Alex Deucher edc6f389f6 radeon: fix PCI bus mastering support enables. ... Someone noticed these registers moved around for later chips, so we redo the codepaths per-chip. PCIE chips don't appear to require explicit enables. Signed-off-by: Dave Airlie <airlied@redhat.com>		2008-10-18 07:10:54 +10:00
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Kbuild	…
drm.h	drm: Add GEM ("graphics execution manager") to i915 driver.	2008-10-18 07:10:12 +10:00
drmP.h	i915: Map status page cached for chips with GTT-based HWS location.	2008-10-18 07:10:53 +10:00
drm_core.h	…
drm_hashtab.h	…
drm_memory.h	…
drm_memory_debug.h	…
drm_os_linux.h	…
drm_pciids.h	radeon: fix PCI bus mastering support enables.	2008-10-18 07:10:54 +10:00
drm_sarea.h	…
drm_sman.h	…
i810_drm.h	…
i830_drm.h	…
i915_drm.h	i915: Add chip set ID param.	2008-10-18 07:10:12 +10:00
mga_drm.h	…
r128_drm.h	…
radeon_drm.h	…
savage_drm.h	…
sis_drm.h	…
via_drm.h	…