Yash Shah 507308b8cc RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 ... SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540. Update the L2 cache controller driver to support this additional interrupt in case of FU740-C000 chip. Signed-off-by: Yash Shah <yash.shah@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-01-07 17:28:27 -08:00
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Kconfig	riscv: move sifive_l2_cache.c to drivers/soc	2019-12-20 03:40:24 -08:00
Makefile	riscv: move sifive_l2_cache.c to drivers/soc	2019-12-20 03:40:24 -08:00
sifive_l2_cache.c	RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740	2021-01-07 17:28:27 -08:00