WSL2-Linux-Kernel/arch/arm/mach-tegra
Linus Torvalds 18a8d49973 The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
 devices. Additionaly the framework core underwent a bit of surgery with
 two major changes. The boundary between the clock core and clock
 providers (e.g clock drivers) is now more well defined with dedicated
 provider helper functions. struct clk no longer maps 1:1 with the
 hardware clock but is a true per-user cookie which helps us tracker
 users of hardware clocks and debug bad behavior. The second major change
 is the addition of rate constraints for clocks. Rate ranges are now
 supported which are analogous to the voltage ranges in the regulator
 framework. Unfortunately these changes to the core created some
 breakeage. We think we fixed it all up but for this reason there are
 lots of last minute commits trying to undo the damage.
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Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...
2015-02-21 12:30:30 -08:00
..
Kconfig clocksource: Build Tegra timer on 32-bit ARM only 2015-01-09 14:45:43 +01:00
Makefile ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
board-paz00.c This is the bulk of GPIO changes for the v3.17 development 2014-08-08 18:00:35 -07:00
board.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
common.h Revert "ARM: tegra: add cpu_disable for hotplug" 2013-07-19 10:00:37 -06:00
cpuidle-tegra20.c cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic 2014-11-12 21:17:27 +01:00
cpuidle-tegra30.c cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic 2014-11-12 21:17:27 +01:00
cpuidle-tegra114.c ACPI and power management updates for 3.19-rc1 2014-12-10 21:17:00 -08:00
cpuidle.c ARM: tegra: Use a function to get the chip ID 2014-07-17 13:36:41 +02:00
cpuidle.h ARM: tegra: disable LP2 cpuidle state if PCIe is enabled 2013-08-13 12:07:56 -06:00
flowctrl.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
flowctrl.h ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
headsmp.S ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 2013-07-19 10:08:04 -06:00
hotplug.c ARM: tegra: Setup CPU hotplug in a pure initcall 2014-07-17 14:58:41 +02:00
io.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
iomap.h ARM: tegra: use section-sized static mappings for LPAE too 2013-12-04 12:25:25 -07:00
irammap.h ARM: tegra: move resume vector define to irammap.h 2013-09-17 13:44:22 -06:00
irq.c ARM: tegra: irq: fix buggy usage of irq_data irq field 2014-11-27 14:01:55 +01:00
irq.h ARM: tegra: irq: add wake up handling 2013-04-03 14:31:32 -06:00
platsmp.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
reset-handler.S ARM: tegra: Re-add removed SoC id macro to tegra_resume() 2014-11-17 11:43:21 +01:00
reset.c ARM: tegra: Always lock the CPU reset vector 2014-07-17 14:58:42 +02:00
reset.h ARM: tegra: add common LP1 suspend support 2013-08-12 13:29:24 -06:00
sleep-tegra20.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
sleep-tegra30.S ARM: SoC cleanups for 3.17 2014-08-08 11:00:26 -07:00
sleep.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
sleep.h ARM: tegra: Setup CPU hotplug in a pure initcall 2014-07-17 14:58:41 +02:00
tegra.c clk: tegra: make tegra_clocks_apply_init_table() arch_initcall 2015-02-02 15:47:28 +02:00