Граф коммитов

174674 Коммитов

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Konrad Dybcio 75c8a10d9c arm64: dts: qcom: msm8992: Add RPMCC node
This lets us use clocks provided by RPM.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-12-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:44:25 -07:00
Konrad Dybcio 329e16d5f8 arm64: dts: qcom: msm8992: Add PSCI support.
This SoC's firmware does not fully support the PSCI
spec, but it's good enough to bring the cores up.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-11-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:44:16 -07:00
Konrad Dybcio 0835375212 arm64: dts: qcom: msm8992: Add PMU node
Add the PMU so we can get proper perf event support on this SoC.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-10-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:44:10 -07:00
Konrad Dybcio 7f8bcc0c4c arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
Add support for I2C to enable support for peripherals
such as touchscreens or sensors. Also add BLSP_UART2 interface.

Please note that the naming scheme follows downstream and as
abominable as it is, that's what we get.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-9-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:44:01 -07:00
Konrad Dybcio ce13edfb7b arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-8-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:43:49 -07:00
Konrad Dybcio be577b8125 arm64: dts: qcom: msm8992: Add a SCM node
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-7-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:43:19 -07:00
Konrad Dybcio 2912215f53 arm64: dts: qcom: msm8992: Add a proper CPU map
This commit adds cpu nodes for all 6 cores
present on this SoC and the cpu-map.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-6-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:43:13 -07:00
Konrad Dybcio d54df2210d arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
This pinout is common for every 8992-based device and
should therefore reside in the SoC device tree.

Also convert addresses into phandles.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-5-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:43:04 -07:00
Konrad Dybcio 4acc8d64e5 arm64: dts: qcom: bullhead: Add qcom,msm-id
Add the property required for the bootloader to select
the correct device tree blob. It has been removed from
the SoC device tree as it should be set on a per-device
basis.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-4-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:42:58 -07:00
Konrad Dybcio c83e0951bc arm64: dts: qcom: msm8992: Fix SDHCI1
This commit ensures the correct IRQ type is set
and disables the device by default.
The mmc-hs400-1_8v property is also moved to
Bullhead as it might not be present on all boards.

The node has been renamed to sdhci@ instead of mmc@
and the phandle was changed to sdhc_1 to comply with
the newer DTS style.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:42:38 -07:00
Konrad Dybcio d99c1c2a1a arm64: dts: qcom: msm8992: Modernize the DTS style
Following changes have been made:

- remove name, compatible and msm-id
- wrap clocks in clocks{}
- order nodes by name and by address
- clock_gcc -> gcc
- msmgpio -> tlmm
- retire msm8992-pins.dtsi
- add some of the missing pins
- make comments C-style
- make apcs a mailbox

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-2-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:42:22 -07:00
Konrad Dybcio 551969ad9b arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
Add device tree support for the Sony Xperia Z5 smartphone.
It's based on Sony Kitakami platform (msm8994) and hence
a Kitakami-common DTSI has been created so as to reduce
clutter when remaining devices are added.

The board currently supports
* Serial
* SDHCI
* I2C
* Regulator configuration
* pstore log dump
* GPIO keys

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-9-konradybcio@gmail.com
[bjorn: Changed vendor identifier in board compatible from somc to sony]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:41:23 -07:00
Konrad Dybcio f007210d96 arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
This was the only device using that dtsi, so no point
keeping it separate AND with a confusing name (bullhead
is based on msm8992 and the file contains regulator
values for that specific board).

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-8-konradybcio@gmail.com
[bjorn: Squashed with change that remove regulators from msm8992.dtsi]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:37:51 -07:00
Konrad Dybcio 01104518b4 arm64: dts: qcom: msm8994: Add support for SMD RPM
Add support for SMD RPM, including pm8994 and pmi8994
regulators.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-7-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:36:51 -07:00
Konrad Dybcio 95087f6163 arm64: dts: qcom: msm8992: Add a label to rpm-requests
This enables the node to be referenced directly from other
DTs.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-4-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:33:35 -07:00
Konrad Dybcio e4faf75d6c arm64: dts: qcom: msm8994: Add SCM node
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200624150107.76234-3-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:33:11 -07:00
Bjorn Andersson aef9a119df arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodes
Enable MDSS and DSI and add the LT9611 HDMI bridge. Also add the HDMI
audio nodes.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200727075532.1932134-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:03 -07:00
Jonathan Marek 04a3605b18 arm64: dts: qcom: add sm8250 GPU nodes
This brings up the GPU. Tested on HDK865 by running vulkan CTS.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200709135251.643-15-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:03 -07:00
Jonathan Marek f30ac26def arm64: dts: qcom: add sm8150 GPU nodes
This brings up the GPU. Tested on HDK855 by running vulkan CTS.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200709135251.643-14-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:03 -07:00
Sharat Masetty c8c6c187d0 arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp
Add opp-peak-kBps bindings to the GPU opp table, listing the peak
GPU -> DDR bandwidth requirement for each opp level. This will be
used to scale the DDR bandwidth along with the GPU frequency dynamically.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-7-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:03 -07:00
Sharat Masetty dd7dc299f3 arm64: dts: qcom: sc7180: Add interconnects property for GPU
This patch adds the interconnects property to the GPU node. This enables
the GPU->DDR path bandwidth voting.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-6-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:03 -07:00
Sharat Masetty 338bdbcc59 arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling
This patch adds the interconnects property for the gpu node and the
opp-peak-kBps property to the opps of the gpu opp table. This should
help enable DDR bandwidth scaling dynamically and proportionally to the
GPU frequency.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:02 -07:00
Sai Prakash Ranjan 8aa6ac22e5 arm64: dts: qcom: sc7180: Add support for context losing replicator
Add "qcom,replicator-loses-context" property to the replicator
in Always-on domain in SC7180 SoC to enable coresight replicator
driver to handle this variation of replicator designs.

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/5072d94849cfaee46748d26ac997212fb2d783c2.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 23:27:02 -07:00
Eddie James 2c887638a5 ARM: dts: Aspeed: tacoma: Enable EHCI controller
Enable the second EHCI controller on the AST2600. Also add a line-name
for the GPIO that controls power to the USB port.

The power control is in place to allow the port to be disabled, for
those that are worried about rogue USB sticks.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:45 +09:30
Eddie James ffade9f7b8 ARM: dts: aspeed: rainier: Enable EHCI controller
Enable the second EHCI controller on the AST2600. Also add a line-name
for the GPIO that controls power to the USB port.

The power control is in place to allow the port to be disabled, for
those that are worried about rogue USB sticks.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:43 +09:30
Eddie James 6036d968ab ARM: dts: aspeed: rainier: Switch OCCs to P10
Rainier uses the P10 processor so the OCC binding should reflect that.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:41 +09:30
Joel Stanley da51a0f285 ARM: dts: aspeed: rainier: Add FSI I2C masters
The host processor contains i2c masters on each cfam.

Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:37 +09:30
Eddie James baf78f5dd6 ARM: dts: aspeed: rainier: Add CFAM SPI controllers
Add the four SPI masters on each CFAM. Each master has four 128KB EEPROM
devices attached to it.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:35 +09:30
Jet Li a92532ece7 ARM: dts: aspeed: rainier: Add I2C buses for NVMe use
Adding pca9552 exposes the presence detect lines for the cards and
tca9554 exposes the presence details for the cards.

Signed-off-by: Jet Li <Jet.Li@ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:32 +09:30
Supreeth Venkatesh 8596ed1502 ARM: dts: aspeed: Initial device tree for AMD EthanolX
Initial introduction of AMD EthanolX platform equipped with an
Aspeed ast2500 BMC manufactured by AMD.

AMD EthanolX platform is an AMD customer reference board with an
Aspeed ast2500 BMC manufactured by AMD.

This adds AMD EthanolX device tree file including the flash layout
used by EthanolX BMC machines.

Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:14 +09:30
Andrew Jeffery c5b6bdabce ARM: dts: rainier: Describe GPIO mux on I2C3
We have a 4-bus mux whose output is selected by two GPIO inputs. Wire it
up in the devicetree and ensure the output is enabled by hogging the
appropriate line.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-28 09:02:07 +09:30
Sai Prakash Ranjan 015156e689 arm64: dts: qcom: sc7180: Add iommus property to ETR
Define iommus property for Coresight ETR component in
SC7180 SoC with the SID and mask to enable SMMU
translation for this master.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 13:54:39 -07:00
Sai Prakash Ranjan 072ce17226 arm64: dts: qcom: sc7180: Add support to skip powering up of ETM
Add "qcom,skip-power-up" property to skip powering up ETM
on SC7180 SoC to workaround a hardware errata where CPU
watchdog counter is stopped when ETM power up bit is set
(i.e., when TRCPDCR.PU = 1).

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/8c5ff297d8c89d9d451352f189baf26c8938842a.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 13:54:34 -07:00
Ravi Kumar Bokka be45eac212 arm64: dts: qcom: sc7180: Add properties to qfprom for fuse blowing
This patch adds properties to the qfprom node to enable fuse blowing.

Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200710073439.v5.4.I70c17309f8b433e900656d7c53a2e6b61888bb68@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27 13:52:01 -07:00
Michael Karcher 04a8a3d0a7 sh: Fix validation of system call number
The slow path for traced system call entries accessed a wrong memory
location to get the number of the maximum allowed system call number.
Renumber the numbered "local" label for the correct location to avoid
collisions with actual local labels.

Signed-off-by: Michael Karcher <kernel@mkarcher.dialup.fu-berlin.de>
Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Fixes: f3a8308864 ("sh: Add a few missing irqflags tracing markers.")
Signed-off-by: Rich Felker <dalias@libc.org>
2020-07-27 16:12:49 -04:00
Peter Zijlstra c7bcbc8ab9 sh/tlb: Fix PGTABLE_LEVELS > 2
Geert reported that his SH7722-based Migo-R board failed to boot after
commit:

  c5b27a889d ("sh/tlb: Convert SH to generic mmu_gather")

That commit fell victim to copying the wrong pattern --
__pmd_free_tlb() used to be implemented with pmd_free().

Fixes: c5b27a889d ("sh/tlb: Convert SH to generic mmu_gather")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rich Felker <dalias@libc.org>
2020-07-27 16:12:48 -04:00
Christian Hewitt f1bb924e8f arm64: dts: meson: fix mmc0 tuning error on Khadas VIM3
Similar to other G12B devices using the W400 dtsi, I see reports of mmc0
tuning errors on VIM3 after a few hours uptime:

[12483.917391] mmc0: tuning execution failed: -5
[30535.551221] mmc0: tuning execution failed: -5
[35359.953671] mmc0: tuning execution failed: -5
[35561.875332] mmc0: tuning execution failed: -5
[61733.348709] mmc0: tuning execution failed: -5

I do not see the same on VIM3L, so remove sd-uhs-sdr50 from the common dtsi
to silence the error, then (re)add it to the VIM3L dts.

Fixes: 4f26cc1c96 ("arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi")
Fixes: 700ab8d839 ("arm64: dts: khadas-vim3: add support for the SM1 based VIM3L")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200721015950.11816-1-christianshewitt@gmail.com
2020-07-27 11:53:47 -07:00
Christian Hewitt 2fa17dd095 arm64: dts: meson: misc fixups for w400 dtsi
Current devices using the W400 dtsi show mmc tuning errors:

[12483.917391] mmc0: tuning execution failed: -5
[30535.551221] mmc0: tuning execution failed: -5
[35359.953671] mmc0: tuning execution failed: -5
[35561.875332] mmc0: tuning execution failed: -5
[61733.348709] mmc0: tuning execution failed: -5

Removing "sd-uhs-sdr50" from the SDIO node prevents this. We also add
keep-power-in-suspend to the SDIO node and fix an indentation.

Fixes: 3cb74db9b2 ("arm64: dts: meson: convert ugoos-am6 to common w400 dtsi")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200721013952.11635-1-christianshewitt@gmail.com
2020-07-27 11:52:14 -07:00
Arnd Bergmann 7fbdc6afd0 AT91 DT for 5.9
- ClassD pull down fixes
  - Enable RTT as RTC on sam9x60ek
  - Fix phy-mode for sama5d3_xplained
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Merge tag 'at91-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT for 5.9

 - ClassD pull down fixes
 - Enable RTT as RTC on sam9x60ek
 - Fix phy-mode for sama5d3_xplained

* tag 'at91-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d3_xplained: change phy-mode
  ARM: dts: at91: sama5d2_xplained: Remove pdmic node
  ARM: dts: sam9x60: add rtt
  dt-bindings: rtc: add microchip,sam9x60-rtt
  ARM: dts: at91: sam9x60ek: classd: pull-down the L1 and L3 lines
  ARM: dts: at91: sama5d2_xplained: classd: pull-down the R1 and R3 lines

Link: https://lore.kernel.org/r/20200726193207.GA182066@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-27 17:28:53 +02:00
Arnd Bergmann 552c0e308b AT91 SoC for 5.9
- Two small fixes
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Merge tag 'at91-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc

AT91 SoC for 5.9

 - Two small fixes

* tag 'at91-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: Replace HTTP links with HTTPS ones
  ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()

Link: https://lore.kernel.org/r/20200726193335.GA182444@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-27 17:26:55 +02:00
Haiwei Li 9c2475f3e4 KVM: Using macros instead of magic values
Instead of using magic values, use macros.

Signed-off-by: Haiwei Li <lihaiwei@tencent.com>
Message-Id: <4c072161-80dd-b7ed-7adb-02acccaa0701@gmail.com>
Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-27 10:40:25 -04:00
Thomas Gleixner f0c7baca18 genirq/affinity: Make affinity setting if activated opt-in
John reported that on a RK3288 system the perf per CPU interrupts are all
affine to CPU0 and provided the analysis:

 "It looks like what happens is that because the interrupts are not per-CPU
  in the hardware, armpmu_request_irq() calls irq_force_affinity() while
  the interrupt is deactivated and then request_irq() with IRQF_PERCPU |
  IRQF_NOBALANCING.  

  Now when irq_startup() runs with IRQ_STARTUP_NORMAL, it calls
  irq_setup_affinity() which returns early because IRQF_PERCPU and
  IRQF_NOBALANCING are set, leaving the interrupt on its original CPU."

This was broken by the recent commit which blocked interrupt affinity
setting in hardware before activation of the interrupt. While this works in
general, it does not work for this particular case. As contrary to the
initial analysis not all interrupt chip drivers implement an activate
callback, the safe cure is to make the deferred interrupt affinity setting
at activation time opt-in.

Implement the necessary core logic and make the two irqchip implementations
for which this is required opt-in. In hindsight this would have been the
right thing to do, but ...

Fixes: baedb87d1b ("genirq/affinity: Handle affinity setting on inactive interrupts correctly")
Reported-by: John Keeping <john@metanate.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Marc Zyngier <maz@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/87blk4tzgm.fsf@nanos.tec.linutronix.de
2020-07-27 16:20:40 +02:00
Huacai Chen 033555f6eb MIPS: KVM: Fix build error caused by 'kvm_run' cleanup
Commit c34b26b98c ("KVM: MIPS: clean up redundant 'kvm_run'
parameters") remove the 'kvm_run' parameter in kvm_mips_complete_mmio_
load(), but forget to update all callers.

Fixes: c34b26b98c ("KVM: MIPS: clean up redundant 'kvm_run' parameters")
Reported-by: kernel test robot <lkp@intel.com>
Cc: Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <1595154207-9787-1-git-send-email-chenhc@lemote.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-27 09:53:55 -04:00
peterz@infradead.org ed00495333 locking/lockdep: Fix TRACE_IRQFLAGS vs. NMIs
Prior to commit:

  859d069ee1 ("lockdep: Prepare for NMI IRQ state tracking")

IRQ state tracking was disabled in NMIs due to nmi_enter()
doing lockdep_off() -- with the obvious requirement that NMI entry
call nmi_enter() before trace_hardirqs_off().

[ AFAICT, PowerPC and SH violate this order on their NMI entry ]

However, that commit explicitly changed lockdep_hardirqs_*() to ignore
lockdep_off() and breaks every architecture that has irq-tracing in
it's NMI entry that hasn't been fixed up (x86 being the only fixed one
at this point).

The reason for this change is that by ignoring lockdep_off() we can:

  - get rid of 'current->lockdep_recursion' in lockdep_assert_irqs*()
    which was going to to give header-recursion issues with the
    seqlock rework.

  - allow these lockdep_assert_*() macros to function in NMI context.

Restore the previous state of things and allow an architecture to
opt-in to the NMI IRQ tracking support, however instead of relying on
lockdep_off(), rely on in_nmi(), both are part of nmi_enter() and so
over-all entry ordering doesn't need to change.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200727124852.GK119549@hirez.programming.kicks-ass.net
2020-07-27 15:13:29 +02:00
Paolo Bonzini 5e105c88ab KVM: nVMX: check for invalid hdr.vmx.flags
hdr.vmx.flags is meant for future extensions to the ABI, rejecting
invalid flags is necessary to avoid broken half-loads of the
nVMX state.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-27 09:04:50 -04:00
Paolo Bonzini 0f02bd0ade KVM: nVMX: check for required but missing VMCS12 in KVM_SET_NESTED_STATE
A missing VMCS12 was not causing -EINVAL (it was just read with
copy_from_user, so it is not a security issue, but it is still
wrong).  Test for VMCS12 validity and reject the nested state
if a VMCS12 is required but not present.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-27 09:04:49 -04:00
Arnd Bergmann 66d3037898 AT91 defconfig for 5.9
- Add ClassD, KSZ ethernet switches, brdige, vlan to sama5_defconfig
  - Reenable CAN support in sama5_defconfig
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Merge tag 'at91-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig

AT91 defconfig for 5.9

 - Add ClassD, KSZ ethernet switches, brdige, vlan to sama5_defconfig
 - Reenable CAN support in sama5_defconfig

* tag 'at91-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: configs: at91: sama5: enable CAN PLATFORM driver
  ARM: configs: at91: sama5: enable bridge and VLAN filtering
  ARM: configs: at91: sama5: add support for KSZ ethernet switches
  ARM: configs: at91: sama5: Enable CLASSD

Link: https://lore.kernel.org/r/20200726192810.GA181818@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-27 14:35:28 +02:00
Ricardo Neri f69ca629d8 x86/cpu: Refactor sync_core() for readability
Instead of having #ifdef/#endif blocks inside sync_core() for X86_64 and
X86_32, implement the new function iret_to_self() with two versions.

In this manner, avoid having to use even more more #ifdef/#endif blocks
when adding support for SERIALIZE in sync_core().

Co-developed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200727043132.15082-4-ricardo.neri-calderon@linux.intel.com
2020-07-27 12:42:06 +02:00
Ricardo Neri 9998a9832c x86/cpu: Relocate sync_core() to sync_core.h
Having sync_core() in processor.h is problematic since it is not possible
to check for hardware capabilities via the *cpu_has() family of macros.
The latter needs the definitions in processor.h.

It also looks more intuitive to relocate the function to sync_core.h.

This changeset does not make changes in functionality.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20200727043132.15082-3-ricardo.neri-calderon@linux.intel.com
2020-07-27 12:42:06 +02:00
Ricardo Neri 85b23fbc7d x86/cpufeatures: Add enumeration for SERIALIZE instruction
The Intel architecture defines a set of Serializing Instructions (a
detailed definition can be found in Vol.3 Section 8.3 of the Intel "main"
manual, SDM). However, these instructions do more than what is required,
have side effects and/or may be rather invasive. Furthermore, some of
these instructions are only available in kernel mode or may cause VMExits.
Thus, software using these instructions only to serialize execution (as
defined in the manual) must handle the undesired side effects.

As indicated in the name, SERIALIZE is a new Intel architecture
Serializing Instruction. Crucially, it does not have any of the mentioned
side effects. Also, it does not cause VMExit and can be used in user mode.

This new instruction is currently documented in the latest "extensions"
manual (ISE). It will appear in the "main" manual in the future.

Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20200727043132.15082-2-ricardo.neri-calderon@linux.intel.com
2020-07-27 12:42:06 +02:00
Ingo Molnar 538b10856b Linux 5.8-rc7
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Merge tag 'v5.8-rc7' into x86/cpu, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-27 12:41:13 +02:00
Greg Kroah-Hartman dbaab9469b Linux 5.8-rc7
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Merge 5.8-rc7 into tty-next

we need the tty/serial fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-27 12:40:56 +02:00
Rafael J. Wysocki 80e3036866 Merge back cpufreq material for v5.9. 2020-07-27 12:34:55 +02:00
Joerg Roedel 2b32ab031e x86/mm/64: Make sync_global_pgds() static
The function is only called from within init_64.c and can be static.
Also remove it from pgtable_64.h.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Link: https://lore.kernel.org/r/20200721095953.6218-4-joro@8bytes.org
2020-07-27 12:32:29 +02:00
Joerg Roedel 8bb9bf242d x86/mm/64: Do not sync vmalloc/ioremap mappings
Remove the code to sync the vmalloc and ioremap ranges for x86-64. The
page-table pages are all pre-allocated now so that synchronization is
no longer necessary.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Link: https://lore.kernel.org/r/20200721095953.6218-3-joro@8bytes.org
2020-07-27 12:32:29 +02:00
Joerg Roedel 6eb82f9940 x86/mm: Pre-allocate P4D/PUD pages for vmalloc area
Pre-allocate the page-table pages for the vmalloc area at the level
which needs synchronization on x86-64, which is P4D for 5-level and
PUD for 4-level paging.

Doing this at boot makes sure no synchronization of that area is
necessary at runtime. The synchronization takes the pgd_lock and
iterates over all page-tables in the system, so it can take quite long
and is better avoided.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Mike Rapoport <rppt@linux.ibm.com>
Link: https://lore.kernel.org/r/20200721095953.6218-2-joro@8bytes.org
2020-07-27 12:32:29 +02:00
Herbert Xu b4a461e72b printk: Make linux/printk.h self-contained
As it stands if you include printk.h by itself it will fail to
compile because it requires definitions from ratelimit.h.  However,
simply including ratelimit.h from printk.h does not work due to
inclusion loops involving sched.h and kernel.h.

This patch solves this by moving bits from ratelimit.h into a new
header file which can then be included by printk.h without any
worries about header loops.

The build bot then revealed some intriguing failures arising out
of this patch.  On s390 there is an inclusion loop with asm/bug.h
and linux/kernel.h that triggers a compile failure, because kernel.h
will cause asm-generic/bug.h to be included before s390's own
asm/bug.h has finished processing.  This has been fixed by not
including kernel.h in arch/s390/include/asm/bug.h.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Acked-by: Petr Mladek <pmladek@suse.com>
Acked-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Link: https://lore.kernel.org/r/20200721062248.GA18383@gondor.apana.org.au
2020-07-27 17:46:24 +09:00
Heiko Carstens 9a996c67a6 s390/vmemmap: coding style updates
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:34:19 +02:00
David Hildenbrand 2c114df071 s390/vmemmap: avoid memset(PAGE_UNUSED) when adding consecutive sections
Let's avoid memset(PAGE_UNUSED) when adding consecutive sections,
whereby the vmemmap of a single section does not span full PMDs.

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-10-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:34:14 +02:00
David Hildenbrand cd5781d63e s390/vmemmap: remember unused sub-pmd ranges
With a memmap size of 56 bytes or 72 bytes per page, the memmap for a
256 MB section won't span full PMDs. As we populate single sections and
depopulate single sections, the depopulation step would not be able to
free all vmemmap pmds anymore.

Do it similarly to x86, marking the unused memmap ranges in a special way
(pad it with 0xFD).

This allows us to add/remove sections, cleaning up all allocated
vmemmap pages even if the memmap size is not multiple of 16 bytes per page.

A 56 byte memmap can, for example, be created with !CONFIG_MEMCG and
!CONFIG_SLUB.

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-9-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:34:08 +02:00
David Hildenbrand f2057b4266 s390/vmemmap: fallback to PTEs if mapping large PMD fails
Let's fallback to single pages if short on huge pages. No need to stop
memory hotplug.

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-8-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:34:03 +02:00
David Hildenbrand b9ff81003c s390/vmem: cleanup empty page tables
Let's cleanup empty page tables. Consider only page tables that fully
fall into the idendity mapping and the vmemmap range.

As there are no valid accesses to vmem/vmemmap within non-populated ranges,
the single tlb flush at the end should be sufficient.

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-7-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:59 +02:00
David Hildenbrand aa18e0e658 s390/vmemmap: take the vmem_mutex when populating/freeing
Let's synchronize all accesses to the 1:1 and vmemmap mappings. This will
be especially relevant when wanting to cleanup empty page tables that could
be shared by both. Avoid races when removing tables that might be just
about to get reused.

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-6-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:51 +02:00
David Hildenbrand c00f05a924 s390/vmemmap: cleanup when vmemmap_populate() fails
Cleanup what we partially added in case vmemmap_populate() fails. For
vmem, this is already handled by vmem_add_mapping().

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-5-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:46 +02:00
David Hildenbrand 9ec8fa8dc3 s390/vmemmap: extend modify_pagetable() to handle vmemmap
Extend our shiny new modify_pagetable() to handle !direct (vmemmap)
mappings. Convert vmemmap_populate() and implement vmemmap_free().

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-4-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:41 +02:00
David Hildenbrand 3e0d3e408e s390/vmem: consolidate vmem_add_range() and vmem_remove_range()
We want to have only a single pagetable walker and reuse the same
functionality for vmemmap handling. Let's start by consolidating
vmem_add_range() and vmem_remove_range(), converting it into a
recursive implementation.

A recursive implementation makes it easier to expand individual cases
without harming readability. In addition, we minimize traversing the
whole hierarchy over and over again.

One change is that we don't unmap large PMDs/PUDs when not completely
covered by the request, something that should never happen with direct
mappings, unless one would be removing in other granularity than added,
which would be broken already.

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-3-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:36 +02:00
David Hildenbrand 8398b226b8 s390/vmem: rename vmem_add_mem() to vmem_add_range()
Let's match the name to vmem_remove_range().

Cc: Vasily Gorbik <gor@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20200722094558.9828-2-david@redhat.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:32 +02:00
Ilya Leoshkevich 73d6eb48d2 s390: enable HAVE_FUNCTION_ERROR_INJECTION
This kernel feature is required for enabling BPF_KPROBE_OVERRIDE.

Define override_function_with_return() and regs_set_return_value()
functions, and fix compile errors in syscall_wrapper.h.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:28 +02:00
Niklas Schnelle 4631f3ca49 s390/pci: clarify comment in s390_mmio_read/write
The existing comment was talking about reading in the write part
and vice versa. While we are here make it more clear why restricting
the syscalls to MIO capable devices is okay.

Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-27 10:33:24 +02:00
Nicholas Piggin 909adfc66b powerpc/64s/hash: Fix hash_preload running with interrupts enabled
Commit 2f92447f9f ("powerpc/book3s64/hash: Use the pte_t address from the
caller") removed the local_irq_disable from hash_preload, but it was
required for more than just the page table walk: the hash pte busy bit is
effectively a lock which may be taken in interrupt context, and the local
update flag test must not be preempted before it's used.

This solves apparent lockups with perf interrupting __hash_page_64K. If
get_perf_callchain then also takes a hash fault on the same page while it
is already locked, it will loop forever taking hash faults, which looks like
this:

  cpu 0x49e: Vector: 100 (System Reset) at [c00000001a4f7d70]
      pc: c000000000072dc8: hash_page_mm+0x8/0x800
      lr: c00000000000c5a4: do_hash_page+0x24/0x38
      sp: c0002ac1cc69ac70
     msr: 8000000000081033
    current = 0xc0002ac1cc602e00
    paca    = 0xc00000001de1f280   irqmask: 0x03   irq_happened: 0x01
      pid   = 20118, comm = pread2_processe
  Linux version 5.8.0-rc6-00345-g1fad14f18bc6
  49e:mon> t
  [c0002ac1cc69ac70] c00000000000c5a4 do_hash_page+0x24/0x38 (unreliable)
  --- Exception: 300 (Data Access) at c00000000008fa60 __copy_tofrom_user_power7+0x20c/0x7ac
  [link register   ] c000000000335d10 copy_from_user_nofault+0xf0/0x150
  [c0002ac1cc69af70] c00032bf9fa3c880 (unreliable)
  [c0002ac1cc69afa0] c000000000109df0 read_user_stack_64+0x70/0xf0
  [c0002ac1cc69afd0] c000000000109fcc perf_callchain_user_64+0x15c/0x410
  [c0002ac1cc69b060] c000000000109c00 perf_callchain_user+0x20/0x40
  [c0002ac1cc69b080] c00000000031c6cc get_perf_callchain+0x25c/0x360
  [c0002ac1cc69b120] c000000000316b50 perf_callchain+0x70/0xa0
  [c0002ac1cc69b140] c000000000316ddc perf_prepare_sample+0x25c/0x790
  [c0002ac1cc69b1a0] c000000000317350 perf_event_output_forward+0x40/0xb0
  [c0002ac1cc69b220] c000000000306138 __perf_event_overflow+0x88/0x1a0
  [c0002ac1cc69b270] c00000000010cf70 record_and_restart+0x230/0x750
  [c0002ac1cc69b620] c00000000010d69c perf_event_interrupt+0x20c/0x510
  [c0002ac1cc69b730] c000000000027d9c performance_monitor_exception+0x4c/0x60
  [c0002ac1cc69b750] c00000000000b2f8 performance_monitor_common_virt+0x1b8/0x1c0
  --- Exception: f00 (Performance Monitor) at c0000000000cb5b0 pSeries_lpar_hpte_insert+0x0/0x160
  [link register   ] c0000000000846f0 __hash_page_64K+0x210/0x540
  [c0002ac1cc69ba50] 0000000000000000 (unreliable)
  [c0002ac1cc69bb00] c000000000073ae0 update_mmu_cache+0x390/0x3a0
  [c0002ac1cc69bb70] c00000000037f024 wp_page_copy+0x364/0xce0
  [c0002ac1cc69bc20] c00000000038272c do_wp_page+0xdc/0xa60
  [c0002ac1cc69bc70] c0000000003857bc handle_mm_fault+0xb9c/0x1b60
  [c0002ac1cc69bd50] c00000000006c434 __do_page_fault+0x314/0xc90
  [c0002ac1cc69be20] c00000000000c5c8 handle_page_fault+0x10/0x2c
  --- Exception: 300 (Data Access) at 00007fff8c861fe8
  SP (7ffff6b19660) is in userspace

Fixes: 2f92447f9f ("powerpc/book3s64/hash: Use the pte_t address from the caller")
Reported-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Reported-by: Anton Blanchard <anton@ozlabs.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200727060947.10060-1-npiggin@gmail.com
2020-07-27 17:02:09 +10:00
Greg Kroah-Hartman c97793089b Linux 5.8-rc7
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Merge 5.8-rc7 into usb-next

We want the USB fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-27 08:17:14 +02:00
Linus Torvalds 40c60ac321 Merge branch 'parisc-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux into master
Pull parisc fixes from Helge Deller:
 "Two fixes:

   - Add the cmpxchg() function for pointers to u8 values. This fixes a
     kernel linking error when building the tusb1210 driver (from Liam
     Beguin).

   - Add a define for atomic64_set_release() to fix CPU soft lockups
     which happen because of missing unlocks while processing bit
     operations (from John David Anglin)"

* 'parisc-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: Add atomic64_set_release() define to avoid CPU soft lockups
  parisc: add support for cmpxchg on u8 pointers
2020-07-26 12:14:46 -07:00
Colin Ian King 90fc73928f x86/ioperm: Initialize pointer bitmap with NULL rather than 0
The pointer bitmap is being initialized with a plain integer 0,
fix this by initializing it with a NULL instead.

Cleans up sparse warning:
arch/x86/xen/enlighten_pv.c:876:27: warning: Using plain integer
as NULL pointer

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/20200721100217.407975-1-colin.king@canonical.com
2020-07-26 19:52:55 +02:00
Ingo Molnar 2d65685a4a Merge branch 'x86/urgent' into x86/cleanups
Refresh the branch for a dependent commit.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-26 19:52:30 +02:00
Ingo Molnar f87032aec4 Merge branch 'locking/nmi' into x86/entry
Resolve conflicts with ongoing lockdep work that fixed the NMI entry code.

Conflicts:
	arch/x86/entry/common.c
	arch/x86/include/asm/idtentry.h

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-26 18:26:25 +02:00
Jinyang He b1ce9716f3 MIPS: Fix unable to reserve memory for Crash kernel
Use 0 as the align parameter in memblock_find_in_range() is
incorrect when we reserve memory for Crash kernel.

The environment as follows:
[    0.000000] MIPS: machine is loongson,loongson64c-4core-rs780e
...
[    1.951016]     crashkernel=64M@128M

The warning as follows:
[    0.000000] Invalid memory region reserved for crash kernel

And the iomem as follows:
00200000-0effffff : System RAM
  04000000-0484009f : Kernel code
  048400a0-04ad7fff : Kernel data
  04b40000-05c4c6bf : Kernel bss
1a000000-1bffffff : pci@1a000000
...

The align parameter may be finally used by round_down() or round_up().
Like the following call tree:

mips-next: mm/memblock.c

memblock_find_in_range
└── memblock_find_in_range_node
    ├── __memblock_find_range_bottom_up
    │   └── round_up
    └── __memblock_find_range_top_down
        └── round_down
\#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
\#define round_down(x, y) ((x) & ~__round_mask(x, y))
\#define __round_mask(x, y) ((__typeof__(x))((y)-1))

The round_down(or round_up)'s second parameter must be a power of 2.
If the second parameter is 0, it both will return 0.

Use 1 as the parameter to fix the bug and the iomem as follows:
00200000-0effffff : System RAM
  04000000-0484009f : Kernel code
  048400a0-04ad7fff : Kernel data
  04b40000-05c4c6bf : Kernel bss
  08000000-0bffffff : Crash kernel
1a000000-1bffffff : pci@1a000000
...

Signed-off-by: Jinyang He <hejinyang@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 13:55:51 +02:00
Randy Dunlap de0038bfaf x86: uv: uv_hub.h: Delete duplicated word
Delete the repeated word "the".

[ mingo: While at it, also capitalize CPU properly. ]

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200726004124.20618-4-rdunlap@infradead.org
2020-07-26 12:47:22 +02:00
Randy Dunlap 8b9fd48eb7 x86: cmpxchg_32.h: Delete duplicated word
Delete the repeated word "you".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200726004124.20618-3-rdunlap@infradead.org
2020-07-26 12:47:22 +02:00
Randy Dunlap ddeddd0811 x86: bootparam.h: Delete duplicated word
Delete the repeated word "for".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200726004124.20618-2-rdunlap@infradead.org
2020-07-26 12:47:22 +02:00
Huacai Chen 9cce844abf MIPS: CPU#0 is not hotpluggable
Now CPU#0 is not hotpluggable on MIPS, so prevent to create /sys/devices
/system/cpu/cpu0/online which confuses some user-space tools.

Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:18:35 +02:00
Paul Cercueil d8727385f4 MIPS: ingenic: JZ4725B: Add IPU node
Add a devicetree node for the Image Processing Unit (IPU) found in the
JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver
will expect the IPU node to be accessed through graph port #8, as stated
in the bindings documentation.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:16:41 +02:00
Randy Dunlap 0bfdf92a97 mips: octeon: octeon.h: delete duplicated word
Delete the repeated word "as".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:16:19 +02:00
Randy Dunlap c7e3370942 mips: octeon: cvmx-pow.h: fix duplicated words
Delete the repeated words "Returns" and convert to kernel-doc
notation by adding a ':'.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:16:04 +02:00
Randy Dunlap 37cbd2b3cb mips: octeon: cvmx-pkoh: fix duplicated words
Delete the repeated word "command".
Delete the repeated words "returns" and convert to kernel-doc notation
by adding a ':'.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:15:50 +02:00
Randy Dunlap 0390de410d mips: octeon: cvmx-pip.h: delete duplicated word
Delete the repeated word "the".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:15:28 +02:00
Randy Dunlap 108cff579b mips: octeon: cvmx-l2c.h: delete duplicated word
Delete the repeated word "Returns".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:15:19 +02:00
Randy Dunlap f2790db134 mips: io.h: delete duplicated word
Delete the repeated word "on".

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-26 10:14:58 +02:00
David S. Miller a57066b1a0 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
The UDP reuseport conflict was a little bit tricky.

The net-next code, via bpf-next, extracted the reuseport handling
into a helper so that the BPF sk lookup code could invoke it.

At the same time, the logic for reuseport handling of unconnected
sockets changed via commit efc6b6f6c3
which changed the logic to carry on the reuseport result into the
rest of the lookup loop if we do not return immediately.

This requires moving the reuseport_has_conns() logic into the callers.

While we are here, get rid of inline directives as they do not belong
in foo.c files.

The other changes were cases of more straightforward overlapping
modifications.

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-25 17:49:04 -07:00
Linus Torvalds 04300d66f0 RISC-V Fixes for 5.8-rc7
I have a few more fixes this week:
 
 * A fix to avoid using SBI calls during kasan initialization, as the SBI calls
   themselves have not been probed yet.
 * Three fixes related to systems with multiple memory regions.
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Merge tag 'riscv-for-linus-5.8-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux into master

Pull RISC-V fixes from Palmer Dabbelt:
 "A few more fixes this week:

   - A fix to avoid using SBI calls during kasan initialization, as the
     SBI calls themselves have not been probed yet.

   - Three fixes related to systems with multiple memory regions"

* tag 'riscv-for-linus-5.8-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Parse all memory blocks to remove unusable memory
  RISC-V: Do not rely on initrd_start/end computed during early dt parsing
  RISC-V: Set maximum number of mapped pages correctly
  riscv: kasan: use local_tlb_flush_all() to avoid uninitialized __sbi_rfence
2020-07-25 14:42:11 -07:00
Linus Torvalds fbe0d451bc Misc fixes:
- Fix a section end page alignment assumption that was causing crashes
 
  - Fix ORC unwinding on freshly forked tasks which haven't executed yet
    and which have empty user task stacks
 
  - Fix the debug.exception-trace=1 sysctl dumping of user stacks, which
    was broken by recent maccess changes
 
 Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'x86-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into master

Pull x86 fixes from Ingo Molnar:
 "Misc fixes:

   - Fix a section end page alignment assumption that was causing
     crashes

   - Fix ORC unwinding on freshly forked tasks which haven't executed
     yet and which have empty user task stacks

   - Fix the debug.exception-trace=1 sysctl dumping of user stacks,
     which was broken by recent maccess changes"

* tag 'x86-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/dumpstack: Dump user space code correctly again
  x86/stacktrace: Fix reliable check for empty user task stacks
  x86/unwind/orc: Fix ORC for newly forked tasks
  x86, vmlinux.lds: Page-align end of ..page_aligned sections
2020-07-25 14:25:47 -07:00
Linus Torvalds 17baa44286 Various EFI fixes:
- Fix the layering violation in the use of the EFI runtime services
     availability mask in users of the 'efivars' abstraction
 
   - Revert build fix for GCC v4.8 which is no longer supported
 
   - Clean up some x86 EFI stub details, some of which are borderline bugs
     that copy around garbage into padding fields - let's fix these
     out of caution.
 
   - Fix build issues while working on RISC-V support
 
   - Avoid --whole-archive when linking the stub on arm64
 
 Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'efi-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into master

Pull EFI fixes from Ingo Molnar:
 "Various EFI fixes:

   - Fix the layering violation in the use of the EFI runtime services
     availability mask in users of the 'efivars' abstraction

   - Revert build fix for GCC v4.8 which is no longer supported

   - Clean up some x86 EFI stub details, some of which are borderline
     bugs that copy around garbage into padding fields - let's fix these
     out of caution.

   - Fix build issues while working on RISC-V support

   - Avoid --whole-archive when linking the stub on arm64"

* tag 'efi-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  efi: Revert "efi/x86: Fix build with gcc 4"
  efi/efivars: Expose RT service availability via efivars abstraction
  efi/libstub: Move the function prototypes to header file
  efi/libstub: Fix gcc error around __umoddi3 for 32 bit builds
  efi/libstub/arm64: link stub lib.a conditionally
  efi/x86: Only copy upto the end of setup_header
  efi/x86: Remove unused variables
2020-07-25 13:18:42 -07:00
Ingo Molnar c84d53051f Linux 5.8-rc6
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Merge tag 'v5.8-rc6' into locking/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-25 21:49:36 +02:00
Linus Torvalds 1b64b2e244 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net into master
Pull networking fixes from David Miller:

 1) Fix RCU locaking in iwlwifi, from Johannes Berg.

 2) mt76 can access uninitialized NAPI struct, from Felix Fietkau.

 3) Fix race in updating pause settings in bnxt_en, from Vasundhara
    Volam.

 4) Propagate error return properly during unbind failures in ax88172a,
    from George Kennedy.

 5) Fix memleak in adf7242_probe, from Liu Jian.

 6) smc_drv_probe() can leak, from Wang Hai.

 7) Don't muck with the carrier state if register_netdevice() fails in
    the bonding driver, from Taehee Yoo.

 8) Fix memleak in dpaa_eth_probe, from Liu Jian.

 9) Need to check skb_put_padto() return value in hsr_fill_tag(), from
    Murali Karicheri.

10) Don't lose ionic RSS hash settings across FW update, from Shannon
    Nelson.

11) Fix clobbered SKB control block in act_ct, from Wen Xu.

12) Missing newlink in "tx_timeout" sysfs output, from Xiongfeng Wang.

13) IS_UDPLITE cleanup a long time ago, incorrectly handled
    transformations involving UDPLITE_RECV_CC. From Miaohe Lin.

14) Unbalanced locking in netdevsim, from Taehee Yoo.

15) Suppress false-positive error messages in qed driver, from Alexander
    Lobakin.

16) Out of bounds read in ax25_connect and ax25_sendmsg, from Peilin Ye.

17) Missing SKB release in cxgb4's uld_send(), from Navid Emamdoost.

18) Uninitialized value in geneve_changelink(), from Cong Wang.

19) Fix deadlock in xen-netfront, from Andera Righi.

19) flush_backlog() frees skbs with IRQs disabled, so should use
    dev_kfree_skb_irq() instead of kfree_skb(). From Subash Abhinov
    Kasiviswanathan.

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (111 commits)
  drivers/net/wan: lapb: Corrected the usage of skb_cow
  dev: Defer free of skbs in flush_backlog
  qrtr: orphan socket in qrtr_release()
  xen-netfront: fix potential deadlock in xennet_remove()
  flow_offload: Move rhashtable inclusion to the source file
  geneve: fix an uninitialized value in geneve_changelink()
  bonding: check return value of register_netdevice() in bond_newlink()
  tcp: allow at most one TLP probe per flight
  AX.25: Prevent integer overflows in connect and sendmsg
  cxgb4: add missing release on skb in uld_send()
  net: atlantic: fix PTP on AQC10X
  AX.25: Prevent out-of-bounds read in ax25_sendmsg()
  sctp: shrink stream outq when fails to do addstream reconf
  sctp: shrink stream outq only when new outcnt < old outcnt
  AX.25: Fix out-of-bounds read in ax25_connect()
  enetc: Remove the mdio bus on PF probe bailout
  net: ethernet: ti: add NETIF_F_HW_TC hw feature flag for taprio offload
  net: ethernet: ave: Fix error returns in ave_init
  drivers/net/wan/x25_asy: Fix to make it work
  ipvs: fix the connection sync failed in some cases
  ...
2020-07-25 11:50:59 -07:00
Hayato Ohhashi 898ec52d2b x86/xen/time: Set the X86_FEATURE_TSC_KNOWN_FREQ flag in xen_tsc_khz()
If the TSC frequency is known from the pvclock page,
the TSC frequency does not need to be recalibrated.

We can avoid recalibration by setting X86_FEATURE_TSC_KNOWN_FREQ.

Signed-off-by: Hayato Ohhashi <o8@vmm.dev>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: https://lore.kernel.org/r/20200721161231.6019-1-o8@vmm.dev
2020-07-25 15:49:41 +02:00
Fenghua Yu 3aae57f0c3 x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder Lake CPUs
Add Sapphire Rapids and Alder Lake processors to CPU list to enumerate
and enable the split lock feature.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/1595634320-79689-1-git-send-email-fenghua.yu@intel.com
2020-07-25 12:17:00 +02:00
Tony Luck e00b62f0b0 x86/cpu: Add Lakefield, Alder Lake and Rocket Lake models to the to Intel CPU family
Add three new Intel CPU models.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200721043749.31567-1-tony.luck@intel.com
2020-07-25 12:16:59 +02:00
Ingo Molnar fb4405ae6e Linux 5.8-rc6
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Merge tag 'v5.8-rc6' into x86/cpu, to refresh the branch before adding new commits

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-07-25 12:16:16 +02:00
Ingo Molnar 1d0e12fd3a x86/defconfigs: Refresh defconfig files
Perform a 'make savedefconfig' pass over our main defconfig files,
which keeps the defconfig result the same, but compresses
the file where defaults were changed, options removed or
reordered.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200724130638.645844-2-mingo@kernel.org
2020-07-25 12:02:14 +02:00
Ingo Molnar 4b8e0328e5 x86/mm: Remove the unused mk_kernel_pgd() #define
AFAICS the last uses of directly 'making' kernel PGDs was removed 7 years ago:

  8b78c21d72d9: ("x86, 64bit, mm: hibernate use generic mapping_init")

Where the explicit PGD walking loop was replaced with kernel_ident_mapping_init()
calls. This was then (unnecessarily) carried over through the 5-level paging conversion.

Also clean up the 'level' comments a bit, to convey the original, meanwhile somewhat
bit-rotten notion, that these are empty comment blocks with no methods to handle any
of the levels except the PTE level.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200724114418.629021-4-mingo@kernel.org
2020-07-25 12:00:57 +02:00
Ingo Molnar 161449bad5 x86/tsc: Remove unused "US_SCALE" and "NS_SCALE" leftover macros
Last use of them was removed 13 years ago, when the code was converted
to use CYC2NS_SCALE_FACTOR:

  53d517cdbaac: ("x86: scale cyc_2_nsec according to CPU frequency")

The current TSC code uses the 'struct cyc2ns_data' scaling abstraction,
the old fixed scaling approach is long gone.

This cleanup also removes the 'arbitralrily' typo from the comment,
so win-win. ;-)

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200724114418.629021-3-mingo@kernel.org
2020-07-25 12:00:57 +02:00
Ingo Molnar 8cd591aeb1 x86/ioapic: Remove unused "IOAPIC_AUTO" define
Last use was removed more than 5 years ago, in:

   5ad274d41c1b: ("x86/irq: Remove unused old IOAPIC irqdomain interfaces")

Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200724114418.629021-2-mingo@kernel.org
2020-07-25 12:00:56 +02:00
Grygorii Strashko fe1d899f42 ARM: dts: keystone-k2g-evm: fix rgmii phy-mode for ksz9031 phy
Since commit bcf3440c6d ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY") the networking is broken on keystone-k2g-evm board.

The above board have phy-mode = "rgmii-id" and it is worked before because
KSZ9031 PHY started with default RGMII internal delays configuration (TX
off, RX on 1.2 ns) and MAC provided TX delay by default.
After above commit, the KSZ9031 PHY starts handling phy mode properly and
enables both RX and TX delays, as result networking is become broken.

Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous
behavior.

Fixes: bcf3440c6d ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-25 09:38:14 +02:00
Atish Patra fa5a198359
riscv: Parse all memory blocks to remove unusable memory
Currently, maximum physical memory allowed is equal to -PAGE_OFFSET.
That's why we remove any memory blocks spanning beyond that size. However,
it is done only for memblock containing linux kernel which will not work
if there are multiple memblocks.

Process all memory blocks to figure out how much memory needs to be removed
and remove at the end instead of updating the memblock list in place.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-07-24 22:08:25 -07:00
Atish Patra 4400231c8a
RISC-V: Do not rely on initrd_start/end computed during early dt parsing
Currently, initrd_start/end are computed during early_init_dt_scan
but used during arch_setup. We will get the following panic if initrd is used
and CONFIG_DEBUG_VIRTUAL is turned on.

[    0.000000] ------------[ cut here ]------------
[    0.000000] kernel BUG at arch/riscv/mm/physaddr.c:33!
[    0.000000] Kernel BUG [#1]
[    0.000000] Modules linked in:
[    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.8.0-rc4-00015-ged0b226fed02 #886
[    0.000000] epc: ffffffe0002058d2 ra : ffffffe0000053f0 sp : ffffffe001001f40
[    0.000000]  gp : ffffffe00106e250 tp : ffffffe001009d40 t0 : ffffffe00107ee28
[    0.000000]  t1 : 0000000000000000 t2 : ffffffe000a2e880 s0 : ffffffe001001f50
[    0.000000]  s1 : ffffffe0001383e8 a0 : ffffffe00c087e00 a1 : 0000000080200000
[    0.000000]  a2 : 00000000010bf000 a3 : ffffffe00106f3c8 a4 : ffffffe0010bf000
[    0.000000]  a5 : ffffffe000000000 a6 : 0000000000000006 a7 : 0000000000000001
[    0.000000]  s2 : ffffffe00106f068 s3 : ffffffe00106f070 s4 : 0000000080200000
[    0.000000]  s5 : 0000000082200000 s6 : 0000000000000000 s7 : 0000000000000000
[    0.000000]  s8 : 0000000080011010 s9 : 0000000080012700 s10: 0000000000000000
[    0.000000]  s11: 0000000000000000 t3 : 000000000001fe30 t4 : 000000000001fe30
[    0.000000]  t5 : 0000000000000000 t6 : ffffffe00107c471
[    0.000000] status: 0000000000000100 badaddr: 0000000000000000 cause: 0000000000000003
[    0.000000] random: get_random_bytes called from print_oops_end_marker+0x22/0x46 with crng_init=0

To avoid the error, initrd_start/end can be computed from phys_initrd_start/size
in setup itself. It also improves the initrd placement by aligning the start
and size with the page size.

Fixes: 76d2a0493a ("RISC-V: Init and Halt Code")
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-07-24 21:24:27 -07:00
Atish Patra d0d8aae645
RISC-V: Set maximum number of mapped pages correctly
Currently, maximum number of mapper pages are set to the pfn calculated
from the memblock size of the memblock containing kernel. This will work
until that memblock spans the entire memory. However, it will be set to
a wrong value if there are multiple memblocks defined in kernel
(e.g. with efi runtime services).

Set the the maximum value to the pfn calculated from dram size.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-07-24 18:53:42 -07:00
Cristian Birsan c12b539787 ARM: configs: at91: sama5: enable CAN PLATFORM driver
CAN_M_CAN_PLATFORM is needed to probe the driver on sama5 platforms
after the driver was split into multiple files.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200723162434.1983643-3-codrin.ciubotariu@microchip.com
2020-07-25 00:13:20 +02:00
Razvan Stefanescu 33d8c87ef4 ARM: configs: at91: sama5: enable bridge and VLAN filtering
These modules are needed to configure bridges in Linux, to take full
advantage of the KSZ switch capabilities.

Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200723162434.1983643-2-codrin.ciubotariu@microchip.com
2020-07-25 00:13:20 +02:00
Razvan Stefanescu 6dadeab7d2 ARM: configs: at91: sama5: add support for KSZ ethernet switches
Enable DSA and KSZ9477 support as modules. Ethernet switches are used by
the SAMA5D2-ICP board.

Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20200723162434.1983643-1-codrin.ciubotariu@microchip.com
2020-07-25 00:13:19 +02:00
Linus Torvalds c953d60b11 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs into master
Pull xtensa csum regression fix from Al Viro:
 "Max Filippov caught a breakage introduced in xtensa this cycle
  by the csum_and_copy_..._user() series.

  Cut'n'paste from the wrong source - the check that belongs
  in csum_and_copy_to_user() ended up both there and in
  csum_and_copy_from_user()"

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  xtensa: fix access check in csum_and_copy_from_user
2020-07-24 14:19:00 -07:00
Linus Torvalds c6d6860474 arm64 fix for -rc7
- Fix compat vDSO build flags for recent versions of clang
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into master

Pull arm64 fix from Will Deacon:
 "Fix compat vDSO build flags for recent versions of clang to tell it
  where to find the assembler"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: vdso32: Fix '--prefix=' value for newer versions of clang
2020-07-24 14:16:12 -07:00
Arnd Bergmann 4a775263fc arm64: dts: amlogic: updates for v5.9 (round 2)
- new board: WeTek Core2
 - audio playback support on more boards
 - add GPU DVFS
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Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt

arm64: dts: amlogic: updates for v5.9 (round 2)
- new board: WeTek Core2
- audio playback support on more boards
- add GPU DVFS

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
  arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
  arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
  arm64: dts: meson: add support for the WeTek Core 2
  dt-bindings: arm: amlogic: add support for the WeTek Core 2
  arm64: dts: meson: add audio playback to khadas-vim3l
  arm64: dts: meson: add audio playback to odroid-c4
  arm64: dts: meson: update spifc node name on Khadas VIM3/VIM3L
  ARM: dts: meson: Align L2 cache-controller nodename with dtschema
  arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
  arm64: dts: meson: add missing gxl rng clock
  soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's

Link: https://lore.kernel.org/r/7h8sf8671u.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 21:42:57 +02:00
Andrei Vagin 9614cc576d arm64: enable time namespace support
CONFIG_TIME_NS is dependes on GENERIC_VDSO_TIME_NS.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-7-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 18:06:52 +01:00
Andrei Vagin bcf9964342 arm64/vdso: Restrict splitting VVAR VMA
Forbid splitting VVAR VMA resulting in a stricter ABI and reducing the
amount of corner-cases to consider while working further on VDSO time
namespace support.

As the offset from timens to VVAR page is computed compile-time, the pages
in VVAR should stay together and not being partically mremap()'ed.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-6-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 18:06:52 +01:00
Andrei Vagin ee3cda8e46 arm64/vdso: Handle faults on timens page
If a task belongs to a time namespace then the VVAR page which contains
the system wide VDSO data is replaced with a namespace specific page
which has the same layout as the VVAR page.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-5-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 18:06:45 +01:00
Arvind Sankar 587af649bc x86/build: Move max-page-size option to LDFLAGS_vmlinux
This option is only required for vmlinux on 64-bit, to enforce 2MiB
alignment, so set it in LDFLAGS_vmlinux instead of KBUILD_LDFLAGS. Also
drop the ld-option check: this option was added in binutils-2.18 and all
the other places that use it already don't have the check.

This reduces the size of the intermediate ELF files
arch/x86/boot/setup.elf and arch/x86/realmode/rm/realmode.elf by about
2MiB each. The binary versions are unchanged.

Move the LDFLAGS settings to all be together and just after CFLAGS
settings are done.

Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Link: https://lore.kernel.org/r/20200722184334.3785418-1-nivedita@alum.mit.edu
2020-07-24 16:39:27 +02:00
Arnd Bergmann b0fef5edff mvebu fixes for 5.8 (part 1)
- DT change for Armada 38x allowing to add the register needed to fix
   NETA lockup when repeatedly switching speed.
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Merge tag 'mvebu-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes

mvebu fixes for 5.8 (part 1)

- DT change for Armada 38x allowing to add the register needed to fix
  NETA lockup when repeatedly switching speed.

* tag 'mvebu-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds
2020-07-24 16:14:24 +02:00
Arnd Bergmann 2ee61200b7 Texas Instruments K3 SoC config updates for v5.9
- Enable chipid driver for j721e/am65x
 - Enable SDHCI driver for am65x
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Merge tag 'ti-k3-config-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/defconfig

Texas Instruments K3 SoC config updates for v5.9

- Enable chipid driver for j721e/am65x
- Enable SDHCI driver for am65x

* tag 'ti-k3-config-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: defconfig: Enable AM654x SDHCI controller
  arm64: arch_k3: enable chipid driver

Link: https://lore.kernel.org/r/c3e68831-c9ec-db06-d855-808ba3da3364@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 16:13:17 +02:00
Arnd Bergmann 0e3a4cb128 mvebu arm for 5.9 (part 1)
Use of for_each_requested_gpio() for gpio driver still in plat-orion
 for non DT platform.
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Merge tag 'mvebu-arm-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/soc

mvebu arm for 5.9 (part 1)

Use of for_each_requested_gpio() for gpio driver still in plat-orion
for non DT platform.

* tag 'mvebu-arm-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: orion/gpio: Make use of for_each_requested_gpio()

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 16:11:14 +02:00
Arnd Bergmann 92607f8a44 DaVinci SoC updates for v5.9
This pull requests contains some clean-ups for SoC support.
 No functional changes included.
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Merge tag 'davinci-for-v5.9/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/soc

DaVinci SoC updates for v5.9

This pull requests contains some clean-ups for SoC support.
No functional changes included.

* tag 'davinci-for-v5.9/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: dm646x-evm: Simplify error handling in 'evm_sw_setup()'
  ARM: davinci: Fix trivial spelling
  ARM: davinci: Replace HTTP links with HTTPS ones

Link: https://lore.kernel.org/r/348578af-71ea-812e-ec42-31afe7847b85@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 16:09:16 +02:00
Arnd Bergmann 33c56edacd mvebu dt64 for 5.9 (part 1)
Add SMMU support for the Marvell AP806 based SoCs (Armada 70xx and
 Armada 80xx)
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Merge tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt64 for 5.9 (part 1)

Add SMMU support for the Marvell AP806 based SoCs (Armada 70xx and
Armada 80xx)

* tag 'mvebu-dt64-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: add SMMU support
2020-07-24 16:07:45 +02:00
Arnd Bergmann a127fdac23 mvebu dt for 5.9 (part 1)
- Fix the reg-init PHY for the dlink-dns327l (Armada 370)
  - Replace HTTP links with HTTPS one in device tree of the Excito
    Bubba B3 (Kirkwood)
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Merge tag 'mvebu-dt-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt for 5.9 (part 1)

 - Fix the reg-init PHY for the dlink-dns327l (Armada 370)
 - Replace HTTP links with HTTPS one in device tree of the Excito
   Bubba B3 (Kirkwood)

* tag 'mvebu-dt-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: dlink-dns327l: fix reg-init PHY
  ARM: dts: kirkwood: Replace HTTP links with HTTPS ones

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 16:05:45 +02:00
Arnd Bergmann cf8182fc9d Texas Instruments K3 SoC DT updates for v5.9
- Add platforms chipid nodes for am65x and j721e
 - Update latest data sheet values for MMC on am65x
 - Add serdes and usb3 support for j721e
 - Add analog audio support for j721e
 - Add SD card support for am65x
 - Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
 - HTTP links replaced with HTTPS ones
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Merge tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt

Texas Instruments K3 SoC DT updates for v5.9

- Add platforms chipid nodes for am65x and j721e
- Update latest data sheet values for MMC on am65x
- Add serdes and usb3 support for j721e
- Add analog audio support for j721e
- Add SD card support for am65x
- Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
- HTTP links replaced with HTTPS ones

* tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line
  arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0
  arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX
  arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux
  arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes
  dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller
  arm64: dts: ti: k3-am65/j721e-main: rename gic-its node to msi-controller
  arm64: dts: ti: k3-j721e-main: rename smmu node to iommu
  arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones
  arm64: dts: ti: k3-am654-base-board: Add support for SD card
  arm64: dts: ti: k3-am65-main: Add support for sdhci1
  arm64: dts: ti: j721e-common-proc-board: Analog audio support
  arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default
  arm64: dts: ti: k3-am654-main: Update otap-del-sel values
  arm64: dts: ti: k3-j721e-mcu-wakeup: add k3 platforms chipid module node
  arm64: dts: ti: k3-am65-wakeup: add k3 platforms chipid module node

Link: https://lore.kernel.org/r/3b3b9214-769d-ba1b-db5e-44414a8c5756@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 16:01:43 +02:00
Ronen Krupnik 0183b9b0e9 arm64: dts: amazon: add Amazon's Annapurna Labs Alpine v3 support
This patch adds the initial support for the Amazon's Annapurna Labs
Alpine v3 Soc and Evaluation Platform (EVP).

Link: https://lore.kernel.org/r/20200724132654.16549-7-hhhawa@amazon.com
Signed-off-by: Ronen Krupnik <ronenk@amazon.com>
Signed-off-by: Talel Shenhar <talel@amazon.com>
Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 15:54:11 +02:00
Hanna Hawa 39889b8294 arm64: dts: amazon: rename al folder to be amazon
As preparation to add device tree binding for Amazon's Annapurna Labs
Alpine v3 support. Rename al device tree folder to be amazon.

Link: https://lore.kernel.org/r/20200724132654.16549-3-hhhawa@amazon.com
Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-24 15:54:01 +02:00
Thomas Gleixner 72c3c0fe54 x86/kvm: Use generic xfer to guest work function
Use the generic infrastructure to check for and handle pending work before
transitioning into guest mode.

This now handles TIF_NOTIFY_RESUME as well which was ignored so
far. Handling it is important as this covers task work and task work will
be used to offload the heavy lifting of POSIX CPU timers to thread context.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200722220520.979724969@linutronix.de
2020-07-24 15:05:01 +02:00
Thomas Gleixner a27a0a5549 x86/entry: Cleanup idtentry_enter/exit
Remove the temporary defines and fixup all references.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220520.855839271@linutronix.de
2020-07-24 15:05:01 +02:00
Thomas Gleixner bdcd178ada x86/entry: Use generic interrupt entry/exit code
Replace the x86 code with the generic variant. Use temporary defines for
idtentry_* which will be cleaned up in the next step.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200722220520.711492752@linutronix.de
2020-07-24 15:05:00 +02:00
Thomas Gleixner 517e499227 x86/entry: Cleanup idtentry_entry/exit_user
Cleanup the temporary defines and use irqentry_ instead of idtentry_.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220520.602603691@linutronix.de
2020-07-24 15:05:00 +02:00
Thomas Gleixner 167fd210ec x86/entry: Use generic syscall exit functionality
Replace the x86 variant with the generic version. Provide the relevant
architecture specific helper functions and defines.

Use a temporary define for idtentry_exit_user which will be cleaned up
seperately.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220520.494648601@linutronix.de
2020-07-24 15:04:59 +02:00
Thomas Gleixner 27d6b4d14f x86/entry: Use generic syscall entry function
Replace the syscall entry work handling with the generic version. Provide
the necessary helper inlines to handle the real architecture specific
parts, e.g. ptrace.

Use a temporary define for idtentry_enter_user which will be cleaned up
seperately.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220520.376213694@linutronix.de
2020-07-24 15:04:59 +02:00
Thomas Gleixner 0bf019ea59 x86/ptrace: Provide pt_regs helper for entry/exit
As a preparatory step for moving the syscall and interrupt entry/exit
handling into generic code, provide a pt_regs helper which retrieves the
interrupt state from pt_regs. This is required to check whether interrupts
are reenabled by return from interrupt/exception.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220520.258511584@linutronix.de
2020-07-24 15:04:58 +02:00
Thomas Gleixner a377ac1cd9 x86/entry: Move user return notifier out of loop
Guests and user space share certain MSRs. KVM sets these MSRs to guest
values once and does not set them back to user space values on every VM
exit to spare the costly MSR operations.

User return notifiers ensure that these MSRs are set back to the correct
values before returning to user space in exit_to_usermode_loop().

There is no reason to evaluate the TIF flag indicating that user return
notifiers need to be invoked in the loop. The important point is that they
are invoked before returning to user space.

Move the invocation out of the loop into the section which does the last
preperatory steps before returning to user space. That section is not
preemptible and runs with interrupts disabled until the actual return.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200722220520.159112003@linutronix.de
2020-07-24 15:04:58 +02:00
Thomas Gleixner 0b085e68f4 x86/entry: Consolidate 32/64 bit syscall entry
64bit and 32bit entry code have the same open coded syscall entry handling
after the bitwidth specific bits.

Move it to a helper function and share the code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200722220520.051234096@linutronix.de
2020-07-24 15:04:58 +02:00
Thomas Gleixner 8d5ea35c5e x86/entry: Consolidate check_user_regs()
The user register sanity check is sprinkled all over the place. Move it
into enter_from_user_mode().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220519.943016204@linutronix.de
2020-07-24 15:04:57 +02:00
Thomas Gleixner b35ad8405d Merge branch 'core/entry' into x86/entry
Pick up generic entry code to migrate x86 over.
2020-07-24 15:03:59 +02:00
Thomas Gleixner 142781e108 entry: Provide generic syscall entry functionality
On syscall entry certain work needs to be done:

   - Establish state (lockdep, context tracking, tracing)
   - Conditional work (ptrace, seccomp, audit...)

This code is needlessly duplicated and  different in all
architectures.

Provide a generic version based on the x86 implementation which has all the
RCU and instrumentation bits right.

As interrupt/exception entry from user space needs parts of the same
functionality, provide a function for this as well.

syscall_enter_from_user_mode() and irqentry_enter_from_user_mode() must be
called right after the low level ASM entry. The calling code must be
non-instrumentable. After the functions returns state is correct and the
subsequent functions can be instrumented.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Kees Cook <keescook@chromium.org>
Link: https://lkml.kernel.org/r/20200722220519.513463269@linutronix.de
2020-07-24 14:59:03 +02:00
Sedat Dilek 6526b12de0 x86/defconfigs: Remove CONFIG_CRYPTO_AES_586 from i386_defconfig
Initially CONFIG_CRYPTO_AES_586=y was added to the i386_defconfig file in:

  c1b362e3b4d3: ("x86: update defconfigs")

The code and Kconfig for CONFIG_CRYPTO_AES_586 was removed in:

  1d2c3279311e: ("crypto: x86/aes - drop scalar assembler implementations")

Remove the leftover from the i386_defconfig file as well.

Signed-off-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20200723171119.9881-1-sedat.dilek@gmail.com
2020-07-24 14:55:55 +02:00
Andrei Vagin 3503d56cc7 arm64/vdso: Add time namespace page
Allocate the time namespace page among VVAR pages.  Provide
__arch_get_timens_vdso_data() helper for VDSO code to get the
code-relative position of VVARs on that special page.

If a task belongs to a time namespace then the VVAR page which contains
the system wide VDSO data is replaced with a namespace specific page
which has the same layout as the VVAR page. That page has vdso_data->seq
set to 1 to enforce the slow path and vdso_data->clock_mode set to
VCLOCK_TIMENS to enforce the time namespace handling path.

The extra check in the case that vdso_data->seq is odd, e.g. a concurrent
update of the VDSO data is in progress, is not really affecting regular
tasks which are not part of a time namespace as the task is spin waiting
for the update to finish and vdso_data->seq to become even again.

If a time namespace task hits that code path, it invokes the corresponding
time getter function which retrieves the real VVAR page, reads host time
and then adds the offset for the requested clock which is stored in the
special VVAR page.

The time-namespace page isn't allocated on !CONFIG_TIME_NAMESPACE, but
vma is the same size, which simplifies criu/vdso migration between
different kernel configs.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200624083321.144975-4-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 13:15:20 +01:00
Andrei Vagin 1b6867d291 arm64/vdso: Zap vvar pages when switching to a time namespace
The order of vvar pages depends on whether a task belongs to the root
time namespace or not. In the root time namespace, a task doesn't have a
per-namespace page. In a non-root namespace, the VVAR page which contains
the system-wide VDSO data is replaced with a namespace specific page
that contains clock offsets.

Whenever a task changes its namespace, the VVAR page tables are cleared
and then they will be re-faulted with a corresponding layout.

A task can switch its time namespace only if its ->mm isn't shared with
another task.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Reviewed-by: Christian Brauner <christian.brauner@ubuntu.com>
Link: https://lore.kernel.org/r/20200624083321.144975-3-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 13:15:20 +01:00
Andrei Vagin d53b5c013e arm64/vdso: use the fault callback to map vvar pages
Currently the vdso has no awareness of time namespaces, which may
apply distinct offsets to processes in different namespaces. To handle
this within the vdso, we'll need to expose a per-namespace data page.

As a preparatory step, this patch separates the vdso data page from
the code pages, and has it faulted in via its own fault callback.
Subsquent patches will extend this to support distinct pages per time
namespace.

The vvar vma has to be installed with the VM_PFNMAP flag to handle
faults via its vma fault callback.

Signed-off-by: Andrei Vagin <avagin@gmail.com>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: Dmitry Safonov <dima@arista.com>
Link: https://lore.kernel.org/r/20200624083321.144975-2-avagin@gmail.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 13:15:20 +01:00
Ingo Molnar d19e789f06 compiler.h: Move instrumentation_begin()/end() to new <linux/instrumentation.h> header
Linus pointed out that compiler.h - which is a key header that gets included in every
single one of the 28,000+ kernel files during a kernel build - was bloated in:

  655389666643: ("vmlinux.lds.h: Create section for protection against instrumentation")

Linus noted:

 > I have pulled this, but do we really want to add this to a header file
 > that is _so_ core that it gets included for basically every single
 > file built?
 >
 > I don't even see those instrumentation_begin/end() things used
 > anywhere right now.
 >
 > It seems excessive. That 53 lines is maybe not a lot, but it pushed
 > that header file to over 12kB, and while it's mostly comments, it's
 > extra IO and parsing basically for _every_ single file compiled in the
 > kernel.
 >
 > For what appears to be absolutely zero upside right now, and I really
 > don't see why this should be in such a core header file!

Move these primitives into a new header: <linux/instrumentation.h>, and include that
header in the headers that make use of it.

Unfortunately one of these headers is asm-generic/bug.h, which does get included
in a lot of places, similarly to compiler.h. So the de-bloating effect isn't as
good as we'd like it to be - but at least the interfaces are defined separately.

No change to functionality intended.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20200604071921.GA1361070@gmail.com
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Peter Zijlstra <peterz@infradead.org>
2020-07-24 13:56:23 +02:00
Catalin Marinas a46cec12f4 arm64: Reserve HWCAP2_MTE as (1 << 18)
While MTE is not supported in the upstream kernel yet, add a comment
that HWCAP2_MTE as (1 << 18) is reserved. Glibc makes use of it for the
resolving (ifunc) of the MTE-safe string routines.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-24 11:55:29 +01:00
Jiri Slaby a2eec1099b mips: traps, add __init to parity_protection_init
It references __initdata and is called only from an __init function:
trap_init. This avoids section mismatches (which I am seeing with gcc
10).

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 12:07:36 +02:00
Álvaro Fernández Rojas e27e1cc9d3 MIPS: BCM63xx: improve CFE version detection
There are some CFE variants that start with 'cfe-vd' instead of 'cfe-v', such
as the one used in the Huawei HG556a: "cfe-vd081.5003". In this case, the CFE
version is stored as is (string vs number bytes).

Some newer devices have an additional version number, such as the Comtrend
VR-3032u: "1.0.38-112.118-11".

Finally, print the string as is if the version doesn't start with "cfe-v" or
"cfe-vd", but starts with "cfe-".

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 12:02:46 +02:00
周琰杰 (Zhou Yanjie) 0d10d17bac MIPS: X2000: Add X2000 system type.
1.Add "PRID_COMP_INGENIC_13" and "PRID_IMP_XBURST2" for X2000.
2.Add X2000 system type for cat /proc/cpuinfo to give out X2000.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 11:13:57 +02:00
Yu Kuai e8b9fc10f2 MIPS: OCTEON: add missing put_device() call in dwc3_octeon_device_init()
if of_find_device_by_node() succeed, dwc3_octeon_device_init() doesn't have
a corresponding put_device(). Thus add put_device() to fix the exception
handling for this function implementation.

Fixes: 93e502b3c2 ("MIPS: OCTEON: Platform support for OCTEON III USB controller")
Signed-off-by: Yu Kuai <yukuai3@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 11:06:58 +02:00
Jiaxun Yang 35546aeede MIPS: Retire kvm paravirt
paravirt machine was introduced for Cavium's partial virtualization
technology, however, it's host side support and QEMU support never
landed in upstream.

As Cavium was acquired by Marvel and they have no intention to maintain
their MIPS product line, also paravirt is unlikely to be utilized by
community users, it's time to retire it if nobody steps in to maintain
it.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-24 10:53:23 +02:00
Russell King 09781ba039 ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds
To support the change in "phy: armada-38x: fix NETA lockup when
repeatedly switching speeds" we need to update the DT with the
additional register.

Fixes: 14dc100b44 ("phy: armada38x: add common phy support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-07-24 09:56:20 +02:00
Ira Weiny 7f6fa101df x86: Correct noinstr qualifiers
The noinstr qualifier is to be specified before the return type in the
same way inline is used.

These 2 cases were missed by previous patches.

Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20200723161405.852613-1-ira.weiny@intel.com
2020-07-24 09:54:15 +02:00
Arvind Sankar 0a787b28b7 x86/mm: Drop unused MAX_PHYSADDR_BITS
The macro is not used anywhere, and has an incorrect value (going by the
comment) on x86_64 since commit c898faf91b ("x86: 46 bit physical address
support on 64 bits")

To avoid confusion, just remove the definition.

Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200723231544.17274-2-nivedita@alum.mit.edu
2020-07-24 09:53:06 +02:00
Tao Ren e6873087cc ARM: dts: aspeed: wedge40: Enable pwm_tacho device
Enable pwm_tacho device for fan control and monitoring in Wedge40.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24 14:49:52 +09:30
Tao Ren acd0093062 ARM: dts: aspeed: wedge40: Enable ADC device
Enable ADC controller and corresponding voltage sensoring channels for
Wedge40.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24 14:49:41 +09:30
Tao Ren a4bf24d4db ARM: dts: aspeed: wedge40: Disable unused i2c controllers
Disable i2c bus #9, #10 and #13 as these i2c controllers are not used on
Wedge40.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24 14:49:30 +09:30
Tao Ren a5d28390d6 ARM: dts: aspeed: cmm: Fixup I2C tree
Create all the i2c switches in device tree and use aliases to assign
child channels with consistent bus numbers.

Besides, "i2c-mux-idle-disconnect" is set for all the i2c switches to
avoid potential conflicts when multiple devices (beind the switches)
use the same device address.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24 14:49:07 +09:30
Joel Stanley f17af8953b ARM: dts: aspeed: tacoma: Add CFAM reset GPIO
The GPIO on Q0 is used for resetting the CFAM of the processor that the
ASPEED master is connected to.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24 14:49:05 +09:30
Joel Stanley b23b2b8420 ARM: dts: aspeed: rainier: Add CFAM reset GPIO
The GPIO on Q0 is used for resetting the CFAM of the processor that the
ASPEED master is connected to.

The signal is wired as active high on the first pass systems.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-24 14:49:03 +09:30
Dave Airlie 41206a073c Linux 5.8-rc6
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Merge v5.8-rc6 into drm-next

I've got a silent conflict + two trees based on fixes to merge.

Fixes a silent merge with amdgpu

Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-07-24 08:48:05 +10:00
Linus Torvalds f37e99aca0 - Change cpum_cf/perf counter name from DFLT_CCERROR to DFLT_CCFINISH
to reflect reality and avoid further confusion. This is a user space
   visible change therefore the commit has also a stable tag for 5.7,
   where this counter was introduced.
 
 - Add Matthew Rosato as s390 IOMMU maintainer.
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Merge tag 's390-5.8-6' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux into master

Pull s390 fixes from Heiko Carstens:

 - Change cpum_cf/perf counter name from DFLT_CCERROR to DFLT_CCFINISH
   to reflect reality and avoid further confusion. This is a user space
   visible change therefore the commit has also a stable tag for 5.7,
   where this counter was introduced.

 - Add Matthew Rosato as s390 IOMMU maintainer.

* tag 's390-5.8-6' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
  MAINTAINERS: add Matthew for s390 IOMMU
  s390/cpum_cf,perf: change DFLT_CCERROR counter name
2020-07-23 13:42:46 -07:00
Thomas Gleixner 1b7efaa615 - Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni)
- Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
 
 - Add support for i.MX TPM driver with ARM64 (Anson Huang)
 
 - Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
 
 - Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
 
 - Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
 
 - Add support for the Ingenic X1000 OST (Zhou Yanjie)
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Merge tag 'timers-v5.9' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core

Pull clock event/surce driver changes from Daniel Lezcano:

  - Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni)
  - Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
  - Add support for i.MX TPM driver with ARM64 (Anson Huang)
  - Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
  - Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
  - Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
  - Add support for the Ingenic X1000 OST (Zhou Yanjie)
2020-07-23 21:04:05 +02:00
Arnd Bergmann 3ed75c545d Biggest part is the addition of the rk3288 variant of the VMARC
SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes
 with it as the underlying Dalang carrier board is shared by both
 an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10).
 
 Other than that rk3288 gets its ohci node added that only works
 on the fixed rk3288w variant of the soc and some asorted fixes
 and improvements for dt-binding-check.
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Merge tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Biggest part is the addition of the rk3288 variant of the VMARC
SOM and it's Rock Pi N8 icarnation. This brings some arm64 dts-changes
with it as the underlying Dalang carrier board is shared by both
an arm32 rk3288 SOM and an arm64 rk3399 SOM (Rock Pi N10).

Other than that rk3288 gets its ohci node added that only works
on the fixed rk3288w variant of the soc and some asorted fixes
and improvements for dt-binding-check.

* tag 'v5.9-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Add PCIe for RockPI N10
  ARM: dts: rockchip: Add HDMI out for RockPI N8/N10
  ARM: dts: rockchip: Add USB for RockPI N8/N10
  ARM: dts: rockchip: Add usb host0 ohci node for rk3288
  ARM: dts: rockchip: Fix VBUS on rk3288-vyasa
  ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support
  ARM: dts: rockchip: Add VMARC RK3288 SOM initial support
  dt-bindings: arm: rockchip: Add Rock Pi N8 binding
  arm64: dts: rk3399pro: vmarc-som: Move common properties into Carrier
  arm64: dts: rk3399pro: vmarc-som: Move supply regulators into Carrier
  arm64: dts: rk3399pro: vmarc-som: Fix sorting nodes, properties
  ARM: dts: rockchip: dalang-carrier: Move i2c nodes into SOM
  ARM: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac
  ARM: dts: rockchip: Add marvell BT irq config
  ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio

Link: https://lore.kernel.org/r/2472314.kD9Egx1jfM@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-23 14:02:54 +02:00
Arnd Bergmann 571a9cf12a Fuel gauge for Pinebook Pro, the newly added periph-burst flag for pl330s,
first tiny part of the rk3399 camera infrastructure and cleanups + making
 dt-binding-check even happier.
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Merge tag 'v5.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Fuel gauge for Pinebook Pro, the newly added periph-burst flag for pl330s,
first tiny part of the rk3399 camera infrastructure and cleanups + making
dt-binding-check even happier.

* tag 'v5.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Add 'arm,pl330-periph-burst' for dmac
  arm64: dts: rockchip: remove bus-width from mmc nodes in px30 dts files
  arm64: dts: rockchip: add rx0 mipi-phy for rk3399
  arm64: dts: rockchip: rename and label gpio-led subnodes part 2
  arm64: dts: rockchip: rename label and nodename pinctrl subnodes that end with gpio
  arm64: dts: rockchip: fix rk3399-puma gmac reset gpio
  arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpio
  arm64: dts: rockchip: fix rk3368-lion gmac reset gpio
  arm64: dts: rockchip: set rockpro64 usbc dr_mode as host
  arm64: dts: rockchip: add fuel gauge to Pinebook Pro dts

Link: https://lore.kernel.org/r/2221560.KYr1Tee2JR@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-23 14:00:40 +02:00
Ard Biesheuvel 0ae3b13aab arm64/entry: deduplicate SW PAN entry/exit routines
Factor the 12 copies of the SW PAN entry and exit code into callable
subroutines, and use alternatives patching to either emit a 'bl'
instruction to call them, or a NOP if h/w PAN is found to be available
at runtime.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20200721083315.4816-1-ardb@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-23 12:38:55 +01:00
Nick Desaulniers 158807de58 x86/uaccess: Make __get_user_size() Clang compliant on 32-bit
Clang fails to compile __get_user_size() on 32-bit for the following code:

      long long val;

      __get_user(val, usrptr);

with: error: invalid output size for constraint '=q'

GCC compiles the same code without complaints.

The reason is that GCC and Clang are architecturally different, which leads
to subtle issues for code that's invalid but clearly dead, i.e. with code
that emulates polymorphism with the preprocessor and sizeof.

GCC will perform semantic analysis after early inlining and dead code
elimination, so it will not warn on invalid code that's dead. Clang
strictly performs optimizations after semantic analysis, so it will warn
for dead code.

Neither Clang nor GCC like this very much with -m32:

long long ret;
asm ("movb $5, %0" : "=q" (ret));

However, GCC can tolerate this variant:

long long ret;
switch (sizeof(ret)) {
case 1:
        asm ("movb $5, %0" : "=q" (ret));
        break;
case 8:;
}

Clang, on the other hand, won't accept that because it validates the inline
asm for the '1' case before the optimisation phase where it realises that
it wouldn't have to emit it anyway.

If LLVM (Clang's "back end") fails such as during instruction selection or
register allocation, it cannot provide accurate diagnostics (warnings /
errors) that contain line information, as the AST has been discarded from
memory at that point.

While there have been early discussions about having C/C++ specific
language optimizations in Clang via the use of MLIR, which would enable
such earlier optimizations, such work is not scoped and likely a multi-year
endeavor.

It was discussed to change the asm output constraint for the one byte case
from "=q" to "=r". While it works for 64-bit, it fails on 32-bit. With '=r'
the compiler could fail to chose a register accessible as high/low which is
required for the byte operation. If that happens the assembly will fail.

Use a local temporary variable of type 'unsigned char' as output for the
byte copy inline asm and then assign it to the real output variable. This
prevents Clang from failing the semantic analysis in the above case.

The resulting code for the actual one byte copy is not affected as the
temporary variable is optimized out.

[ tglx: Amended changelog ]

Reported-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: David Woodhouse <dwmw2@infradead.org>
Reported-by: Dmitry Golovin <dima@golovin.in>
Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://bugs.llvm.org/show_bug.cgi?id=33587
Link: https://github.com/ClangBuiltLinux/linux/issues/3
Link: https://github.com/ClangBuiltLinux/linux/issues/194
Link: https://github.com/ClangBuiltLinux/linux/issues/781
Link: https://lore.kernel.org/lkml/20180209161833.4605-1-dwmw2@infradead.org/
Link: https://lore.kernel.org/lkml/CAK8P3a1EBaWdbAEzirFDSgHVJMtWjuNt2HGG8z+vpXeNHwETFQ@mail.gmail.com/
Link: https://lkml.kernel.org/r/20200720204925.3654302-12-ndesaulniers@google.com
2020-07-23 12:38:31 +02:00
Nathan Chancellor 7b7891c7bd arm64: vdso32: Fix '--prefix=' value for newer versions of clang
Newer versions of clang only look for $(COMPAT_GCC_TOOLCHAIN_DIR)as [1],
rather than $(COMPAT_GCC_TOOLCHAIN_DIR)$(CROSS_COMPILE_COMPAT)as,
resulting in the following build error:

$ make -skj"$(nproc)" ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- \
CROSS_COMPILE_COMPAT=arm-linux-gnueabi- LLVM=1 O=out/aarch64 distclean \
defconfig arch/arm64/kernel/vdso32/
...
/home/nathan/cbl/toolchains/llvm-binutils/bin/as: unrecognized option '-EL'
clang-12: error: assembler command failed with exit code 1 (use -v to see invocation)
make[3]: *** [arch/arm64/kernel/vdso32/Makefile:181: arch/arm64/kernel/vdso32/note.o] Error 1
...

Adding the value of CROSS_COMPILE_COMPAT (adding notdir to account for a
full path for CROSS_COMPILE_COMPAT) fixes this issue, which matches the
solution done for the main Makefile [2].

[1]: 3452a0d8c1
[2]: https://lore.kernel.org/lkml/20200721173125.1273884-1-maskray@google.com/

Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Cc: stable@vger.kernel.org
Link: https://github.com/ClangBuiltLinux/linux/issues/1099
Link: https://lore.kernel.org/r/20200723041509.400450-1-natechancellor@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-07-23 10:57:32 +01:00
Brian Gerst 4719ffecbb x86/percpu: Remove unused PER_CPU() macro
Also remove now unused __percpu_mov_op.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-11-ndesaulniers@google.com
2020-07-23 11:46:43 +02:00
Brian Gerst c94055fe93 x86/percpu: Clean up percpu_stable_op()
Use __pcpu_size_call_return() to simplify this_cpu_read_stable().
Also remove __bad_percpu_size() which is now unused.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-10-ndesaulniers@google.com
2020-07-23 11:46:42 +02:00
Brian Gerst ebcd580bed x86/percpu: Clean up percpu_cmpxchg_op()
The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-9-ndesaulniers@google.com
2020-07-23 11:46:42 +02:00
Brian Gerst 73ca542fba x86/percpu: Clean up percpu_xchg_op()
The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-8-ndesaulniers@google.com
2020-07-23 11:46:41 +02:00
Brian Gerst bbff583b84 x86/percpu: Clean up percpu_add_return_op()
The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-7-ndesaulniers@google.com
2020-07-23 11:46:41 +02:00
Brian Gerst e4d16defbb x86/percpu: Remove "e" constraint from XADD
The "e" constraint represents a constant, but the XADD instruction doesn't
accept immediate operands.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-6-ndesaulniers@google.com
2020-07-23 11:46:40 +02:00
Brian Gerst 33e5614a43 x86/percpu: Clean up percpu_add_op()
The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-5-ndesaulniers@google.com
2020-07-23 11:46:40 +02:00
Brian Gerst bb631e3002 x86/percpu: Clean up percpu_from_op()
The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-4-ndesaulniers@google.com
2020-07-23 11:46:39 +02:00
Brian Gerst c175acc147 x86/percpu: Clean up percpu_to_op()
The core percpu macros already have a switch on the data size, so the switch
in the x86 code is redundant and produces more dead code.

Also use appropriate types for the width of the instructions.  This avoids
errors when compiling with Clang.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-3-ndesaulniers@google.com
2020-07-23 11:46:39 +02:00
Brian Gerst 6865dc3ae9 x86/percpu: Introduce size abstraction macros
In preparation for cleaning up the percpu operations, define macros for
abstraction based on the width of the operation.

Signed-off-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Dennis Zhou <dennis@kernel.org>
Link: https://lkml.kernel.org/r/20200720204925.3654302-2-ndesaulniers@google.com
2020-07-23 11:46:39 +02:00
Uros Bizjak ef19f826ec crypto: x86 - Put back integer parts of include/asm/inst.h
Resolves conflict with the tip tree.

Fixes: d7866e503b ("crypto: x86 - Remove include/asm/inst.h")
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Ingo Molnar <mingo@redhat.com>
CC: Borislav Petkov <bp@alien8.de>
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: Stephen Rothwell <sfr@canb.auug.org.au>,
CC: "Chang S. Bae" <chang.seok.bae@intel.com>,
CC: Peter Zijlstra <peterz@infradead.org>,
CC: Sasha Levin <sashal@kernel.org>
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-23 17:34:20 +10:00
Alexander A. Klimov 9332a9e739 crypto: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-23 17:34:20 +10:00
Arnd Bergmann 44623b2818 crypto: x86/crc32c - fix building with clang ias
The clang integrated assembler complains about movzxw:

arch/x86/crypto/crc32c-pcl-intel-asm_64.S:173:2: error: invalid instruction mnemonic 'movzxw'

It seems that movzwq is the mnemonic that it expects instead,
and this is what objdump prints when disassembling the file.

Fixes: 6a8ce1ef39 ("crypto: crc32c - Optimize CRC32C calculation with PCLMULQDQ instruction")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-07-23 17:34:16 +10:00
Jon Derrick ec0160891e irqdomain/treewide: Free firmware node after domain removal
Commit 711419e504 ("irqdomain: Add the missing assignment of
domain->fwnode for named fwnode") unintentionally caused a dangling pointer
page fault issue on firmware nodes that were freed after IRQ domain
allocation. Commit e3beca48a4 fixed that dangling pointer issue by only
freeing the firmware node after an IRQ domain allocation failure. That fix
no longer frees the firmware node immediately, but leaves the firmware node
allocated after the domain is removed.

The firmware node must be kept around through irq_domain_remove, but should be
freed it afterwards.

Add the missing free operations after domain removal where where appropriate.

Fixes: e3beca48a4 ("irqdomain/treewide: Keep firmware node unconditionally allocated")
Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>	# drivers/pci
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1595363169-7157-1-git-send-email-jonathan.derrick@intel.com
2020-07-23 00:08:52 +02:00
Dmitry Safonov ef2ff0f5d6 x86/dumpstack: Show registers dump with trace's log level
show_trace_log_lvl() provides x86 platform-specific way to unwind
backtrace with a given log level. Unfortunately, registers dump(s) are
not printed with the same log level - instead, KERN_DEFAULT is always
used.

Arista's switches uses quite common setup with rsyslog, where only
urgent messages goes to console (console_log_level=KERN_ERR), everything
else goes into /var/log/ as the console baud-rate often is indecently
slow (9600 bps).

Backtrace dumps without registers printed have proven to be as useful as
morning standups. Furthermore, in order to introduce KERN_UNSUPPRESSED
(which I believe is still the most elegant way to fix raciness of sysrq[1])
the log level should be passed down the stack to register dumping
functions. Besides, there is a potential use-case for printing traces
with KERN_DEBUG level [2] (where registers dump shouldn't appear with
higher log level).

After all preparations are done, provide log_lvl parameter for
show_regs_if_on_stack() and wire up to actual log level used as
an argument for show_trace_log_lvl().

[1]: https://lore.kernel.org/lkml/20190528002412.1625-1-dima@arista.com/
[2]: https://lore.kernel.org/linux-doc/20190724170249.9644-1-dima@arista.com/

Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Petr Mladek <pmladek@suse.com>
Link: https://lkml.kernel.org/r/20200629144847.492794-4-dima@arista.com
2020-07-22 23:56:54 +02:00
Dmitry Safonov 44e215352c x86/dumpstack: Add log_lvl to __show_regs()
show_trace_log_lvl() provides x86 platform-specific way to unwind
backtrace with a given log level. Unfortunately, registers dump(s) are
not printed with the same log level - instead, KERN_DEFAULT is always
used.

Arista's switches uses quite common setup with rsyslog, where only
urgent messages goes to console (console_log_level=KERN_ERR), everything
else goes into /var/log/ as the console baud-rate often is indecently
slow (9600 bps).

Backtrace dumps without registers printed have proven to be as useful as
morning standups. Furthermore, in order to introduce KERN_UNSUPPRESSED
(which I believe is still the most elegant way to fix raciness of sysrq[1])
the log level should be passed down the stack to register dumping
functions. Besides, there is a potential use-case for printing traces
with KERN_DEBUG level [2] (where registers dump shouldn't appear with
higher log level).

Add log_lvl parameter to __show_regs().
Keep the used log level intact to separate visible change.

[1]: https://lore.kernel.org/lkml/20190528002412.1625-1-dima@arista.com/
[2]: https://lore.kernel.org/linux-doc/20190724170249.9644-1-dima@arista.com/

Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Petr Mladek <pmladek@suse.com>
Link: https://lkml.kernel.org/r/20200629144847.492794-3-dima@arista.com
2020-07-22 23:56:53 +02:00
Dmitry Safonov fd07f802a7 x86/dumpstack: Add log_lvl to show_iret_regs()
show_trace_log_lvl() provides x86 platform-specific way to unwind
backtrace with a given log level. Unfortunately, registers dump(s) are
not printed with the same log level - instead, KERN_DEFAULT is always
used.

Arista's switches uses quite common setup with rsyslog, where only
urgent messages goes to console (console_log_level=KERN_ERR), everything
else goes into /var/log/ as the console baud-rate often is indecently
slow (9600 bps).

Backtrace dumps without registers printed have proven to be as useful as
morning standups. Furthermore, in order to introduce KERN_UNSUPPRESSED
(which I believe is still the most elegant way to fix raciness of sysrq[1])
the log level should be passed down the stack to register dumping
functions. Besides, there is a potential use-case for printing traces
with KERN_DEBUG level [2] (where registers dump shouldn't appear with
higher log level).

Add log_lvl parameter to show_iret_regs() as a preparation to add it
to __show_regs() and show_regs_if_on_stack().

[1]: https://lore.kernel.org/lkml/20190528002412.1625-1-dima@arista.com/
[2]: https://lore.kernel.org/linux-doc/20190724170249.9644-1-dima@arista.com/

Signed-off-by: Dmitry Safonov <dima@arista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Petr Mladek <pmladek@suse.com>
Link: https://lkml.kernel.org/r/20200629144847.492794-2-dima@arista.com
2020-07-22 23:56:53 +02:00
Thomas Gleixner d181d2da01 x86/dumpstack: Dump user space code correctly again
H.J. reported that post 5.7 a segfault of a user space task does not longer
dump the Code bytes when /proc/sys/debug/exception-trace is enabled. It
prints 'Code: Bad RIP value.' instead.

This was broken by a recent change which made probe_kernel_read() reject
non-kernel addresses.

Update show_opcodes() so it retrieves user space opcodes via
copy_from_user_nmi().

Fixes: 98a23609b1 ("maccess: always use strict semantics for probe_kernel_read")
Reported-by: H.J. Lu <hjl.tools@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/87h7tz306w.fsf@nanos.tec.linutronix.de
2020-07-22 23:47:48 +02:00
Josh Poimboeuf 039a7a30ec x86/stacktrace: Fix reliable check for empty user task stacks
If a user task's stack is empty, or if it only has user regs, ORC
reports it as a reliable empty stack.  But arch_stack_walk_reliable()
incorrectly treats it as unreliable.

That happens because the only success path for user tasks is inside the
loop, which only iterates on non-empty stacks.  Generally, a user task
must end in a user regs frame, but an empty stack is an exception to
that rule.

Thanks to commit 71c9582528 ("x86/unwind/orc: Fix error handling in
__unwind_start()"), unwind_start() now sets state->error appropriately.
So now for both ORC and FP unwinders, unwind_done() and !unwind_error()
always means the end of the stack was successfully reached.  So the
success path for kthreads is no longer needed -- it can also be used for
empty user tasks.

Reported-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Link: https://lkml.kernel.org/r/f136a4e5f019219cbc4f4da33b30c2f44fa65b84.1594994374.git.jpoimboe@redhat.com
2020-07-22 23:47:47 +02:00
Josh Poimboeuf 372a8eaa05 x86/unwind/orc: Fix ORC for newly forked tasks
The ORC unwinder fails to unwind newly forked tasks which haven't yet
run on the CPU.  It correctly reads the 'ret_from_fork' instruction
pointer from the stack, but it incorrectly interprets that value as a
call stack address rather than a "signal" one, so the address gets
incorrectly decremented in the call to orc_find(), resulting in bad ORC
data.

Fix it by forcing 'ret_from_fork' frames to be signal frames.

Reported-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Wang ShaoBo <bobo.shaobowang@huawei.com>
Link: https://lkml.kernel.org/r/f91a8778dde8aae7f71884b5df2b16d552040441.1594994374.git.jpoimboe@redhat.com
2020-07-22 23:47:47 +02:00
Arnd Bergmann 5644f690b9 Samsung mach/soc changes for v5.9
1. Restore big.LITTLE cpuidle support on Exynos542x boards.
 2. Cleanups and minor fixes.
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Merge tag 'samsung-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung mach/soc changes for v5.9

1. Restore big.LITTLE cpuidle support on Exynos542x boards.
2. Cleanups and minor fixes.

* tag 'samsung-soc-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: s3c24xx: Replace HTTP links with HTTPS ones
  ARM: s3c24xx: leds: Convert to use GPIO descriptors
  ARM: exynos: MCPM: Restore big.LITTLE cpuidle support
  ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_val

Link: https://lore.kernel.org/r/20200721180900.13844-4-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:38:40 +02:00
Arnd Bergmann e2837df668 i.MX drivers change for 5.9:
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
   handler, so that system can be waked up when MU IRQ arrives.
 - Move i.MX SCU soc driver into imx firmware folder to get it
   initialized from i.MX SCU firmware driver.
 - Clean up soc-imx-scu driver a bit by using devm_kasprintf().
 - Correct postfix setting for cm40 power domain in scu-pd driver.
 - Add resource management support for IMX_SCU firmware driver.
 - Add more cm4 resources to i.MX SCU power domain driver.
 - Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
   in AARCH32 mode Linux on AARCH64 hardware.
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Merge tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers change for 5.9:

- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
  handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
  initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
  in AARCH32 mode Linux on AARCH64 hardware.

* tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: select ARM_GIC_V3 for i.MX8M
  firmware: imx: Move i.MX SCU soc driver into imx firmware folder
  firmware: imx: scu-pd: add more cm4 resources
  firmware: imx: add resource management api
  firmware: imx: scu-pd: fix cm40 power domain
  soc: imx: scu: use devm_kasprintf
  firmware: imx: make sure MU irq can wake up system from suspend mode

Link: https://lore.kernel.org/r/20200720085536.24138-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:35:21 +02:00
Marek Szyprowski 00067ca533 soc: samsung: exynos-regulator-coupler: Add simple voltage coupler for Exynos5800
Add a simple custom voltage regulator coupler for Exynos5800 SoCs, which
require coupling between "vdd_arm" and "vdd_int" regulators. This coupler
ensures that the voltage values don't go below the bootloader-selected
operation point during the boot process until the clients set their
constraints. It is achieved by assuming minimal voltage value equal to
the current value if no constraints are set. This also ensures proper
voltage balancing if any of the client driver is missing.

The balancing code comes from the regulator/core.c with the additional
logic for handling regulators without client constraints applied added.

Link: https://lore.kernel.org/r/20200721180900.13844-5-krzk@kernel.org
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:33:57 +02:00
Lars Povlsen 14bc6703b3 arm64: dts: sparx5: Add pinctrl support
This add pinctrl support to the Microchip Sparx5 SoC.

Link: https://lore.kernel.org/r/20200615133242.24911-5-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:40 +02:00
Lars Povlsen 6694aee00a arm64: dts: sparx5: Add basic cpu support
This adds the basic DT structure for the Microchip Sparx5 SoC, and the
reference boards, pcb125, pcb134 and pcb135. The two latter have a
NAND vs a eMMC centric variant (as a mount option).

Link: https://lore.kernel.org/r/20200615133242.24911-4-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:38 +02:00
Lars Povlsen 31a91c87a4 arm64: sparx5: Add support for Microchip 2xA53 SoC
This adds support for the Microchip Sparx5 ARMv8-based SoC family of
TSN-capable gigabit switches.

Link: https://lore.kernel.org/r/20200615133242.24911-3-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:28:35 +02:00
Lubomir Rintel 67598a474f ARM: dts: mmp3-dell-ariel: Enable the GPU
Enable the 2D (GC300) and the 3D (GC2000) GPUs cores.

Link: https://lore.kernel.org/r/20200718205019.184927-14-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:25 +02:00
Lubomir Rintel d896b86e09 ARM: dts: mmp3: Add the GPU
There's a GC2000 3D core accompanied by a GC300 2D core.

Link: https://lore.kernel.org/r/20200718205019.184927-13-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:22 +02:00
Lubomir Rintel cbcb5b33df ARM: dts: mmp2-olpc-xo-1-75: Enable the GPU
Enable the 3D + 2D (GC860) GPU core.

Link: https://lore.kernel.org/r/20200718205019.184927-12-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:20 +02:00
Lubomir Rintel b4c2abb681 ARM: dts: mmp2: Add the GPU
There's a GC860 2D + 3D core.

Link: https://lore.kernel.org/r/20200718205019.184927-11-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:17 +02:00
Lubomir Rintel d1e6f7c9f0 ARM: dts: mmp2-olpc-xo-1-75: Enable audio support
This enables the audio SRAM, DMA engine, I2S interface, and codec, hooks
them together and adds a audio-graph-card instance.

It also removes the jack gpios from the gpio-keys instance, because the
audio jack driver registers an input device.

Link: https://lore.kernel.org/r/20200718205019.184927-10-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:15 +02:00
Lubomir Rintel 3f2326312a ARM: dts: mmp2: Add SSPA nodes
There are two I2S-capable audio serial port blocks.

Link: https://lore.kernel.org/r/20200718205019.184927-9-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:12 +02:00
Lubomir Rintel 5fd71502e2 ARM: dts: mmp2: Add Audio Clock controller
This device generates the audio codec master clock and bit clock.

Link: https://lore.kernel.org/r/20200718205019.184927-8-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:10 +02:00
Lubomir Rintel f3f202bb56 ARM: dts: mmp2: Add DMA nodes
There is a 16-channel peripheral DMA controller along with two-channel
audio DMA engines.

Link: https://lore.kernel.org/r/20200718205019.184927-7-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:07 +02:00
Lubomir Rintel f2023d9d10 ARM: dts: mmp2: Add Audio SRAM
This memory is region is where the two-channel audio DMA can pump sound
samples into the SSPA's internal FIFO.

Link: https://lore.kernel.org/r/20200718205019.184927-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:04 +02:00
Lubomir Rintel f45a04a5ec ARM: dts: mmp2: Extend the MPMU reg range
The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.

Link: https://lore.kernel.org/r/20200718205019.184927-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:05:02 +02:00
Lubomir Rintel 1267340fe5 ARM: dts: mmp2: Add #power-domain-cells to /clocks
The power management unit, described by the soc_clocks node, controls the
power to the peripherals by the means of power domains with a single
cell -- the domain number.

Link: https://lore.kernel.org/r/20200718205019.184927-4-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:59 +02:00
Lubomir Rintel f45200b67e ARM: dts: mmp2-olpc-xo-1-75: Delete #address-cells from ssp3
On the XO-1.75, this node represents a bus interface that operates in slave
mode and thus is only able to accommodate a single subnode; no address
cells are necessary.

The Documentation/devicetree/bindings/spi/spi-controller.yaml binding
prefers that we drop the property instead of setting it to zero.

This fixes a DT validation error:

  arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
      { ... } is valid under each of {'required': ['spi-slave']},
                                     {'required': ['#address-cells']}

We also need to drop #size-cells:

  arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@d4037000:
      '#address-cells' is a dependency of '#size-cells'

Link: https://lore.kernel.org/r/20200718205019.184927-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:57 +02:00
Lubomir Rintel 9dbf272cf4 ARM: dts: mmp2-olpc-xo-1-75: Fix camera I2C node validation
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: $nodename:0:
      'camera_i2c' does not match '^i2c(@.*)?'
  mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'sda-gpios' is a required property
  mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'scl-gpios' is a required property

The "gpios" property actually was documented as deprecated, but got dropped
in commit 0175ce4a58 ("dt-bindings: i2c: Convert i2c-gpio binding to
json-schema"). It's probably best kept forgotten though.

Link: https://lore.kernel.org/r/20200718205019.184927-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:04:54 +02:00
Arnd Bergmann 6b848e263a Ux500 DTS changes for the v5.9 kernel series:
- Add touchkey to the Samsung Golden.
 - Fix up the supply nodes for the AB8500 PWM devices.
 - Fix up the cache controller node names.
 - Fix the Samsing Skomer accelerometer mounting matrix.
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Merge tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

Ux500 DTS changes for the v5.9 kernel series:

- Add touchkey to the Samsung Golden.
- Fix up the supply nodes for the AB8500 PWM devices.
- Fix up the cache controller node names.
- Fix the Samsing Skomer accelerometer mounting matrix.

* tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500-skomer: Correct accel mounting matrix
  ARM: dts: ste: Align L2 cache-controller nodename with dtschema
  ARM: dts: ux500: Supply nodes for the other 2 AB8500 PWM devices
  ARM: dts: ux500: samsung-golden: Add touchkey

Link: https://lore.kernel.org/r/CACRpkdZZgZ1LeOK5zFj5Z6Mh=RVz37hZ-7Z4DQNGC1uaiEVTeA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:03:24 +02:00
Arnd Bergmann b61010a1ec STM32 DT updates for v5.9, round 1
Highlights:
 ----------
 
 MCU part:
  -Enable stmpe811 on stm32f429
  -Enable l3gd20-gyro on stm32f429
  -Enable panel-ilitek-9341 on stm32f429
  -Fixes for yaml validation (leds, nodes names,
   remove useless bindings ...)
  -Add stm32xxx compatibles for syscon nodes
 
 MPU part:
  -Add support for usb role switch to dwc2
  -Add stm32xxx compatibles for syscon nodes
  -Update uart4 pin configuration for low power mode
   used by dkx and ed1 ST boards
  -Fix uart nodes ordering and uart7_pins_a comments
  -Add the support of uart instances available on STM32MP157 boards:
   - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
   - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
   - usart2 on stm32mp157c-dk2
  -Configure I2C5 on stm32mp15 DK boards
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Merge tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.9, round 1

Highlights:
----------

MCU part:
 -Enable stmpe811 on stm32f429
 -Enable l3gd20-gyro on stm32f429
 -Enable panel-ilitek-9341 on stm32f429
 -Fixes for yaml validation (leds, nodes names,
  remove useless bindings ...)
 -Add stm32xxx compatibles for syscon nodes

MPU part:
 -Add support for usb role switch to dwc2
 -Add stm32xxx compatibles for syscon nodes
 -Update uart4 pin configuration for low power mode
  used by dkx and ed1 ST boards
 -Fix uart nodes ordering and uart7_pins_a comments
 -Add the support of uart instances available on STM32MP157 boards:
  - usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
  - uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
  - usart2 on stm32mp157c-dk2
 -Configure I2C5 on stm32mp15 DK boards

* tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits)
  ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
  ARM: dts: stm32: Add compatibles for syscon for stm32mp151
  ARM: dts: stm32: Add compatibles for syscon for stm32h743
  ARM: dts: stm32: Add compatibles for syscon for stm32f746
  ARM: dts: stm32: Add compatibles for syscon for stm32f426
  dt-bindings: arm: stm32: Add compatibles for syscon nodes
  ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
  ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
  ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
  ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
  ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
  ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
  ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
  ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
  ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
  ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
  ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
  ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
  ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
  dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC
  ...

Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:02:00 +02:00
Arnd Bergmann bd979a33ac Samsung DTS ARM64 changes for v5.9
1. Enable UFS (Universal Flash Storage) on Exynos7 Espresso board.
 2. Fix silent hang after boot off Exynos7 Espresso board.
 3. Minor DTS fixes and adjustments with dtschema.
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Merge tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.9

1. Enable UFS (Universal Flash Storage) on Exynos7 Espresso board.
2. Fix silent hang after boot off Exynos7 Espresso board.
3. Minor DTS fixes and adjustments with dtschema.

* tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Add unit address to soc node and move thermal zones on Exynos7
  arm64: dts: exynos: Add unit address to soc node on Exynos5433
  arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
  arm64: dts: exynos: Keep LDO12 always-on on Espresso
  arm64: dts: exynos: Fix silent hang after boot on Espresso
  arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible
  arm64: dts: exynos: Describe PWM interrupts on Exynos7
  arm64: dts: exynos: Add UFS node to Exynos7

Link: https://lore.kernel.org/r/20200721180900.13844-3-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 22:00:00 +02:00
Arnd Bergmann 3236013b70 Samsung DTS ARM changes for v5.9
1. Enable Bluetooth on Artik5 (Exynos3250).
 2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
    S5Pv210); multiple fixes.
 3. Fix highest frequencies on Exynos5800.
 4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
 5. Minor DTS fixes and adjustments with dtschema.
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Merge tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.9

1. Enable Bluetooth on Artik5 (Exynos3250).
2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
   S5Pv210); multiple fixes.
3. Fix highest frequencies on Exynos5800.
4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
5. Minor DTS fixes and adjustments with dtschema.

* tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Replace HTTP links with HTTPS ones
  ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family
  ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420
  ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale
  ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen
  ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
  ARM: dts: exynos: Fix missing empty reg/ranges property regulators on Trats
  ARM: dts: exynos: Align L2 cache-controller nodename with dtschema
  ARM: dts: s5pv210: Correct BCM4329 bluetooth node
  ARM: dts: s5pv210: Add BMA023 accelerometer support to Aries
  ARM: dts: s5pv210: Add support for GP2A light sensor on Aries
  ARM: dts: s5pv210: Correct fuelgauge definition on Aries
  ARM: dts: s5pv210: Add interrupt-controller property to gph3
  ARM: dts: exynos: Enable Bluetooth support for Artik5 board
  ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data

Link: https://lore.kernel.org/r/20200721180900.13844-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:58:57 +02:00
Arnd Bergmann 42f8362abd Qualcomm ARM dts updates for v5.9
Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
 RB3011 using the same platform.
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Merge tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM dts updates for v5.9

Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
RB3011 using the same platform.

* tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add qfprom definition to ipq806x
  ARM: dts: qcom: Add MikroTik RB3011
  ARM: dts: qcom: add ethernet definitions to ipq8064

Link: https://lore.kernel.org/r/20200721045032.3430395-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:58:17 +02:00
Arnd Bergmann c6e2e454ba Qualcomm ARM64 DT updates for v5.9
For SM8250 this adds the main pinctrl/gpio block (TLMM), I2C and SPI
 controllers, the CPU subsytem watchdog, inter-processor signalling
 controller (IPCC), always-on power/clock controller (AOSS),
 inter-processor state machine (SMP2P), defines remoteproc controls
 for audio, compute and sensor processors and base definition for the
 PM8009 PMIC. It also does fix up a few minor issues from the initial
 merge of the platform support.
 
 SC7180 and SDM845 gains interconnect paths and performance tables
 defined for display, QUP, QSPI, SDHC and CPUs.
 
 SC7180 gains WiFi support and some cleanups related to the modem
 remoteproc.
 
 SDM845 gains inline crypto engine support for UFS, LAB/IBB
 regulators for powering display panels, remoteproc relocation debug
 support
 
 SM8150 gains USB controller support and the two related PHYs, as well as
 thermal zones and throttling support.
 
 IPQ8074 gains USB and SDHCI support.
 
 MSM8916 is being cleaned up, gains interconnect providers and Samsung
 A2015 gains accelerometer and magnetometer support.
 
 MSM8994 gains PSCI, SDHCI, SPMI support, I2C, SPI, UART gains DMA
 support and the DTS files are cleaned up.
 
 The SDM630 platform DTS is at last merged and initial support for Sony
 Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra is added.
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Merge tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for v5.9

For SM8250 this adds the main pinctrl/gpio block (TLMM), I2C and SPI
controllers, the CPU subsytem watchdog, inter-processor signalling
controller (IPCC), always-on power/clock controller (AOSS),
inter-processor state machine (SMP2P), defines remoteproc controls
for audio, compute and sensor processors and base definition for the
PM8009 PMIC. It also does fix up a few minor issues from the initial
merge of the platform support.

SC7180 and SDM845 gains interconnect paths and performance tables
defined for display, QUP, QSPI, SDHC and CPUs.

SC7180 gains WiFi support and some cleanups related to the modem
remoteproc.

SDM845 gains inline crypto engine support for UFS, LAB/IBB
regulators for powering display panels, remoteproc relocation debug
support

SM8150 gains USB controller support and the two related PHYs, as well as
thermal zones and throttling support.

IPQ8074 gains USB and SDHCI support.

MSM8916 is being cleaned up, gains interconnect providers and Samsung
A2015 gains accelerometer and magnetometer support.

MSM8994 gains PSCI, SDHCI, SPMI support, I2C, SPI, UART gains DMA
support and the DTS files are cleaned up.

The SDM630 platform DTS is at last merged and initial support for Sony
Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra is added.

* tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (66 commits)
  arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators
  arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains
  arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
  arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
  arm64: dts: qcom: msm8916-samsung-a2015: Add accelerometer/magnetometer
  arm64: dts: qcom: msm8916: Use higher I2C drive-strength only on DB410c
  arm64: dts: qcom: msm8916: Simplify pinctrl configuration
  arm64: dts: msm8916-samsung/longcheer: Move pinctrl/regulators to end of file
  arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon
  arm64: dts: qcom: sc7180: Add missing properties for Wifi node
  arm64: dts: qcom: Fix WiFi supplies on sc7180-idp
  arm64: dts: sdm845: add Inline Crypto Engine registers and clock
  arm64: dts: sc7180: Add sdhc opps and power-domains
  arm64: dts: sdm845: Add sdhc opps and power-domains
  arm64: dts: sc7180: Add OPP table for all qup devices
  arm64: dts: sdm845: Add OPP table for all qup devices
  arm64: dts: sc7180: Add qspi opps and power-domains
  arm64: dts: sdm845: Add qspi opps and power-domains
  arm64: dts: qcom: sdm845: Add cpu OPP tables
  arm64: dts: qcom: sc7180: Drop the unused non-MSA SID
  ...

Link: https://lore.kernel.org/r/20200721044934.3430084-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:55:46 +02:00
Arnd Bergmann 01407153cf ARM64: DT: Hisilicon SoCs DT updates for 5.9
- Refactor hi6220-hikey dts to use phandles for overriding nodes
 - Align UART node name to fix dtschema validator warnings for hi6220
 - Add basic usb gadget support on hikey960
 - Update adv7533 nodes to meet with the binding for hikey and hikey960
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Merge tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon SoCs DT updates for 5.9

- Refactor hi6220-hikey dts to use phandles for overriding nodes
- Align UART node name to fix dtschema validator warnings for hi6220
- Add basic usb gadget support on hikey960
- Update adv7533 nodes to meet with the binding for hikey and hikey960

* tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding
  dts: hi3660: Add support for basic usb gadget on Hikey960
  arm64: dts: hisilicon: Align UART nodename with dtschema
  arm64: dts: hisilicon: Use phandles for overriding nodes in hi6220

Link: https://lore.kernel.org/r/5F165E8E.3030503@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:53:43 +02:00
Arnd Bergmann 6ce448eeef ARM: DT: Hisilicon ARM32 SoCs updates for v5.9
- Update L2 cache controller nodes to fix dtschema validator warnings
   for hi3620 and hix5hd2
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Merge tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM: DT: Hisilicon ARM32 SoCs updates for v5.9

- Update L2 cache controller nodes to fix dtschema validator warnings
  for hi3620 and hix5hd2

* tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:51:57 +02:00
Arnd Bergmann 4828f45708 Our usual number of patches to improve the Allwinner Device Tree
support, including:
   - CPUFreq / Thermal throttling support for the H5
   - Touchscreen support for the Pinephone
   - New boards: PinePhone v1.2
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Merge tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Our usual number of patches to improve the Allwinner Device Tree
support, including:
  - CPUFreq / Thermal throttling support for the H5
  - Touchscreen support for the Pinephone
  - New boards: PinePhone v1.2

* tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs
  arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
  arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
  arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones
  arm64: dts: allwinner: h5: Add clock to CPU cores
  ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages
  ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores
  ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores
  arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V
  arm64: dts: allwinner: Add support for PinePhone revision 1.2
  dt-bindings: arm: sunxi: Add PinePhone 1.2 bindings
  arm64: dts: sun50i-a64-pinephone: Add touchscreen support
  arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone
  ARM: dts: orange-pi-zero-plus2: add leds configuration
  ARM: dts: orange-pi-zero-plus2: enable USB OTG port

Link: https://lore.kernel.org/r/fa48ffcb-3404-41bb-b065-a16717cf5688.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:50:35 +02:00
Arnd Bergmann 262fc784d8 Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.
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Merge tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt

Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.

* tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:49:58 +02:00
Arnd Bergmann 3b796abd30 i.MX arm64 device tree update for 5.9:
- Update i.MX8M OCOTP device node name to match .yaml schema.
 - Add ftm_alarm0 device support for layerscape SoCs.
 - Add DSPI controller support for lx2160a device.
 - A series from Peng Fan to add aliases for various devices on i.MX8
   SoCs.
 - Add Hantro G1/G2 VPU device support for imx8mq.
 - Add more thermal zone support for ls1028a, ls1043a and ls1046a.
 - Other small random changes.
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Merge tag 'imx-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.9:

- Update i.MX8M OCOTP device node name to match .yaml schema.
- Add ftm_alarm0 device support for layerscape SoCs.
- Add DSPI controller support for lx2160a device.
- A series from Peng Fan to add aliases for various devices on i.MX8
  SoCs.
- Add Hantro G1/G2 VPU device support for imx8mq.
- Add more thermal zone support for ls1028a, ls1043a and ls1046a.
- Other small random changes.

* tag 'imx-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits)
  arm64: dts: lx2160a-rdb: fix shunt-resistor value
  arm64: dts: ls1028a-qds: Add DSPI flash nodes
  arm64: dts: lx2160a: Increase configuration space size
  arm64: dts: zii-ultra: update MDIO speed and preamble
  arm64: dts: ls1043a: update USB nodes status to match board config
  arm64: dts: imx8mn-evk: add pca9450 for i.mx8mn-evk board
  arm64: dts: imx8mp: add ddr pmu device node
  arm64: dts: ls1043a: add more thermal zone support
  arm64: dts: ls1046a: add more thermal zone support
  arm64: dts: layerscape: add ftm_alarm0 node
  arm64: dts: ls1028a: Add ftm_alarm0 DT node
  arm64: dts: lx2160a: add ftm_alarm0 DT node
  arm64: dts: lx2160a: add DT node for all DSPI controller
  arm64: dts: lx2160a: add dspi controller DT nodes
  arm64: dts: imx8mp: Add fallback compatible to ocotp node
  arm64: dts: imx8qxp: Add ethernet alias
  arm64: dts: imx8qxp: add i2c aliases
  arm64: dts: imx8qxp: add alias for lsio MU
  arm64: dts: imx8m: add mu node
  arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs
  ...

Link: https://lore.kernel.org/r/20200720085536.24138-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:48:15 +02:00
Arnd Bergmann d27895a122 i.MX device tree update for 5.9:
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
 - Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
 - Make tempmon node as child of anatop node according to hardware
   architecture.
 - The vf610-zii device update: configure fiber port to 1000BaseX, add
   switch watchdog, MDIO speed and preamble.
 - A series from Fabio Estevam to update imx6qdl-sabresd and
   imx6q-tbs2910 for using MDIO node and reset-assert-us.
 - Align L2 cache-controller device node name with .yaml schema.
 - Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
 - A series of patches from Shengjiu Wang to enable various audio
   support on i.MX6 devices.
 - Add Gateworks System Controller support for imx6qdl-gw devices.
 - Change default #pwm-cells setting to <3> in the SoC dtsi files.
 - Other small random changes.
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Merge tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree update for 5.9:

- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
  architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
  switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
  imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
  support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.

* tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits)
  ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
  ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
  ARM: dts: imx6q-tbs2910: Pass reset-assert-us
  ARM: dts: imx6q-tbs2910: Add an mdio node
  ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
  ARM: dts: imx6qdl-sabresd: Add an mdio node
  ARM: dts: imx6qdl-gw: add Gateworks System Controller support
  ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
  ARM: dts: vf610-zii-spb4: Add node for switch watchdog
  ARM: dts: colibri-imx6: remove pinctrl-names orphan
  ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
  ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
  ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
  ARM: dts: ZII: update MDIO speed and preamble
  ARM: dts: vfxxx: Add node for CAAM
  ARM: dts: imx6qp-sabresd: enable sata
  ARM: dts: imx6qp-sabreauto: enable sata
  ARM: dts: add Protonic RVT board
  ARM: dts: add Protonic VT7 board
  ARM: dts: add Protonic WD2 board
  ...

Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:46:22 +02:00
Arnd Bergmann 36e163eda1 SoCFPGA DTS updates for v5.9
- Populate clock entries for Agilex platform
 - Add "reset-names" to SPI entries
 - Add Maxim max1619 temperature sensor to Arria10 devkit
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Merge tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.9
- Populate clock entries for Agilex platform
- Add "reset-names" to SPI entries
- Add Maxim max1619 temperature sensor to Arria10 devkit

* tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
  arm: dts: socfpga: add reset-names to spi node
  arm64: dts: agilex: add nand clocks
  arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex

Link: https://lore.kernel.org/r/20200719011804.15599-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:43:24 +02:00
Arnd Bergmann 7c8c70ba5c i.MX fixes for 5.8, round 3:
- A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb
   board.
 - One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
   detect work correctly.
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Merge tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.8, round 3:

- A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb
  board.
- One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card
  detect work correctly.

* tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect
  ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2
  ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2

Link: https://lore.kernel.org/r/20200720040148.GA20462@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:41:36 +02:00
Arnd Bergmann 21a59e0bf5 Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that
were failing on older SoCs and one to fix Cedrus on the H6.
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Merge tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that
were failing on older SoCs and one to fix Cedrus on the H6.

* tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage
  ARM: dts sunxi: Relax a bit the CMA pool allocation range

Link: https://lore.kernel.org/r/e24f0608-6a4f-4163-b99e-a5f48e796184.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:40:40 +02:00
Arnd Bergmann a1224fdc5c i.MX defconfig update for 5.9:
- Enable PCA9450 regulator driver in arm64 defconfig.
 - Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make
   it useful for Kontron sl28 boards.
 - Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get
   AARCH32 mode kernel work on AARCH64 hardware.
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Merge tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig update for 5.9:

- Enable PCA9450 regulator driver in arm64 defconfig.
- Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make
  it useful for Kontron sl28 boards.
- Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get
  AARCH32 mode kernel work on AARCH64 hardware.

* tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v6_v7_defconfig: Support i.MX8MM
  arm64: defconfig: enable RTC and audio support on Kontron sl28 boards
  arm64: defconfig: add pca9450 pmic driver

Link: https://lore.kernel.org/r/20200720085536.24138-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:39:30 +02:00
Arnd Bergmann a4cd898d64 Qualcomm ARM64 defconfig updates for v5.9
Enable the Qualcomm RPM power-domain, RTC and IPCC drivers, the SDM845
 video clock controller driver and the SM8250 TLMM pinctrl driver.
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Merge tag 'qcom-arm64-defconfig-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig

Qualcomm ARM64 defconfig updates for v5.9

Enable the Qualcomm RPM power-domain, RTC and IPCC drivers, the SDM845
video clock controller driver and the SM8250 TLMM pinctrl driver.

* tag 'qcom-arm64-defconfig-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: Enable Qualcomm IPCC driver
  arm64: defconfig: Enable Qualcomm SM8250 pinctrl driver
  arm64: defconfig: Add CONFIG_QCOM_RPMPD
  arm64: defconfig: Enable the PM8xxx RTC driver
  arm64: defconfig: Enable SDM845 video clock controller

Link: https://lore.kernel.org/r/20200721044848.3429874-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22 21:38:17 +02:00
David S. Miller dee72f8a0c Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
Alexei Starovoitov says:

====================
pull-request: bpf-next 2020-07-21

The following pull-request contains BPF updates for your *net-next* tree.

We've added 46 non-merge commits during the last 6 day(s) which contain
a total of 68 files changed, 4929 insertions(+), 526 deletions(-).

The main changes are:

1) Run BPF program on socket lookup, from Jakub.

2) Introduce cpumap, from Lorenzo.

3) s390 JIT fixes, from Ilya.

4) teach riscv JIT to emit compressed insns, from Luke.

5) use build time computed BTF ids in bpf iter, from Yonghong.
====================

Purely independent overlapping changes in both filter.h and xdp.h

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-22 12:35:33 -07:00
Jagan Teki 93ca8ac2e8 arm64: dts: rockchip: Add PCIe for RockPI N10
This patch adds support to enable PCIe for RockPI N10.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-3-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:19:06 +02:00
Jagan Teki d0cb2f30e7 ARM: dts: rockchip: Add HDMI out for RockPI N8/N10
This patch adds support to enable HDMI out for
N10 and N8 combinations SBCs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-2-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:19:06 +02:00
Jagan Teki 417b188a98 ARM: dts: rockchip: Add USB for RockPI N8/N10
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.

This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.

Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200720110230.367985-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:19:06 +02:00
Jagan Teki 82540defdd ARM: dts: rockchip: Add usb host0 ohci node for rk3288
rk3288 and rk3288w have a usb host0 ohci controller.

Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.

So add usb host0 ohci node in rk3288 dtsi and boards
can then enable it if supported.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: William Wu <william.wu@rock-chips.com>
Link: https://lore.kernel.org/r/20200720105846.367776-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22 21:08:29 +02:00
Linus Torvalds d15be54603 media fixes for v5.8-rc7
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Merge tag 'media/v5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media into master

Pull media fixes from Mauro Carvalho Chehab:
 "A series of fixes for the upcoming atomisp driver. They solve issues
  when probing atomisp on devices with multiple cameras and get rid of
  warnings when built with W=1.

  The diffstat is a bit long, as this driver has several abstractions.
  The patches that solved the issues with W=1 had to get rid of some
  duplicated code (there used to have 2 versions of the same code, one
  for ISP2401 and another one for ISP2400).

  As this driver is not in 5.7, such changes won't cause regressions"

* tag 'media/v5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (38 commits)
  Revert "media: atomisp: keep the ISP powered on when setting it"
  media: atomisp: fix mask and shift operation on ISPSSPM0
  media: atomisp: move system_local consts into a C file
  media: atomisp: get rid of version-specific system_local.h
  media: atomisp: move global stuff into a common header
  media: atomisp: remove non-used 32-bits consts at system_local
  media: atomisp: get rid of some unused static vars
  media: atomisp: Fix error code in ov5693_probe()
  media: atomisp: Replace trace_printk by pr_info
  media: atomisp: Fix __func__ style warnings
  media: atomisp: fix help message for ISP2401 selection
  media: atomisp: i2c: atomisp-ov2680.c: fixed a brace coding style issue.
  media: atomisp: make const arrays static, makes object smaller
  media: atomisp: Clean up non-existing folders from Makefile
  media: atomisp: Get rid of ACPI specifics in gmin_subdev_add()
  media: atomisp: Provide Gmin subdev as parameter to gmin_subdev_add()
  media: atomisp: Use temporary variable for device in gmin_subdev_add()
  media: atomisp: Refactor PMIC detection to a separate function
  media: atomisp: Deduplicate return ret in gmin_i2c_write()
  media: atomisp: Make pointer to PMIC client global
  ...
2020-07-22 11:56:00 -07:00
Heiko Carstens 411155820b s390/time: improve comparison for tod steering
It doesn't make sense to add zero shifted by 15. It's still zero.

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-22 17:02:13 +02:00
Heiko Carstens 555701a714 s390/time: select CLOCKSOURCE_VALIDATE_LAST_CYCLE
The value returned by read_tod_clock() will overflow on September 17th 2042.
To avoid that system time jumps back select CLOCKSOURCE_VALIDATE_LAST_CYCLE
which enables a sanity check in order to prevent negative "delta" values.

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-22 17:02:08 +02:00
Heiko Carstens 58e15716fe s390/time: use CLOCKSOURCE_MASK
Make use of CLOCKSOURCE_MASK instead of open-coding it.

Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2020-07-22 17:02:04 +02:00
Vladimir Murzin 493cf9b723 arm64: s/AMEVTYPE/AMEVTYPER
Activity Monitor Event Type Registers are named as AMEVTYPER{0,1}<n>

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200721091259.102756-1-vladimir.murzin@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2020-07-22 13:59:38 +01:00
Russell King 2350ebe2c4 ARM: uaccess: add further explanation of __range_ok()
Detail the success return condition, and that we rely on KERNEL_DS
being zero for this to operate correctly.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-22 09:50:55 +01:00
Hu Haowen 2ac5413e5e x86/perf: Fix a typo
The word "Zhoaxin" is incorrect and the right one is "Zhaoxin".

Signed-off-by: Hu Haowen <xianfengting221@163.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200719105007.57649-1-xianfengting221@163.com
2020-07-22 10:22:08 +02:00
Valentin Schneider e17ae7fea8 arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSURE
This option now correctly depends on CPU_FREQ_THERMAL, so select it on the
architectures that implement the required functions,
arch_set_thermal_pressure() and arch_get_thermal_pressure().

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200712165917.9168-4-valentin.schneider@arm.com
2020-07-22 10:22:06 +02:00
Valentin Schneider 25980c7a79 arch_topology, sched/core: Cleanup thermal pressure definition
The following commit:

  14533a16c4 ("thermal/cpu-cooling, sched/core: Move the arch_set_thermal_pressure() API to generic scheduler code")

moved the definition of arch_set_thermal_pressure() to sched/core.c, but
kept its declaration in linux/arch_topology.h. When building e.g. an x86
kernel with CONFIG_SCHED_THERMAL_PRESSURE=y, cpufreq_cooling.c ends up
getting the declaration of arch_set_thermal_pressure() from
include/linux/arch_topology.h, which is somewhat awkward.

On top of this, sched/core.c unconditionally defines
o The thermal_pressure percpu variable
o arch_set_thermal_pressure()

while arch_scale_thermal_pressure() does nothing unless redefined by the
architecture.

arch_*() functions are meant to be defined by architectures, so revert the
aforementioned commit and re-implement it in a way that keeps
arch_set_thermal_pressure() architecture-definable, and doesn't define the
thermal pressure percpu variable for kernels that don't need
it (CONFIG_SCHED_THERMAL_PRESSURE=n).

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200712165917.9168-2-valentin.schneider@arm.com
2020-07-22 10:22:05 +02:00
Peter Zijlstra 015dc08918 Merge branch 'sched/urgent' 2020-07-22 10:22:02 +02:00
Joerg Roedel de2b41be8f x86, vmlinux.lds: Page-align end of ..page_aligned sections
On x86-32 the idt_table with 256 entries needs only 2048 bytes. It is
page-aligned, but the end of the .bss..page_aligned section is not
guaranteed to be page-aligned.

As a result, objects from other .bss sections may end up on the same 4k
page as the idt_table, and will accidentially get mapped read-only during
boot, causing unexpected page-faults when the kernel writes to them.

This could be worked around by making the objects in the page aligned
sections page sized, but that's wrong.

Explicit sections which store only page aligned objects have an implicit
guarantee that the object is alone in the page in which it is placed. That
works for all objects except the last one. That's inconsistent.

Enforcing page sized objects for these sections would wreckage memory
sanitizers, because the object becomes artificially larger than it should
be and out of bound access becomes legit.

Align the end of the .bss..page_aligned and .data..page_aligned section on
page-size so all objects places in these sections are guaranteed to have
their own page.

[ tglx: Amended changelog ]

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kees Cook <keescook@chromium.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20200721093448.10417-1-joro@8bytes.org
2020-07-22 09:38:37 +02:00
Sandeep Maheswaram d3d245aee0 arm64: dts: qcom: sc7180: Add maximum speed property for DWC3 USB node
Adding maximum speed property for DWC3 USB node which can be used
for setting interconnect bandwidth.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1595317489-18432-3-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-21 22:04:11 -07:00
Sai Prakash Ranjan 4a183020d3 arm64: dts: qcom: sdm845: Support ETMv4 power management
Add "arm,coresight-loses-context-with-cpu" property to coresight
ETM nodes to avoid failure of trace session because of losing
context on entering deep idle states.

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/20200721071343.2898-1-saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-21 21:36:21 -07:00
Max Filippov 5fff09bc14 xtensa: fix access check in csum_and_copy_from_user
Commit d341659f47 ("xtensa: switch to providing
csum_and_copy_from_user()") introduced access check, but incorrectly
tested dst instead of src.
Fix access_ok argument in csum_and_copy_from_user.

Cc: Al Viro <viro@zeniv.linux.org.uk>
Fixes: d341659f47 ("xtensa: switch to providing csum_and_copy_from_user()")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-21 19:08:25 -04:00
Martin Blumenstingl 916a0edc43 arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
Add the OPP table for the Mali Bifrost GPU and drop the hardcoded
initial clock configuration. This enables GPU DVFS and thus saves power
when the GPU is not in use while still being able switch to a higher
clock on demand.

Set the GP0_PLL clock to 744MHz (which is the only frequency which
cannot be derived from the FCLK dividers) as the clock driver avoids
setting the parent clock rates so the HIFI PLL clock isn't changed (as
that's reserved for audio).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200719173213.639540-4-martin.blumenstingl@googlemail.com
2020-07-21 14:12:38 -07:00
Martin Blumenstingl 8f16cfabbc arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
Add the OPP table for the Mali-T820 GPU and drop the hardcoded initial
clock configuration. This enables GPU DVFS and thus saves power when the
GPU is not in use while still being able switch to a higher clock on
demand.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200719173213.639540-3-martin.blumenstingl@googlemail.com
2020-07-21 14:12:38 -07:00
Martin Blumenstingl 46ffadc7e6 arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
Add the OPP table for the Mali-450 GPU and drop the hardcoded initial
clock configuration. This enables GPU DVFS and thus saves power when the
GPU is not in use while still being able switch to a higher clock on
demand.

Set the GP0_PLL clock to 744MHz (which is the only frequency which
cannot be derived from the FCLK dividers) as the clock driver avoids
setting the parent clock rates so the MPLL clocks aren't changed (as
these are reserved for audio). The only exception to this is the GXL
S805X package because the 744MHz OPP isn't working correctly there.

While here, make most of meson-gxl-mali re-usable to reduce the amount
of duplicate code between GXBB and GXL. This is more important now as we
don't want to duplicate the GPU OPP table.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200719173213.639540-2-martin.blumenstingl@googlemail.com
2020-07-21 14:12:37 -07:00
Kevin Hilman f26d8e7ac4 Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes
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Merge tag 'amlogic-fixes' into v5.9/dt64

Amlogic fixes for v5.8-rc
- misc DT fixes, and SoC ID fixes
2020-07-21 14:12:19 -07:00
Christian Hewitt ea232b9ccc arm64: dts: meson: add support for the WeTek Core 2
The WeTek Core2 is a commercial device based on the Amlogic Q200 reference
design but with the following differences:

- 3GB RAM, 32GB eMMC
- Blue and Red LEDs used to signal on/off status
- uart_AO can be accessed after opening the case; soldering required
- USB OTG is not accessible (inside the case)
- Realtek RTL8152 Ethernet (internal USB connection)

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200719021421.7959-3-christianshewitt@gmail.com
2020-07-21 13:58:42 -07:00
Christian Hewitt b8b85d01be arm64: dts: meson: add audio playback to khadas-vim3l
Add initial audio support limited to HDMI i2s, copying the config
from the existing VIM3 device-tree.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200718072532.8427-3-christianshewitt@gmail.com
2020-07-21 13:58:36 -07:00
Christian Hewitt 725da67ce4 arm64: dts: meson: add audio playback to odroid-c4
Add initial audio support limited to HDMI i2s.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200718072532.8427-2-christianshewitt@gmail.com
2020-07-21 13:58:35 -07:00
Luke Nelson 18a4d8c97b bpf, riscv: Use compressed instructions in the rv64 JIT
This patch uses the RVC support and encodings from bpf_jit.h to optimize
the rv64 jit.

The optimizations work by replacing emit(rv_X(...)) with a call to a
helper function emit_X, which will emit a compressed version of the
instruction when possible, and when RVC is enabled.

The JIT continues to pass all tests in lib/test_bpf.c, and introduces
no new failures to test_verifier; both with and without RVC being enabled.

Most changes are straightforward replacements of emit(rv_X(...), ctx)
with emit_X(..., ctx), with the following exceptions bearing mention;

* Change emit_imm to sign-extend the value in "lower", since the
checks for RVC (and the instructions themselves) treat the value as
signed. Otherwise, small negative immediates will not be recognized as
encodable using an RVC instruction. For example, without this change,
emit_imm(rd, -1, ctx) would cause lower to become 4095, which is not a
6b int even though a "c.li rd, -1" instruction suffices.

* For {BPF_MOV,BPF_ADD} BPF_X, drop using addiw,addw in the 32-bit
cases since the values are zero-extended into the upper 32 bits in
the following instructions anyways, and the addition commutes with
zero-extension. (BPF_SUB BPF_X must still use subw since subtraction
does not commute with zero-extension.)

This patch avoids optimizing branches and jumps to use RVC instructions
since surrounding code often makes assumptions about the sizes of
emitted instructions. Optimizing these will require changing these
functions (e.g., emit_branch) to dynamically compute jump offsets.

The following are examples of the JITed code for the verifier selftest
"direct packet read test#3 for CGROUP_SKB OK", without and with RVC
enabled, respectively. The former uses 178 bytes, and the latter uses 112,
for a ~37% reduction in code size for this example.

Without RVC:

   0: 02000813    addi  a6,zero,32
   4: fd010113    addi  sp,sp,-48
   8: 02813423    sd    s0,40(sp)
   c: 02913023    sd    s1,32(sp)
  10: 01213c23    sd    s2,24(sp)
  14: 01313823    sd    s3,16(sp)
  18: 01413423    sd    s4,8(sp)
  1c: 03010413    addi  s0,sp,48
  20: 03056683    lwu   a3,48(a0)
  24: 02069693    slli  a3,a3,0x20
  28: 0206d693    srli  a3,a3,0x20
  2c: 03456703    lwu   a4,52(a0)
  30: 02071713    slli  a4,a4,0x20
  34: 02075713    srli  a4,a4,0x20
  38: 03856483    lwu   s1,56(a0)
  3c: 02049493    slli  s1,s1,0x20
  40: 0204d493    srli  s1,s1,0x20
  44: 03c56903    lwu   s2,60(a0)
  48: 02091913    slli  s2,s2,0x20
  4c: 02095913    srli  s2,s2,0x20
  50: 04056983    lwu   s3,64(a0)
  54: 02099993    slli  s3,s3,0x20
  58: 0209d993    srli  s3,s3,0x20
  5c: 09056a03    lwu   s4,144(a0)
  60: 020a1a13    slli  s4,s4,0x20
  64: 020a5a13    srli  s4,s4,0x20
  68: 00900313    addi  t1,zero,9
  6c: 006a7463    bgeu  s4,t1,0x74
  70: 00000a13    addi  s4,zero,0
  74: 02d52823    sw    a3,48(a0)
  78: 02e52a23    sw    a4,52(a0)
  7c: 02952c23    sw    s1,56(a0)
  80: 03252e23    sw    s2,60(a0)
  84: 05352023    sw    s3,64(a0)
  88: 00000793    addi  a5,zero,0
  8c: 02813403    ld    s0,40(sp)
  90: 02013483    ld    s1,32(sp)
  94: 01813903    ld    s2,24(sp)
  98: 01013983    ld    s3,16(sp)
  9c: 00813a03    ld    s4,8(sp)
  a0: 03010113    addi  sp,sp,48
  a4: 00078513    addi  a0,a5,0
  a8: 00008067    jalr  zero,0(ra)

With RVC:

   0:   02000813    addi    a6,zero,32
   4:   7179        c.addi16sp  sp,-48
   6:   f422        c.sdsp  s0,40(sp)
   8:   f026        c.sdsp  s1,32(sp)
   a:   ec4a        c.sdsp  s2,24(sp)
   c:   e84e        c.sdsp  s3,16(sp)
   e:   e452        c.sdsp  s4,8(sp)
  10:   1800        c.addi4spn  s0,sp,48
  12:   03056683    lwu     a3,48(a0)
  16:   1682        c.slli  a3,0x20
  18:   9281        c.srli  a3,0x20
  1a:   03456703    lwu     a4,52(a0)
  1e:   1702        c.slli  a4,0x20
  20:   9301        c.srli  a4,0x20
  22:   03856483    lwu     s1,56(a0)
  26:   1482        c.slli  s1,0x20
  28:   9081        c.srli  s1,0x20
  2a:   03c56903    lwu     s2,60(a0)
  2e:   1902        c.slli  s2,0x20
  30:   02095913    srli    s2,s2,0x20
  34:   04056983    lwu     s3,64(a0)
  38:   1982        c.slli  s3,0x20
  3a:   0209d993    srli    s3,s3,0x20
  3e:   09056a03    lwu     s4,144(a0)
  42:   1a02        c.slli  s4,0x20
  44:   020a5a13    srli    s4,s4,0x20
  48:   4325        c.li    t1,9
  4a:   006a7363    bgeu    s4,t1,0x50
  4e:   4a01        c.li    s4,0
  50:   d914        c.sw    a3,48(a0)
  52:   d958        c.sw    a4,52(a0)
  54:   dd04        c.sw    s1,56(a0)
  56:   03252e23    sw      s2,60(a0)
  5a:   05352023    sw      s3,64(a0)
  5e:   4781        c.li    a5,0
  60:   7422        c.ldsp  s0,40(sp)
  62:   7482        c.ldsp  s1,32(sp)
  64:   6962        c.ldsp  s2,24(sp)
  66:   69c2        c.ldsp  s3,16(sp)
  68:   6a22        c.ldsp  s4,8(sp)
  6a:   6145        c.addi16sp  sp,48
  6c:   853e        c.mv    a0,a5
  6e:   8082        c.jr    ra

Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Cc: Björn Töpel <bjorn.topel@gmail.com>
Link: https://lore.kernel.org/bpf/20200721025241.8077-4-luke.r.nels@gmail.com
2020-07-21 13:26:25 -07:00
Luke Nelson 804ec72c68 bpf, riscv: Add encodings for compressed instructions
This patch adds functions for encoding and emitting compressed riscv
(RVC) instructions to the BPF JIT.

Some regular riscv instructions can be compressed into an RVC instruction
if the instruction fields meet some requirements. For example, "add rd,
rs1, rs2" can be compressed into "c.add rd, rs2" when rd == rs1.

To make using RVC encodings simpler, this patch also adds helper
functions that selectively emit either a regular instruction or a
compressed instruction if possible.

For example, emit_add will produce a "c.add" if possible and regular
"add" otherwise.

Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20200721025241.8077-3-luke.r.nels@gmail.com
2020-07-21 13:26:25 -07:00
Luke Nelson bfabff3cb0 bpf, riscv: Modify JIT ctx to support compressed instructions
This patch makes the necessary changes to struct rv_jit_context and to
bpf_int_jit_compile to support compressed riscv (RVC) instructions in
the BPF JIT.

It changes the JIT image to be u16 instead of u32, since RVC instructions
are 2 bytes as opposed to 4.

It also changes ctx->offset and ctx->ninsns to refer to 2-byte
instructions rather than 4-byte ones. The riscv PC is required to be
16-bit aligned with or without RVC, so this is sufficient to refer to
any valid riscv offset.

The code for computing jump offsets in bytes is updated accordingly,
and factored into a new "ninsns_rvoff" function to simplify the code.

Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20200721025241.8077-2-luke.r.nels@gmail.com
2020-07-21 13:26:25 -07:00
Ilya Leoshkevich 94ad428df5 s390/bpf: Use bpf_skip() in bpf_jit_prologue()
Now that we have bpf_skip() for emitting nops, use it in
bpf_jit_prologue() in order to reduce code duplication.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20200717165326.6786-6-iii@linux.ibm.com
2020-07-21 13:26:25 -07:00