Граф коммитов

1121 Коммитов

Автор SHA1 Сообщение Дата
Paul Kocialkowski c773926822
soc: sunxi: sram: Add support for the H5 SoC system control
This adds the H5 SoC compatible to the list of device-tree matches for
the SRAM driver. Since the variant is the same as the A64 (that precedes
the H5), the same variant description is used.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-05 11:55:36 +01:00
Paul Kocialkowski 15e53723ce
soc: sunxi: sram: Enable EMAC clock access for H3 variant
Just like the A64 and H5, the H3 SoC uses the system control block
to enable the EMAC clock.

Add a variant structure definition for the H3 and use it over the A10
one. This will allow using the H3-specific binding for the syscon node
attached to the EMAC instead of the generic syscon binding.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-05 11:53:41 +01:00
Lucas Stach 685efffe37 soc: imx: gpcv2: add support for i.MX8MQ SoC
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the
GPCv2 on the i.MX7, but only controls more power domains with a
different mapping.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-05 08:50:36 +08:00
Lucas Stach e125dcba83 soc: imx: gpcv2: move register access table to domain data
The valid register ranges are defined by the implemented power domains,
which are different between the individual SoCs where the GPCv2 is used.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-05 08:50:34 +08:00
Lucas Stach a800f41842 soc: imx: gpcv2: prefix i.MX7 specific defines
So we can add i.MX8M support without introducing name clashes.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-05 08:50:19 +08:00
Olof Johansson 202f9977b0 Qualcomm ARM Based Driver Updates for v4.21
* Fix llcc license, includes, and error checks
 * Remove use of memcpy in cmd-db and fix API breakage
 * Add QCS404 compatible to SMD-RPM
 * Minor fixes for QMI
 * Add irq clear handling in QCOM Geni SE during init
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Merge tag 'qcom-drivers-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Qualcomm ARM Based Driver Updates for v4.21

* Fix llcc license, includes, and error checks
* Remove use of memcpy in cmd-db and fix API breakage
* Add QCS404 compatible to SMD-RPM
* Minor fixes for QMI
* Add irq clear handling in QCOM Geni SE during init

* tag 'qcom-drivers-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  drm: msm: Check cmd_db_read_aux_data() for failure
  soc: qcom: smd-rpm: Add QCS404 compatible
  soc: qcom: llcc-slice: Remove duplicated include from llcc-slice.c
  soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data()
  soc: qcom: cmd-db: Remove memcpy()ing from cmd_db_get_header()
  soc: qcom: Drop help text for QCOM_QMI_HELPERS
  soc: qcom: qmi_interface: Limit txn ids to U16_MAX
  soc: qcom: llcc-slice: Add error checks for API functions
  soc: qcom/llcc: add MODULE_LICENSE tag
  soc: qcom: Add irq clear handling during SE init

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-03 13:10:10 -08:00
Olof Johansson e5734bebed This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.21, please pull the following changes:
 
 - James fixes the firmware interface after a commit changed the use of
   VLA and broke large transfers
 
 - Stefan adds a timeout check for Raspberry Pi firmware transactions and
   updates a bunch of SoC/firmware files to use SPDX tags
 
 - Wolfram switches the GISB bus arbiter to use dev_get_drvdata()
 
 - Yangtao provides a fix for a reference leak due to a call to
   of_find_node_by_path()
 
 - Florian fixes the CPU re-entry point out of S3 suspend with kernels
   built in Thumb2 mode
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Merge tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux into next/drivers

This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.21, please pull the following changes:

- James fixes the firmware interface after a commit changed the use of
  VLA and broke large transfers

- Stefan adds a timeout check for Raspberry Pi firmware transactions and
  updates a bunch of SoC/firmware files to use SPDX tags

- Wolfram switches the GISB bus arbiter to use dev_get_drvdata()

- Yangtao provides a fix for a reference leak due to a call to
  of_find_node_by_path()

- Florian fixes the CPU re-entry point out of S3 suspend with kernels
  built in Thumb2 mode

* tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux:
  soc: bcm: brcmstb: Don't leak device tree node reference
  firmware: raspberrypi: Switch to SPDX identifier
  firmware: raspberrypi: Fix firmware calls with large buffers
  soc: bcm: Switch raspberrypi-power to SPDX identifier
  firmware: raspberrypi: Define timeout for transactions
  bus: brcmstb_gisb: simplify getting .driver_data
  soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNEL

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-12-03 13:06:27 -08:00
Houlong Wei 576f1b4bc8 soc: mediatek: Add Mediatek CMDQ helper
Add Mediatek CMDQ helper to create CMDQ packet and assemble GCE op code.

Signed-off-by: Houlong Wei <houlong.wei@mediatek.com>
Signed-off-by: HS Liao <hs.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-12-02 20:46:10 +01:00
Olof Johansson 0277a623dd Driver changes for omaps for v4.21 merge window
Few SoC related driver changes to add PRCM as the wake-up source
 for wkup_m3_ipc driver, and to improve ti-sysc driver for dra7
 mcasp and device detection when debug is enabled.
 
 There is also a non-critical fix for ti-sysc to fix handling of
 the optional clocks but this can wait for the merge window no problem.
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Merge tag 'omap-for-v4.21/driver-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers

Driver changes for omaps for v4.21 merge window

Few SoC related driver changes to add PRCM as the wake-up source
for wkup_m3_ipc driver, and to improve ti-sysc driver for dra7
mcasp and device detection when debug is enabled.

There is also a non-critical fix for ti-sysc to fix handling of
the optional clocks but this can wait for the merge window no problem.

* tag 'omap-for-v4.21/driver-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: wkup_m3: Add PRCM int16 as the wake up source
  bus: ti-sysc: Detect devices for debug on omap5
  bus: ti-sysc: Add mcasp optional clocks flag
  bus: ti-sysc: Fix getting optional clocks in clock_roles

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-30 15:50:23 -08:00
Olof Johansson 0be66f394e Amlogic SoC drivers for v4.21
- new clock measurement driver and bindings
 - COMPILE_TEST fix
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Merge tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers

Amlogic SoC drivers for v4.21
- new clock measurement driver and bindings
- COMPILE_TEST fix

* tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: Add Meson Clock Measure driver
  dt-bindings: amlogic: Add Internal Clock Measurer bindings
  drivers: soc: Allow building the amlogic drivers without ARCH_MESON

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-30 15:47:23 -08:00
Geert Uytterhoeven 2ed29e15e4 ARM: shmobile: R-Mobile: Move pm-rmobile to drivers/soc/renesas/
The pm-rmobile driver is really a driver for the System Controller
(SYSC) found in R-Mobile SoCs.  An equivalent driver for R-Car SoCs is
already located under drivers/soc/renesas/.

Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and rename it to rmobile-sysc.

Enable compile-testing on non-ARM and non-R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:29:11 +01:00
Geert Uytterhoeven 160bfa7c72 soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
power domain hierarchy for the A3VIP[012] power domains.

As the definition for the A3VIP0 domain is not yet used from DT, it can
just be renamed.

Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven 97473bc85b soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp.
A2DP1.

As these definitions are not yet used from DT, they can just be renamed.

Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven b5eb730e03 soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp.
A2CN.

As these definitions are not yet used from DT, they can just be renamed.

While at it, fix the indentation of the A3IR definition.

Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:30 +01:00
Geert Uytterhoeven da3e1c57ca soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the CR7 power domain on R-Car V3M, as this SoC does not have an
ARM Cortex-R7 Realtime Core.

As this definition was never used from DT, it can just be removed.

Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions")
Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:29 +01:00
Geert Uytterhoeven a93913cecb soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
removed the A3IR power domain on R-Car M3-N, as this SoC does not have
an Image Processing Unit (IMP-X5).

The definition in the DT bindings header cannot be removed yet, until
its (incorrect) user has been removed.

Fixes: a527709b78 ("soc: renesas: rcar-sysc: Add R-Car M3-N support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-30 11:22:29 +01:00
Bjorn Andersson b7e386177f soc: qcom: smd-rpm: Add QCS404 compatible
This patch adds a compatible for the rpm on the Qualcomm QCS404 platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-29 00:01:11 -06:00
Neil Armstrong 2b45ebef39 soc: amlogic: Add Meson Clock Measure driver
The Amlogic Meson SoCs embeds a clock measurer IP to measure the internal
clock paths frequencies.
The precision is determined by stepping into the duration until the counter
overflows.
The debugfs slows a pretty summary and each clock can be measured
individually aswell.

Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-28 16:55:35 -08:00
YueHaibing 9095d0f8ea soc: qcom: llcc-slice: Remove duplicated include from llcc-slice.c
Remove duplicated include.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-28 17:37:20 -06:00
Yangtao Li 1861a7f07e soc: bcm: brcmstb: Don't leak device tree node reference
of_find_node_by_path() acquires a reference to the node returned by it
and that reference needs to be dropped by its caller. soc_is_brcmstb()
doesn't do that, so fix it.

[treding: slightly rewrite to avoid inline comparison]

Fixes: d52fad2620 ("soc: add stubs for brcmstb SoC's")
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-11-28 13:46:44 -08:00
Thierry Reding e3e403c218 soc/tegra: pmc: Add initial Tegra194 wake events
Tegra194 supports 96 wake events in total. Many of them are never used,
so only the most common ones (RTC alarm and power key) are currently
defined.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-28 17:32:28 +01:00
Thierry Reding e59333c83f soc/tegra: pmc: Add initial Tegra186 wake events
Tegra186 support 96 wake events in total. Many of them are never used,
so only the most common ones (RTC alarm and power key) are currently
defined.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-28 17:32:20 +01:00
Thierry Reding 19906e6b16 soc/tegra: pmc: Add wake event support
The power management controller has top-level controls that allow
certain interrupts (such as from the RTC or a subset of GPIOs) to
wake the system from sleep. Implement infrastructure to support
these wake events.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-28 17:31:32 +01:00
Thierry Reding eac9c48aac soc/tegra: pmc: Add Tegra194 support
The PMC controller on Tegra194 has a couple of new I/O pads and drops
others compared to Tegra186.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-28 16:45:04 +01:00
Florian Fainelli 34758f8155 This pull request adds SPDX to BCM2835 drivers, and fixes some bugs in
the firmware driver (silently hanging if the VPU doesn't respond to a
 mailbox transaction, and undersized buffers in the firmware property
 transactions for tags that aren't used yet in the upstream).
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Merge tag 'tags/bcm2835-drivers-next-2018-11-27' into drivers/next

This pull request adds SPDX to BCM2835 drivers, and fixes some bugs in
the firmware driver (silently hanging if the VPU doesn't respond to a
mailbox transaction, and undersized buffers in the firmware property
transactions for tags that aren't used yet in the upstream).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-11-27 15:25:25 -08:00
Madalin Bucur 5c664ace8c soc/qman: add return value to interrupt coalesce changing APIs
Check that the values received by the portal interrupt coalesce
change APIs are in range.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-23 11:17:06 -08:00
Madalin Bucur 830b61ba4e soc: fsl: qbman: read ithresh from HW
Read the DQRR interrupt threshold directly from the hardware.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-23 11:17:06 -08:00
Yangtao Li 2a8c9f1203
soc: sunxi: Change to use DEFINE_SHOW_ATTRIBUTE macro
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-22 16:45:12 +01:00
Yangtao Li 57ba33d568 soc/tegra: pmc: Change to use DEFINE_SHOW_ATTRIBUTE macro
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-22 16:12:56 +01:00
Yangtao Li 9eb40fa2cd soc/tegra: Don't leak device tree node reference
of_find_node_by_path() acquires a reference to the node returned by it
and that reference needs to be dropped by its caller. soc_is_tegra()
doesn't do that, so fix it.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
[treding: slightly rewrite to avoid inline comparison]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-22 16:10:04 +01:00
Keerthy 03b10fecb9 soc: ti: wkup_m3: Add PRCM int16 as the wake up source
Add PRCM int16 as the wake up source.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-11-19 10:36:25 -08:00
Geert Uytterhoeven 062887bf5e ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/
For consistency with arm64, where vendors have a single Kconfig symbol
in arch/arm64/Kconfig.platforms.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Geert Uytterhoeven fa43948f67 arm64: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for
Renesas SoCs, while other vendors have only a single Kconfig symbol.

Increase consistency with other vendors by moving the SoC-specific
Kconfig symbols to drivers/soc/renesas/Kconfig.

Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by
introducing a family-specific Kconfig symbol for R-Car Gen3
(ARCH_RCAR_GEN3), which enables family-specific hardware features.
While so far only a single family (R-Car Gen3 and derivatives) of
Renesas arm64 SoCs is supported by Linux, this will make it easier
to add support for other SoC families later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-11-16 07:27:19 -08:00
Maxime Jourdan 41bb5769b7 drivers: soc: Allow building the amlogic drivers without ARCH_MESON
The current condition makes it difficult to compile the amlogic/
drivers with COMPILE_TEST, or without ARCH_MESON in general.

Fixes kbuild errors with patch series that depend on drivers in that
directory, for instance the meson video decoder.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-11-15 12:25:20 -08:00
Stefan Wahren bb661b7088 soc: bcm: Switch raspberrypi-power to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Alexander Aring <aring@mojatatu.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-11-14 21:04:47 +01:00
Stephen Boyd ed3cafa79e soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data()
Let's change the function signature to return the pointer to memory or
an error pointer on failure, and take an argument that lets us return
the size of the aux data read. This way we can remove the
cmd_db_read_aux_data_len() API entirely and also get rid of the memcpy
operation from cmd_db to the caller. Updating the only user of this code
shows that making this change allows us to remove a function and put the
lookup where the user is.

Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Evan Green <evgreen@chromium.org>
Cc: Jordan Crouse <jcrouse@codeaurora.org>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 10:06:24 -08:00
Stephen Boyd 84fa36eb30 soc: qcom: cmd-db: Remove memcpy()ing from cmd_db_get_header()
The cmd_db_get_header() function is a static local function that doesn't
need to copy anything from one place to another. Instead, it can just
point into the region by returning pointers to what we're looking for.
If we do that, we should mark what we're returning as const so that code
can't modify cmd-db without an obvious cast.

Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 10:05:50 -08:00
Niklas Cassel 808e10330b soc: qcom: Drop help text for QCOM_QMI_HELPERS
The help text is visible in menuconfig, however QCOM_QMI_HELPERS is a
hidden kconfig, so it is not selectable in menuconfig.

Remove the help text so that it is more clear that this is intentionally
a hidden kconfig.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 10:03:36 -08:00
Arun Kumar Neelakantam c4fe17e0e3 soc: qcom: qmi_interface: Limit txn ids to U16_MAX
Txn IDs created up to INT_MAX cause overflow while storing
the IDs in u16 type supported by QMI header.

Limit the txn IDs max value to U16_MAX to avoid overflow.

Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 10:02:07 -08:00
Jordan Crouse e0f2cfeb59 soc: qcom: llcc-slice: Add error checks for API functions
llcc_slice_getd can return a ERR_PTR code on failure. Add a IS_ERR_OR_NULL
check to subsequent API calls that use struct llcc_slice_desc to guard
against faults and to let the leaf drivers get away with safely using a
ERR_PTR() encoded "pointer" in the aftermath of a llcc_slice_getd error.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 09:59:03 -08:00
Arnd Bergmann 8c1919a2b4 soc: qcom/llcc: add MODULE_LICENSE tag
The lack of a MODULE_LICENSE tag prevents building the llcc driver
as a loadable module:

FATAL: modpost: GPL-incompatible module llcc-slice.ko uses GPL-only symbol 'ktime_get'

This adds the appropriate license and description tags.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 09:56:36 -08:00
Alok Chauhan 279536a564 soc: qcom: Add irq clear handling during SE init
when the kernel inits a SE, its quite possible we have pending interrupts
from bootloaders which did not handle/clear them. So do this in kernel at
the SE init, to avoid some of it causing bad behavior, while at it also
club all the register writes needed to clear the se irqs into a function
to avoid repeating it over.

Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-14 09:51:50 -08:00
Dmitry Osipenko b6e1fd17a3 soc/tegra: pmc: Drop locking from tegra_powergate_is_powered()
This fixes splats like the one below if CONFIG_DEBUG_ATOMIC_SLEEP=y
and machine (Tegra30) booted with SMP=n or all secondary CPU's are put
offline. Locking isn't needed because it protects atomic operation.

BUG: sleeping function called from invalid context at kernel/locking/mutex.c:254
in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G         C        4.18.0-next-20180821-00180-gc3ebb6544e44-dirty #823
Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
[<c01134f4>] (unwind_backtrace) from [<c010db2c>] (show_stack+0x20/0x24)
[<c010db2c>] (show_stack) from [<c0bd0f3c>] (dump_stack+0x94/0xa8)
[<c0bd0f3c>] (dump_stack) from [<c0151df8>] (___might_sleep+0x13c/0x174)
[<c0151df8>] (___might_sleep) from [<c0151ea0>] (__might_sleep+0x70/0xa8)
[<c0151ea0>] (__might_sleep) from [<c0bec2b8>] (mutex_lock+0x2c/0x70)
[<c0bec2b8>] (mutex_lock) from [<c0589844>] (tegra_powergate_is_powered+0x44/0xa8)
[<c0589844>] (tegra_powergate_is_powered) from [<c0581a60>] (tegra30_cpu_rail_off_ready+0x30/0x74)
[<c0581a60>] (tegra30_cpu_rail_off_ready) from [<c0122244>] (tegra30_idle_lp2+0xa0/0x108)
[<c0122244>] (tegra30_idle_lp2) from [<c0853438>] (cpuidle_enter_state+0x140/0x540)
[<c0853438>] (cpuidle_enter_state) from [<c08538a4>] (cpuidle_enter+0x40/0x4c)
[<c08538a4>] (cpuidle_enter) from [<c01595e0>] (call_cpuidle+0x30/0x48)
[<c01595e0>] (call_cpuidle) from [<c01599f8>] (do_idle+0x238/0x28c)
[<c01599f8>] (do_idle) from [<c0159d28>] (cpu_startup_entry+0x28/0x2c)
[<c0159d28>] (cpu_startup_entry) from [<c0be76c8>] (rest_init+0xd8/0xdc)
[<c0be76c8>] (rest_init) from [<c1200f50>] (start_kernel+0x41c/0x430)

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-08 12:51:18 +01:00
Sandipan Patra 5f84bb1a40 soc/tegra: pmc: Add sysfs entries for reset info
Implement read-only reset_reason and reset_level sysfs attributes that
can be used to query the reset reason and level at runtime.

Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-08 12:51:18 +01:00
Jon Hunter 3bb2f843c0 soc/tegra: pmc: Don't power-up XUSB power-domains
Now that the Tegra xHCI driver manages the XUSB power-domains itself,
remove the code to power-up the power-domains used by the xHCI device
from the PMC driver on boot.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-11-08 12:51:17 +01:00
Heiko Stuebner 24869610e8 soc: rockchip: power-domain: add rk3066 powerdomains
Add power-domains found on rk3066 socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-06 14:13:32 +01:00
Florian Fainelli fb14ada11d soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNEL
When the kernel is built with CONFIG_THUMB2_KERNEL we would set the
kernel's resume entry point to be a function that is already built as
Thumb-2 code while the boot agent doing the resume is in ARM mode, so
this does not work. There is a header label defined: cpu_resume_arm
which we can use to do the switching for us.

Fixes: 0b741b8234 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-11-05 10:41:25 -08:00
Heiko Stuebner a0d5e7d499 soc: rockchip: power-domain: add rk3188 powerdomains
Add power-domains found on rk3188 socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-11-05 09:40:03 +01:00
Marc Zyngier 832ad0e3da soc: ti: QMSS: Fix usage of irq_set_affinity_hint
The Keystone QMSS driver is pretty damaged, in the sense that it
does things like this:

	irq_set_affinity_hint(irq, to_cpumask(&cpu_map));

where cpu_map is a local variable. As we leave the function, this
will point to nowhere-land, and things will end-up badly.

Instead, let's use a proper cpumask that gets allocated, giving
the driver a chance to actually work with things like irqbalance
as well as have a hypothetical 64bit future.

Cc: stable@vger.kernel.org
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-11-02 11:22:09 -07:00
Linus Torvalds b22b6beae6 ARM: SoC driver updates for 4.17
The most noteworthy SoC driver changes this time include:
 
 - The TEE subsystem gains an in-kernel interface to access the TEE
   from device drivers.
 
 - The reset controller subsystem gains a driver for the Qualcomm
   Snapdragon 845 Power Domain Controller.
 
 - The Xilinx Zynq platform now has a firmware interface for its
   platform management unit. This contains a firmware "ioctl" interface
   that was a little controversial at first, but the version we merged
   solved that by not exposing arbitrary firmware calls to user space.
 
 - The Amlogic Meson platform gains a "canvas" driver that is used
   for video processing and shared between different high-level drivers.
 
 The rest is more of the usual, mostly related to SoC specific power
 management support and core drivers in drivers/soc:
 
 - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
   features related to power and reset control.
 
 - The Mediatek mt8183 and mt6765 SoC platforms gain support for
   their respective power management chips.
 
 - A new driver for NXP i.MX8, which need a firmware interface for
   power management.
 
 - The SCPI firmware interface now contains support estimating power
   usage of performance states
 
 - The NVIDIA Tegra "pmc" driver gains a few new features, in particular
   a pinctrl interface for configuring the pads.
 
 - Lots of small changes for Qualcomm, in particular the "smem"
   device driver.
 
 - Some cleanups for the TI OMAP series related to their sysc
   controller.
 
 Additional cleanups and bugfixes in SoC specific drivers include the
 Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "The most noteworthy SoC driver changes this time include:

   - The TEE subsystem gains an in-kernel interface to access the TEE
     from device drivers.

   - The reset controller subsystem gains a driver for the Qualcomm
     Snapdragon 845 Power Domain Controller.

   - The Xilinx Zynq platform now has a firmware interface for its
     platform management unit. This contains a firmware "ioctl"
     interface that was a little controversial at first, but the version
     we merged solved that by not exposing arbitrary firmware calls to
     user space.

   - The Amlogic Meson platform gains a "canvas" driver that is used for
     video processing and shared between different high-level drivers.

  The rest is more of the usual, mostly related to SoC specific power
  management support and core drivers in drivers/soc:

   - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
     features related to power and reset control.

   - The Mediatek mt8183 and mt6765 SoC platforms gain support for their
     respective power management chips.

   - A new driver for NXP i.MX8, which need a firmware interface for
     power management.

   - The SCPI firmware interface now contains support estimating power
     usage of performance states

   - The NVIDIA Tegra "pmc" driver gains a few new features, in
     particular a pinctrl interface for configuring the pads.

   - Lots of small changes for Qualcomm, in particular the "smem" device
     driver.

   - Some cleanups for the TI OMAP series related to their sysc
     controller.

  Additional cleanups and bugfixes in SoC specific drivers include the
  Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
  firmware: tegra: bpmp: Implement suspend/resume support
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs
  MAINTAINERS: imx: include drivers/firmware/imx path
  firmware: imx: add misc svc support
  firmware: imx: add SCU firmware driver support
  reset: Fix potential use-after-free in __of_reset_control_get()
  dt-bindings: arm: fsl: add scu binding doc
  soc: fsl: qbman: add interrupt coalesce changing APIs
  soc: fsl: bman_portals: defer probe after bman's probe
  soc: fsl: qbman: Use last response to determine valid bit
  soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
  soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
  soc: fsl: qbman: Check if CPU is offline when initializing portals
  reset: qcom: PDC Global (Power Domain Controller) reset controller
  dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
  reset: Grammar s/more then once/more than once/
  bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
  ...
2018-10-29 15:16:01 -07:00
Linus Torvalds 685f7e4f16 powerpc updates for 4.20
Notable changes:
 
  - A large series to rewrite our SLB miss handling, replacing a lot of fairly
    complicated asm with much fewer lines of C.
 
  - Following on from that, we now maintain a cache of SLB entries for each
    process and preload them on context switch. Leading to a 27% speedup for our
    context switch benchmark on Power9.
 
  - Improvements to our handling of SLB multi-hit errors. We now print more debug
    information when they occur, and try to continue running by flushing the SLB
    and reloading, rather than treating them as fatal.
 
  - Enable THP migration on 64-bit Book3S machines (eg. Power7/8/9).
 
  - Add support for physical memory up to 2PB in the linear mapping on 64-bit
    Book3S. We only support up to 512TB as regular system memory, otherwise the
    percpu allocator runs out of vmalloc space.
 
  - Add stack protector support for 32 and 64-bit, with a per-task canary.
 
  - Add support for PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP.
 
  - Support recognising "big cores" on Power9, where two SMT4 cores are presented
    to us as a single SMT8 core.
 
  - A large series to cleanup some of our ioremap handling and PTE flags.
 
  - Add a driver for the PAPR SCM (storage class memory) interface, allowing
    guests to operate on SCM devices (acked by Dan).
 
  - Changes to our ftrace code to handle very large kernels, where we need to use
    a trampoline to get to ftrace_caller().
 
 Many other smaller enhancements and cleanups.
 
 Thanks to:
   Alan Modra, Alistair Popple, Aneesh Kumar K.V, Anton Blanchard, Aravinda
   Prasad, Bartlomiej Zolnierkiewicz, Benjamin Herrenschmidt, Breno Leitao,
   Cédric Le Goater, Christophe Leroy, Christophe Lombard, Dan Carpenter, Daniel
   Axtens, Finn Thain, Gautham R. Shenoy, Gustavo Romero, Haren Myneni, Hari
   Bathini, Jia Hongtao, Joel Stanley, John Allen, Laurent Dufour, Madhavan
   Srinivasan, Mahesh Salgaonkar, Mark Hairgrove, Masahiro Yamada, Michael
   Bringmann, Michael Neuling, Michal Suchanek, Murilo Opsfelder Araujo, Nathan
   Fontenot, Naveen N. Rao, Nicholas Piggin, Nick Desaulniers, Oliver O'Halloran,
   Paul Mackerras, Petr Vorel, Rashmica Gupta, Reza Arbab, Rob Herring, Sam
   Bobroff, Samuel Mendoza-Jonas, Scott Wood, Stan Johnson, Stephen Rothwell,
   Stewart Smith, Suraj Jitindar Singh, Tyrel Datwyler, Vaibhav Jain, Vasant
   Hegde, YueHaibing, zhong jiang,
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Merge tag 'powerpc-4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc updates from Michael Ellerman:
 "Notable changes:

   - A large series to rewrite our SLB miss handling, replacing a lot of
     fairly complicated asm with much fewer lines of C.

   - Following on from that, we now maintain a cache of SLB entries for
     each process and preload them on context switch. Leading to a 27%
     speedup for our context switch benchmark on Power9.

   - Improvements to our handling of SLB multi-hit errors. We now print
     more debug information when they occur, and try to continue running
     by flushing the SLB and reloading, rather than treating them as
     fatal.

   - Enable THP migration on 64-bit Book3S machines (eg. Power7/8/9).

   - Add support for physical memory up to 2PB in the linear mapping on
     64-bit Book3S. We only support up to 512TB as regular system
     memory, otherwise the percpu allocator runs out of vmalloc space.

   - Add stack protector support for 32 and 64-bit, with a per-task
     canary.

   - Add support for PTRACE_SYSEMU and PTRACE_SYSEMU_SINGLESTEP.

   - Support recognising "big cores" on Power9, where two SMT4 cores are
     presented to us as a single SMT8 core.

   - A large series to cleanup some of our ioremap handling and PTE
     flags.

   - Add a driver for the PAPR SCM (storage class memory) interface,
     allowing guests to operate on SCM devices (acked by Dan).

   - Changes to our ftrace code to handle very large kernels, where we
     need to use a trampoline to get to ftrace_caller().

  And many other smaller enhancements and cleanups.

  Thanks to: Alan Modra, Alistair Popple, Aneesh Kumar K.V, Anton
  Blanchard, Aravinda Prasad, Bartlomiej Zolnierkiewicz, Benjamin
  Herrenschmidt, Breno Leitao, Cédric Le Goater, Christophe Leroy,
  Christophe Lombard, Dan Carpenter, Daniel Axtens, Finn Thain, Gautham
  R. Shenoy, Gustavo Romero, Haren Myneni, Hari Bathini, Jia Hongtao,
  Joel Stanley, John Allen, Laurent Dufour, Madhavan Srinivasan, Mahesh
  Salgaonkar, Mark Hairgrove, Masahiro Yamada, Michael Bringmann,
  Michael Neuling, Michal Suchanek, Murilo Opsfelder Araujo, Nathan
  Fontenot, Naveen N. Rao, Nicholas Piggin, Nick Desaulniers, Oliver
  O'Halloran, Paul Mackerras, Petr Vorel, Rashmica Gupta, Reza Arbab,
  Rob Herring, Sam Bobroff, Samuel Mendoza-Jonas, Scott Wood, Stan
  Johnson, Stephen Rothwell, Stewart Smith, Suraj Jitindar Singh, Tyrel
  Datwyler, Vaibhav Jain, Vasant Hegde, YueHaibing, zhong jiang"

* tag 'powerpc-4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (221 commits)
  Revert "selftests/powerpc: Fix out-of-tree build errors"
  powerpc/msi: Fix compile error on mpc83xx
  powerpc: Fix stack protector crashes on CPU hotplug
  powerpc/traps: restore recoverability of machine_check interrupts
  powerpc/64/module: REL32 relocation range check
  powerpc/64s/radix: Fix radix__flush_tlb_collapsed_pmd double flushing pmd
  selftests/powerpc: Add a test of wild bctr
  powerpc/mm: Fix page table dump to work on Radix
  powerpc/mm/radix: Display if mappings are exec or not
  powerpc/mm/radix: Simplify split mapping logic
  powerpc/mm/radix: Remove the retry in the split mapping logic
  powerpc/mm/radix: Fix small page at boundary when splitting
  powerpc/mm/radix: Fix overuse of small pages in splitting logic
  powerpc/mm/radix: Fix off-by-one in split mapping logic
  powerpc/ftrace: Handle large kernel configs
  powerpc/mm: Fix WARN_ON with THP NUMA migration
  selftests/powerpc: Fix out-of-tree build errors
  powerpc/time: no steal_time when CONFIG_PPC_SPLPAR is not selected
  powerpc/time: Only set CONFIG_ARCH_HAS_SCALED_CPUTIME on PPC64
  powerpc/time: isolate scaled cputime accounting in dedicated functions.
  ...
2018-10-26 14:36:21 -07:00
Linus Torvalds b27186abb3 Devicetree updates for 4.20:
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
 
 - Work to get rid of direct accesses to struct device_node name and
   type pointers in preparation for removing them. New helpers for
   parsing DT cpu nodes and conversions to use the helpers. printk
   conversions to %pOFn for printing DT node names. Most went thru
   subystem trees, so this is the remainder.
 
 - Fixes to DT child node lookups to actually be restricted to child
   nodes instead of treewide.
 
 - Refactoring of dtb targets out of arch code. This makes the support
   more uniform and enables building all dtbs on c6x, microblaze, and
   powerpc.
 
 - Various DT binding updates for Renesas r8a7744 SoC
 
 - Vendor prefixes for Facebook, OLPC
 
 - Restructuring of some ARM binding docs moving some peripheral bindings
   out of board/SoC binding files
 
 - New "secure-chosen" binding for secure world settings on ARM
 
 - Dual licensing of 2 DT IRQ binding headers
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Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull Devicetree updates from Rob Herring:
 "A bit bigger than normal as I've been busy this cycle.

  There's a few things with dependencies and a few things subsystem
  maintainers didn't pick up, so I'm taking them thru my tree.

  The fixes from Johan didn't get into linux-next, but they've been
  waiting for some time now and they are what's left of what subsystem
  maintainers didn't pick up.

  Summary:

   - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4

   - Work to get rid of direct accesses to struct device_node name and
     type pointers in preparation for removing them. New helpers for
     parsing DT cpu nodes and conversions to use the helpers. printk
     conversions to %pOFn for printing DT node names. Most went thru
     subystem trees, so this is the remainder.

   - Fixes to DT child node lookups to actually be restricted to child
     nodes instead of treewide.

   - Refactoring of dtb targets out of arch code. This makes the support
     more uniform and enables building all dtbs on c6x, microblaze, and
     powerpc.

   - Various DT binding updates for Renesas r8a7744 SoC

   - Vendor prefixes for Facebook, OLPC

   - Restructuring of some ARM binding docs moving some peripheral
     bindings out of board/SoC binding files

   - New "secure-chosen" binding for secure world settings on ARM

   - Dual licensing of 2 DT IRQ binding headers"

* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  ARM: dt: relicense two DT binding IRQ headers
  power: supply: twl4030-charger: fix OF sibling-node lookup
  NFC: nfcmrvl_uart: fix OF child-node lookup
  net: stmmac: dwmac-sun8i: fix OF child-node lookup
  net: bcmgenet: fix OF child-node lookup
  drm/msm: fix OF child-node lookup
  drm/mediatek: fix OF sibling-node lookup
  of: Add missing exports of node name compare functions
  dt-bindings: Add OLPC vendor prefix
  dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
  dt-bindings: thermal: samsung: Add SPDX license identifier
  dt-bindings: clock: samsung: Add SPDX license identifiers
  dt-bindings: timer: ostm: Add R7S9210 support
  dt-bindings: phy: rcar-gen2: Add r8a7744 support
  dt-bindings: can: rcar_can: Add r8a7744 support
  dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
  dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
  dt-bindings: thermal: rcar: Add device tree support for r8a7744
  Documentation: dt: Add binding for /secure-chosen/stdout-path
  dt-bindings: arm: zte: Move sysctrl bindings to their own doc
  ...
2018-10-26 12:09:58 -07:00
Linus Torvalds 62606c224d Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu:
 "API:
   - Remove VLA usage
   - Add cryptostat user-space interface
   - Add notifier for new crypto algorithms

  Algorithms:
   - Add OFB mode
   - Remove speck

  Drivers:
   - Remove x86/sha*-mb as they are buggy
   - Remove pcbc(aes) from x86/aesni
   - Improve performance of arm/ghash-ce by up to 85%
   - Implement CTS-CBC in arm64/aes-blk, faster by up to 50%
   - Remove PMULL based arm64/crc32 driver
   - Use PMULL in arm64/crct10dif
   - Add aes-ctr support in s5p-sss
   - Add caam/qi2 driver

  Others:
   - Pick better transform if one becomes available in crc-t10dif"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (124 commits)
  crypto: chelsio - Update ntx queue received from cxgb4
  crypto: ccree - avoid implicit enum conversion
  crypto: caam - add SPDX license identifier to all files
  crypto: caam/qi - simplify CGR allocation, freeing
  crypto: mxs-dcp - make symbols 'sha1_null_hash' and 'sha256_null_hash' static
  crypto: arm64/aes-blk - ensure XTS mask is always loaded
  crypto: testmgr - fix sizeof() on COMP_BUF_SIZE
  crypto: chtls - remove set but not used variable 'csk'
  crypto: axis - fix platform_no_drv_owner.cocci warnings
  crypto: x86/aes-ni - fix build error following fpu template removal
  crypto: arm64/aes - fix handling sub-block CTS-CBC inputs
  crypto: caam/qi2 - avoid double export
  crypto: mxs-dcp - Fix AES issues
  crypto: mxs-dcp - Fix SHA null hashes and output length
  crypto: mxs-dcp - Implement sha import/export
  crypto: aegis/generic - fix for big endian systems
  crypto: morus/generic - fix for big endian systems
  crypto: lrw - fix rebase error after out of bounds fix
  crypto: cavium/nitrox - use pci_alloc_irq_vectors() while enabling MSI-X.
  crypto: cavium/nitrox - NITROX command queue changes.
  ...
2018-10-25 16:43:35 -07:00
Linus Torvalds a978a5b8d8 net/kconfig: Make QCOM_QMI_HELPERS available when COMPILE_TEST
The networking merge brought in the experimental support for the
Qualcomm ath10k system NOC, which selects QCOM_QMI_HELPERS as a
dependency.

But the ATH10K_SNOC option (which selects QCOM_QMI_HELPERS) depends on
ARCH_QCOM || COMPILE_TEST in order to get wider build testing than just
the unusual QCOM architecture build, while the QCOM_QMI_HELPERS option
doesn't have that COMPILE_TEST option and is limited to only ARCH_QCOM.

As a result, a "make allmodconfig" complains

  WARNING: unmet direct dependencies detected for QCOM_QMI_HELPERS
    Depends on [n]: ARCH_QCOM && NET [=y]
    Selected by [m]:
    - ATH10K_SNOC [=m] && NETDEVICES [=y] && WLAN [=y] && WLAN_VENDOR_ATH [=y] && ATH10K [=m] && (ARCH_QCOM || COMPILE_TEST [=y])

Fix the config-time warning by making QCOM_QMI_HELPERS available when
COMPILE_TEST, since the result seems to build fine.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Govind Singh <govinds@codeaurora.org>
Cc: Kalle Valo <kvalo@codeaurora.org>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-10-24 08:11:35 +01:00
Mark Brown 4b51c747e4
Merge branch 'spi-4.20' into spi-next 2018-10-21 17:00:14 +01:00
Christophe Leroy 402a5698b4 soc/fsl/qbman: use ioremap_cache() instead of ioremap_prot(0)
ioremap_prot() with flag set to 0 relies on a hack in
__ioremap_caller() which adds PAGE_KERNEL flags when the
handed flags don't look like a valid set of flags
(ie don't include _PAGE_PRESENT)

The intention being to map cached memory, use ioremap_cache() instead.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-10-14 18:04:09 +11:00
Arnd Bergmann 75bda3609f NXP/FSL SoC drivers updates for v4.20 take 2
- Update qbman driver to better work with CPU hotplug
 - Add Kconfig dependency of 64-bit DMA addressing for qbman driver
 - Use last reponse to determine valid bit for qbman driver
 - Defer bman_portals probe if bman is not probed
 - Add interrupt coalescing APIs to qbman driver
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Merge tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers

NXP/FSL SoC drivers updates for v4.20 take 2

- Update qbman driver to better work with CPU hotplug
- Add Kconfig dependency of 64-bit DMA addressing for qbman driver
- Use last reponse to determine valid bit for qbman driver
- Defer bman_portals probe if bman is not probed
- Add interrupt coalescing APIs to qbman driver

* tag 'soc-fsl-next-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: qbman: add interrupt coalesce changing APIs
  soc: fsl: bman_portals: defer probe after bman's probe
  soc: fsl: qbman: Use last response to determine valid bit
  soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
  soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
  soc: fsl: qbman: Check if CPU is offline when initializing portals
  soc: fsl: qman_portals: defer probe after qman's probe
  soc: fsl: qbman: add APIs to retrieve the probing status
  soc: fsl: qe: Fix copy/paste bug in ucc_get_tdm_sync_shift()
  soc: fsl: qbman: qman: avoid allocating from non existing gen_pool

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-08 14:44:40 +02:00
Madalin Bucur 6d06009cb2 soc: fsl: qbman: add interrupt coalesce changing APIs
Add the APIs required to control the QMan portal interrupt coalescing
settings.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-05 14:06:56 -05:00
Laurentiu Tudor e0940b34c4 soc: fsl: bman_portals: defer probe after bman's probe
A crash in bman portal probing could not be triggered (as is the case
with qman portals) but it does make calls [1] into the bman driver so
lets make sure the bman portal probing happens after bman's.

[1]  bman_p_irqsource_add() (in bman) called by:
       init_pcfg() called by:
         bman_portal_probe()

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-05 14:01:46 -05:00
Roy Pledge f1c98ee699 soc: fsl: qbman: Use last response to determine valid bit
Use the last valid response when determining what valid bit
to use next for management commands. This is needed in the
case that the portal was previously used by other software
like a bootloader or if the kernel is restarted without a
hardware reset.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-05 14:01:46 -05:00
Roy Pledge 06cc59386c soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
The QBMan block is memory mapped on SoCs above a 32 bit (4 Gigabyte)
boundary so enabling 64 bit DMA addressing is needed for QBMan to
be usuable.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-05 14:01:46 -05:00
Madalin Bucur d8bac81ed1 soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
The existing code sets portal IRQ affinity to CPU 0 in the
offline hotplug handler. If CPU 0 is offline this is invalid.
Use a different online CPU instead.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-05 14:01:46 -05:00
Roy Pledge 9beaf661d6 soc: fsl: qbman: Check if CPU is offline when initializing portals
If the CPU to affine the portal interrupt is offline at boot time
affine the portal interrupt to another online CPU. If the CPU is later
brought online the hotplug handler will correctly adjust the affinity.
Moved common code in a function.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-05 14:01:46 -05:00
Li Yang 56740a7167 NXP/FSL SoC driver fixes for v4.19 round 2
- Fix crash of qman_portal by deferring its probe if qman is not probed
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Merge tag 'soc-fsl-fix-v4.19-2' into HEAD

NXP/FSL SoC driver fixes for v4.19 round 2

- Fix crash of qman_portal by deferring its probe if qman is not probed
2018-10-05 13:58:35 -05:00
Rob Herring dc37a25252 soc: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Cc: Li Yang <leoyang.li@nxp.com>
Cc: David Brown <david.brown@linaro.org>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-soc@vger.kernel.org
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Qiang Zhao <qiang.zhao@nxp.com>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-10-04 14:16:01 -05:00
Arnd Bergmann 9620135fe1 i.MX drivers update for 4.20:
- A couple of patches from Anson to update variable and macro naming
    in GPCv2 driver, as a preparation of reusing the driver on i.MX8.
  - Switch GPC/GPCv2 drivers to use SPDX identifier for licence claiming.
  - Clean up the unnecessary DT node name NULL pointer checking from
    imx-weim driver, since it can never be NULL at all.
  - A couple of improvements on GPC driver from Sven Schmitt to correct
    PDN register and use GPC_PGC_DOMAIN_* indexes for consistency.
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Merge tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

i.MX drivers update for 4.20:
 - A couple of patches from Anson to update variable and macro naming
   in GPCv2 driver, as a preparation of reusing the driver on i.MX8.
 - Switch GPC/GPCv2 drivers to use SPDX identifier for licence claiming.
 - Clean up the unnecessary DT node name NULL pointer checking from
   imx-weim driver, since it can never be NULL at all.
 - A couple of improvements on GPC driver from Sven Schmitt to correct
   PDN register and use GPC_PGC_DOMAIN_* indexes for consistency.

* tag 'imx-drivers-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpcv2: Switch to SPDX identifier
  soc: imx: gpc: Switch to SPDX identifier
  bus: imx-weim: drop unnecessary DT node name NULL check
  soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
  soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platforms
  soc: imx: gpc: use GPC_PGC_DOMAIN_* indexes
  soc: imx: gpc: fix PDN delay

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 10:15:17 +02:00
Arnd Bergmann 64d20b774f Qualcomm ARM Based Driver Updates for v4.20
* Refactor of SCM compatibles and clock requirements
 * SMEM cleanup
 * Add LLCC EDAC driver
 * Fixes for GENI clocks and macros
 * Fix includes for llcc-slice and smem
 * String overflow fixes for APR and wcnss_ctrl
 * Fixup for COMPILE_TEST of qcom driver Kconfigs
 * Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p
 * Add SCM dependencies to SPM and rmtfs-mem
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Merge tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Qualcomm ARM Based Driver Updates for v4.20

* Refactor of SCM compatibles and clock requirements
* SMEM cleanup
* Add LLCC EDAC driver
* Fixes for GENI clocks and macros
* Fix includes for llcc-slice and smem
* String overflow fixes for APR and wcnss_ctrl
* Fixup for COMPILE_TEST of qcom driver Kconfigs
* Cleanup of Kconfig depends of rpmh, smd_rpm, smsm, and smp2p
* Add SCM dependencies to SPM and rmtfs-mem

* tag 'qcom-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (38 commits)
  soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples
  soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()
  soc: qcom: geni: Make version macros simpler
  dt-bindings: firmware: scm: Add MSM8998 and SDM845
  firmware: qcom: scm: Refactor clock handling
  dt-bindings: firmware: scm: Refactor compatibles and clocks
  soc: qcom: smem: a few last cleanups
  soc: qcom: smem: verify partition host ids match
  soc: qcom: smem: small change in global entry loop
  soc: qcom: smem: verify partition offset_free_uncached
  soc: qcom: smem: verify partition header size
  soc: qcom: smem: introduce qcom_smem_partition_header()
  soc: qcom: smem: require order of host ids to match
  soc: qcom: smem: verify both host ids in partition header
  soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions()
  soc: qcom: smem: always ignore partitions with 0 offset or size
  soc: qcom: smem: initialize region struct only when successful
  soc: qcom: smem: rename variable in qcom_smem_get_global()
  drivers: qcom: rpmh-rsc: clear wait_for_compl after use
  soc: qcom: rmtfs-mem: Validate that scm is available
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 10:11:12 +02:00
Arnd Bergmann 68b679b339 Actions Semi SoC drivers for v4.20 #2
The SPS power domain driver is extended for S900 SoC.
 This required merging a topic branch for the new bindings header.
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Merge tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers

Actions Semi SoC drivers for v4.20 #2

The SPS power domain driver is extended for S900 SoC.
This required merging a topic branch for the new bindings header.

* tag 'actions-drivers+s900-sps-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  soc: actions: sps: Add S900 power domains
  dt-bindings: power: Add Actions Semi S900 SPS
  soc: actions: Update SPS help text for S700
  soc: actions: Convert to SPDX license identifiers

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 10:02:59 +02:00
Arnd Bergmann d69f0d53e9 PMIC wrapper:
- sort SoCs and PMICs ascending
 - add capabilities
 - add support for mt8183 SoC + mt6358 PMIC
 - return false instead of 0
 - add support for mt6765 SoC + mt6357 PMIC
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Merge tag 'v4.19-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers

PMIC wrapper:
- sort SoCs and PMICs ascending
- add capabilities
- add support for mt8183 SoC + mt6358 PMIC
- return false instead of 0
- add support for mt6765 SoC + mt6357 PMIC

* tag 'v4.19-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pwrap: add mt6357 driver for mt6765 SoCs
  soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs
  dt-bindings: pwrap: mediatek: add pwrap support for MT6765
  soc: mediatek: pwrap: use true and false for boolean values
  soc: mediatek: add mt8183 pwrap support
  soc: mediatek: pwrap: use group of bits for pwrap capability
  soc: mediatek: pwrap: order SoCs and PMICs ascending
  dt-bindings: mediatek: add compatible for mt8183 pwrap

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 10:00:46 +02:00
Arnd Bergmann 227db588a8 Allwinner drivers changes for 4.20
The H6 is now supported in our SRAM driver bindings, and we have a small
 Makefile change for the SRAM driver to build it without building the
 ARCH_SUNXI architecture, especially relevant for the COMPILE_TEST case.
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Merge tag 'sunxi-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers

Allwinner drivers changes for 4.20

The H6 is now supported in our SRAM driver bindings, and we have a small
Makefile change for the SRAM driver to build it without building the
ARCH_SUNXI architecture, especially relevant for the COMPILE_TEST case.

* tag 'sunxi-drivers-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  dt-bindings: sunxi-sram: add binding for Allwinner H6 SRAM C
  drivers: soc: Allow building the sunxi driver without ARCH_SUNXI

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-10-02 09:59:32 +02:00
Laurentiu Tudor 5a1eb8b954 soc: fsl: qman_portals: defer probe after qman's probe
Defer probe of qman portals after qman probing. This fixes the crash
below, seen on NXP LS1043A SoCs:

Unable to handle kernel NULL pointer dereference at virtual address
0000000000000004
Mem abort info:
  ESR = 0x96000004
  Exception class = DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000004
  CM = 0, WnR = 0
[0000000000000004] user address but active_mm is swapper
Internal error: Oops: 96000004 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
4.18.0-rc1-next-20180622-00200-g986f5c179185 #9
Hardware name: LS1043A RDB Board (DT)
pstate: 80000005 (Nzcv daif -PAN -UAO)
pc : qman_set_sdest+0x74/0xa0
lr : qman_portal_probe+0x22c/0x470
sp : ffff00000803bbc0
x29: ffff00000803bbc0 x28: 0000000000000000
x27: ffff0000090c1b88 x26: ffff00000927cb68
x25: ffff00000927c000 x24: ffff00000927cb60
x23: 0000000000000000 x22: 0000000000000000
x21: ffff0000090e9000 x20: ffff800073b5c810
x19: ffff800027401298 x18: ffffffffffffffff
x17: 0000000000000001 x16: 0000000000000000
x15: ffff0000090e96c8 x14: ffff80002740138a
x13: ffff0000090f2000 x12: 0000000000000030
x11: ffff000008f25000 x10: 0000000000000000
x9 : ffff80007bdfd2c0 x8 : 0000000000004000
x7 : ffff80007393cc18 x6 : 0040000000000001
x5 : 0000000000000000 x4 : ffffffffffffffff
x3 : 0000000000000004 x2 : ffff00000927c900
x1 : 0000000000000000 x0 : 0000000000000004
Process swapper/0 (pid: 1, stack limit = 0x(____ptrval____))
Call trace:
 qman_set_sdest+0x74/0xa0
 platform_drv_probe+0x50/0xa8
 driver_probe_device+0x214/0x2f8
 __driver_attach+0xd8/0xe0
 bus_for_each_dev+0x68/0xc8
 driver_attach+0x20/0x28
 bus_add_driver+0x108/0x228
 driver_register+0x60/0x110
 __platform_driver_register+0x40/0x48
 qman_portal_driver_init+0x20/0x84
 do_one_initcall+0x58/0x168
 kernel_init_freeable+0x184/0x22c
 kernel_init+0x10/0x108
 ret_from_fork+0x10/0x18
Code: f9400443 11001000 927e4800 8b000063 (b9400063)
---[ end trace 4f6d50489ecfb930 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-10-01 17:47:43 -05:00
Fabio Estevam 8d8e3b7d8f soc: imx: gpcv2: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-10-01 13:24:15 +08:00
Fabio Estevam 2fe761d18a soc: imx: gpc: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-10-01 13:24:15 +08:00
Anson Huang 73f59712a1 soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms
i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
can reuse gpcv2 pgc driver for power domain control, this
patch renames all functions and structure definitions started
with "imx7" to "imx", and use .data in imx_gpcv2_dt_ids[] to
pass platform specific power domain data for power domain
driver, thus make gpcv2 pgc driver more generic for i.MX
platforms.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-10-01 13:24:14 +08:00
Anson Huang fea88b2b80 soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platforms
gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
cores, so let's use A_CORE instread of A7 to avoid confusion.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-10-01 13:24:05 +08:00
Manivannan Sadhasivam da8c37e13d soc: actions: sps: Add S900 power domains
Add power domains for Actions Semi S900 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[AF: Update Kconfig help text]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2018-09-30 16:48:10 +02:00
Arnd Bergmann 86e762d967 Renesas ARM Based SoC Drivers Updates for v4.20
* Convert to SPDX identifiers
 * R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings
 * RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs:
   - Document APMU and SMP enable method
 * RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs:
   - Add reset support
   - Add sysc support
 * RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs:
   - Add support for identifying SoC
 * RZ/A2M (r7s9210) SoC:
   - Add basic SoC setup support
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Merge tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Drivers Updates for v4.20

* Convert to SPDX identifiers
* R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings
* RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs:
  - Document APMU and SMP enable method
* RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs:
  - Add reset support
  - Add sysc support
* RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs:
  - Add support for identifying SoC
* RZ/A2M (r7s9210) SoC:
  - Add basic SoC setup support

* tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (21 commits)
  dt-bindings: apmu: Document r8a7744 support
  dt-bindings: timer: renesas: tmu: document R8A779{7|8}0 bindings
  dt-bindings: apmu: Document r8a77470 support
  soc: renesas: rcar-rst: Add support for RZ/G1N
  dt-bindings: reset: rcar-rst: Document r8a7744 reset module
  soc: renesas: rcar-sysc: Add r8a7744 support
  dt-bindings: power: rcar-sysc: Add r8a7744 power domain index macros
  dt-bindings: power: rcar-sysc: Document r8a7744 SYSC binding
  soc: renesas: rcar-rst: Add support for RZ/G2E
  dt-bindings: reset: rcar-rst: Document r8a774c0 rst
  soc: renesas: rcar-sysc: Add r8a774c0 support
  dt-bindings: power: rcar-sysc: Document r8a774c0 sysc
  dt-bindings: power: Add r8a774c0 SYSC power domain definitions
  soc: renesas: Identify RZ/G2E
  soc: renesas: convert to SPDX identifiers
  soc: renesas: rcar-rst: Add support for RZ/G2M
  soc: renesas: rcar-sysc: Add r8a774a1 support
  dt-bindings: power: Add r8a774a1 SYSC power domain definitions
  soc: renesas: identify RZ/A2
  ARM: shmobile: Add basic RZ/A2 SoC support
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-28 22:16:58 +02:00
Arnd Bergmann ab2dc8446a soc/tegra: Changes for v4.20-rc1
This contains a pinctrl implementation for the pad configuration that
 can be controlled from the PMC.
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Merge tag 'tegra-for-4.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

soc/tegra: Changes for v4.20-rc1

This contains a pinctrl implementation for the pad configuration that
can be controlled from the PMC.

* tag 'tegra-for-4.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Implement pad configuration via pinctrl
  soc/tegra: pmc: Remove public pad voltage APIs
  soc/tegra: pmc: Use X macro to generate IO pad tables
  soc/tegra: pmc: Implement tegra_io_pad_is_powered()
  soc/tegra: pmc: Factor out DPD register bit calculation
  soc/tegra: pmc: Fix pad voltage configuration for Tegra186
  soc/tegra: pmc: Fix child-node lookup
  dt-bindings: Add Tegra PMC pad configuration bindings

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-09-28 21:54:54 +02:00
Laurentiu Tudor 853dc104e6 soc: fsl: qbman: add APIs to retrieve the probing status
Add a couple of new APIs to check the probing status of qman and bman:
 'int bman_is_probed()' and 'int qman_is_probed()'.
They return the following values.
 *  1 if qman/bman were probed correctly
 *  0 if qman/bman were not yet probed
 * -1 if probing of qman/bman failed
Drivers that use qman/bman driver services are required to use these
APIs before calling any functions exported by qman or bman drivers
or otherwise they will crash the kernel.
The APIs will be used in the following couple of qbman portal patches
and later in the series in the dpaa1 ethernet driver.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-09-27 15:43:35 -05:00
Zhao Qiang 96fc74333f soc: fsl: qe: Fix copy/paste bug in ucc_get_tdm_sync_shift()
There is a copy and paste bug so we accidentally use the RX_ shift when
we're in TX_ mode.

Fixes: bb8b2062af ("fsl/qe: setup clock source for TDM mode")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
(cherry picked from commit 3cb31b634052ed458922e0c8e2b4b093d7fb60b9)
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 13:57:26 -07:00
Alexandre Belloni 64e9e22e68 soc: fsl: qbman: qman: avoid allocating from non existing gen_pool
If the qman driver didn't probe, calling qman_alloc_fqid_range,
qman_alloc_pool_range or qman_alloc_cgrid_range (as done in dpaa_eth) will
pass a NULL pointer to gen_pool_alloc, leading to a NULL pointer
dereference.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
(cherry picked from commit f72487a2788aa70c3aee1d0ebd5470de9bac953a)
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 13:57:25 -07:00
Olof Johansson 2e07bdf9e8 NXP/FSL SoC driver updates for v4.20
- Use of_get_child_by_name helper for QE driver
 - Remove redundant pointer 'priv' for dpio driver
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Merge tag 'soc-fsl-next-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers

NXP/FSL SoC driver updates for v4.20

- Use of_get_child_by_name helper for QE driver
- Remove redundant pointer 'priv' for dpio driver

* tag 'soc-fsl-next-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: dpio: remove redundant pointer 'priv'
  soc: fsl/qe: Use of_get_child_by_name helper

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 12:48:47 -07:00
Olof Johansson 260c9ca902 soc: driver soc update for v4.20
- Enable host-id as an optional dt property
   - Fix minor typo in knav driver
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Merge tag 'drivers_soc_for_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers

soc: driver soc update for v4.20

  - Enable host-id as an optional dt property
  - Fix minor typo in knav driver

* tag 'drivers_soc_for_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: fix spelling mistake "instace" -> "instance"
  firmware: ti_sci: Provide host-id as an optional dt parameter
  Documentation: dt: keystone: ti-sci: Add optional host-id parameter

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-09-25 12:26:52 -07:00
Argus Lin 3013b410a8 soc: mediatek: pwrap: add mt6357 driver for mt6765 SoCs
MT6357 is a new power management IC and it is used for mt6765 SoCs.
To define mt6357_regs for pmic register mapping and pmic_mt6357
for accessing register.

Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 17:36:38 +02:00
Argus Lin 12b079b0fe soc: mediatek: pwrap: add pwrap driver for mt6765 SoCs
mt6765 is a highly integrated SoCs, it uses mt6357 for power management.
This patch adds pwrap driver to access mt6357. Pwrap of mt6765 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.

Signed-off-by: Argus Lin <argus.lin@mediatek.com>
[mb: change has_bridge to capabilities]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 17:28:37 +02:00
Gustavo A. R. Silva 2462080fe9 soc: mediatek: pwrap: use true and false for boolean values
Return statements in functions returning bool should use true or false
instead of an integer value.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 16:35:47 +02:00
Hsin-Hsiung Wang 919049f6d4 soc: mediatek: add mt8183 pwrap support
MT6358 is a new power management IC and it is used for
mt8183 SoCs. To define mt6358_regs for pmic register
mapping and pmic_mt6358 for accessing register.
Adding one more interrupt and wdt source.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 15:50:17 +02:00
Hsin-Hsiung Wang 0bd3134d44 soc: mediatek: pwrap: use group of bits for pwrap capability
Use group of bits for pwrap capability instead of
elements of structure.
This patch is preparing for adding mt8183 pwrap support.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 15:49:38 +02:00
Matthias Brugger bd69e7e9d5 soc: mediatek: pwrap: order SoCs and PMICs ascending
Order SoC and PMIC numbers ascending to make the code more
readable.

Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-09-25 15:46:59 +02:00
Colin King 7bcfe20d0d soc: ti: fix spelling mistake "instace" -> "instance"
Trivial fix to spelling mistake in dev_err messages and comments

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2018-09-24 12:43:21 -07:00
Douglas Anderson 969fc78c37 soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples
The geni_se_clk_freq_match() has some strange semantics.  Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. It can find a non-exact match but it can't handle multiples then

...but callers should always be able to handle a clock that is a
multiple of the requested clock so mode #2 doesn't really make sense.
Let's change the semantics so that the non-exact match can also accept
multiples and then change the code to handle that.

The only caller of this code is the unlanded SPI driver [1] which
currently passes "exact = True", thus it should be safe to change the
semantics in this way.  ...and, in fact, the SPI driver should likely
be modified to pass "exact = False" (with the new semantics) since
that will allow it to work with SPI devices that request a clock rate
that doesn't exactly match a rate we can make.

[1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org

Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-23 21:28:01 -07:00
Douglas Anderson abc1c94471 soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()
The function clk_round_rate() is defined to return a "long", not an
"unsigned long".  That's because it might return a negative error
code.  Change the call in geni_se_clk_tbl_get() to check for errors.

While we're at it, get rid of a useless init of "freq".

NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a table already present in the clock driver is
questionable.  Specifically:
- This method relies on "clk_round_rate()" rounding up.
- This method only works if the table is sorted and has no duplicates.
...this patch doesn't try to fix those problems, it just makes the
error handling more correct.

Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-23 21:28:01 -07:00
Andreas Färber 067517513a soc: actions: Update SPS help text for S700
Commit 3ad85b08f7 (soc: actions: sps: Add S700)
added S700 support to the SPS driver but forget to update Kconfig help.

Add missing S700 mention, in preparation for further SoCs.

Fixes: 3ad85b08f7 ("soc: actions: sps: Add S700")
Reported-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2018-09-22 22:09:47 +02:00
Andreas Färber afe518272d soc: actions: Convert to SPDX license identifiers
Replace textual license notices with SPDX-License-Identifier lines.
Add an SPDX-License-Identifier for the Makefile.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2018-09-22 15:12:55 +02:00
Horia Geantă 48c43de0b5 soc: fsl: dpio: add back some frame queue functions
This commit adds back functions removed in
commit a211c8170b ("staging: fsl-mc/dpio: remove couple of unused functions")
since dpseci object will make use of them.

Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2018-09-21 13:24:50 +08:00
Biju Das 547276c679 soc: renesas: rcar-rst: Add support for RZ/G1N
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:46:31 +02:00
Biju Das c3299eb277 soc: renesas: rcar-sysc: Add r8a7744 support
Add support for RZ/G1N (R8A7744) SoC power areas to the R-Car SYSC driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:33:33 +02:00
Fabrizio Castro 91e95ecd4b soc: renesas: rcar-rst: Add support for RZ/G2E
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-17 10:29:13 +02:00
Fabrizio Castro f37d211c68 soc: renesas: rcar-sysc: Add r8a774c0 support
Add support for the RZ/G2E (R8A774C0) SoC power areas to the
R-Car SYSC driver.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-14 15:33:35 +02:00
Alex Elder 13a920ae78 soc: qcom: smem: a few last cleanups
This patch contains several small cleanups:
  - In qcom_smem_enumerate_partitions(), change the "local_host"
    argument to have 16 bit unsigned type
  - Also in qcom_smem_enumerate_partitions(), change the type of
    the "host0" and "host1" local variables to be u16
  - Fix error messages reporting host ids to use the right format
    specifier
  - Shorten the error messages as well, to fit on one line
  - Add a compile-time check to ensure the local host value passed
    to qcom_smem_enumerate_partitions() is in range

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:57:11 -05:00
Alex Elder 7d01934455 soc: qcom: smem: verify partition host ids match
Add verification in qcom_smem_partition_header() that the host ids
found in a partition's header structure match those in its partition
table entry.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:57:10 -05:00
Alex Elder 33fdbc4e5c soc: qcom: smem: small change in global entry loop
Change the logic in the loop that finds that global host entry in
the partition table not require the host0 and host1 local variables.
The next patch will remove them.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:57:08 -05:00
Alex Elder 380dc4af50 soc: qcom: smem: verify partition offset_free_uncached
Add verification in qcom_smem_partition_header() that the
offset_free_uncached field in a partition's header structure does
not exceed the partition's size.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:57:06 -05:00
Alex Elder 190b216c15 soc: qcom: smem: verify partition header size
Add verification in qcom_smem_partition_header() that the size in a
partition's header structure matches the size in its partition table
entry.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:57:04 -05:00
Alex Elder ada7928973 soc: qcom: smem: introduce qcom_smem_partition_header()
Create a new function qcom_smem_partition_header() to encapsulate
validating locating a partition header and validating information
found within it.  This will be built up over a few commits to make
it more obvious how the common function is replacing duplicated code
elsewhere.  Initially it just verifies the header has the right
magic number.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:57:01 -05:00
Alex Elder abc006b7a6 soc: qcom: smem: require order of host ids to match
In qcom_smem_enumerate_partitions(), we find all partitions that
have a given local host id in either its host0 or its host1 field
in the partition table entry.  We then verify that the header
structure at the start of each partition also contains the same two
host ids as is found in the table of contents.

There is no requirement that the order of the two host ids be the
same in the table of contents and in the partition header.

This patch changes that, requiring host0 to in the partition table
entry to equal host0 in the partition header structure (and similar
for the host1 values).

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:56:59 -05:00
Alex Elder 06ada44a80 soc: qcom: smem: verify both host ids in partition header
The global partition is indicated by having both host values in its
table of contents entry equal SMEM_GLOBAL_HOST=0xfffe.

In qcom_smem_set_global_partition(), we check whether the header
structure at the beginning of the partition contains that host
value, but the check only verifies *one* of them.  Change the check
so the partition header must have SMEM_GLOBAL_HOST for *both* its
host fields.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:56:58 -05:00
Alex Elder eb68cf0909 soc: qcom: smem: small refactor in qcom_smem_enumerate_partitions()
Combine the code that checks whether a partition table entry is
associated with the local host with the assignment of the remote
host id value.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:56:56 -05:00
Alex Elder eba757022f soc: qcom: smem: always ignore partitions with 0 offset or size
In qcom_smem_enumerate_partitions(), any partition table entry
having a zero offset or size field is ignored.  Move those checks
earlier in the loop, because there's no sense in examining the
host fields for those entries.

Add the same checks in qcom_smem_set_global_partition(), so the
scan for the global partition skips over these invalid entries.
This allows a later check for zero size or offset once the global
entry is found to be eliminated.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:56:55 -05:00
Alex Elder 100d26e8ce soc: qcom: smem: initialize region struct only when successful
Hold off initializing anything for the array entry representing a
memory region in qcom_smem_map_memory() until we know we've
successfully mapped it.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:56:53 -05:00
Alex Elder 9f01b7a8f1 soc: qcom: smem: rename variable in qcom_smem_get_global()
Rename the variable "area" to be "region" in qcom_smem_get_global(),
so its name better matches its type.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:56:51 -05:00
Lina Iyer 09e97b6c87 drivers: qcom: rpmh-rsc: clear wait_for_compl after use
The wait_for_compl register ensures the request sequence is maintained
when sending requests from the TCS. Clear the register after sending
active request and during invalidate of the sleep and wake TCS.

Reported-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:39 -05:00
Bjorn Andersson 137dc5843f soc: qcom: rmtfs-mem: Validate that scm is available
The scm device must be present in order for the rmtfs driver to
configure memory permissions for the rmtfs memory region, so check that
it is probed before continuing.

Cc: stable@vger.kernel.org
Fixes: fa65f80451 ("soc: qcom: rmtfs-mem: Add support for assigning memory to remote")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:39 -05:00
Felix Fietkau 61a3bd1008 soc: qcom: spm: add SCM probe dependency
Check for SCM availability before attempting to use SPM. SPM probe will
fail otherwise.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:38 -05:00
Niklas Cassel ccfb464cd1 soc: qcom: Allow COMPILE_TEST of qcom SoC Kconfigs
Since commit cab673583d ("soc: Unconditionally include qcom Makefile"),
we unconditionally include the soc/qcom/Makefile.

This opens up the possibility to compile test the code even when building
for other architectures.

Allow COMPILE_TEST for all qcom SoC Kconfigs, except for two Kconfigs
that depend on QCOM_SCM, since that triggers lots of build errors in
qcom_scm.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:38 -05:00
Niklas Cassel 4fadb26574 soc: qcom: apr: Avoid string overflow
'adev->name' is used as a NUL-terminated string, but using strncpy() with the
length equal to the buffer size may result in lack of the termination:

In function 'apr_add_device',
    inlined from 'of_register_apr_devices' at drivers//soc/qcom/apr.c:264:7,
    inlined from 'apr_probe' at drivers//soc/qcom/apr.c:290:2:
drivers//soc/qcom/apr.c:222:3: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation]
   strncpy(adev->name, np->name, APR_NAME_SIZE);
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

This changes it to use the safer strscpy() instead.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:37 -05:00
Niklas Cassel 4c96ed170d soc: qcom: wcnss_ctrl: Avoid string overflow
'chinfo.name' is used as a NUL-terminated string, but using strncpy() with
the length equal to the buffer size may result in lack of the termination:

drivers//soc/qcom/wcnss_ctrl.c: In function 'qcom_wcnss_open_channel':
drivers//soc/qcom/wcnss_ctrl.c:284:2: warning: 'strncpy' specified bound 32 equals destination size [-Wstringop-truncation]
  strncpy(chinfo.name, name, sizeof(chinfo.name));
  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

This changes it to use the safer strscpy() instead.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:36 -05:00
Niklas Cassel c62615b16c soc: qcom: Remove depends on OF from QCOM_RPMH
QCOM_RPHM already selects ARM64, which always selects OF.

Additionally, the rpmh driver only uses linux/of.h, which has dummy
definitions for all functions, in order for code to to be able to
build without CONFIG_OF set.

Remove the superfluous depends on OF.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:36 -05:00
Niklas Cassel a09b440af8 soc: qcom: Remove bogus depends on OF from QCOM_SMD_RPM
QCOM_SMD_RPM builds perfectly fine without CONFIG_OF set.
Remove the bogus depends on OF.

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:35 -05:00
Niklas Cassel 0a5cdb4138 soc: qcom: smsm: Add select IRQ_DOMAIN
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.

drivers/soc/qcom/smsm.c: In function ‘smsm_inbound_entry’:
drivers/soc/qcom/smsm.c:411:18: error: implicit declaration of function
  ‘irq_domain_add_linear’
  entry->domain = irq_domain_add_linear(node, 32, &smsm_irq_ops, entry);
                  ^~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:34 -05:00
Niklas Cassel 810f11a9cb soc: qcom: smp2p: Add select IRQ_DOMAIN
Since we are using irq_domain_add_linear(), add a select on IRQ_DOMAIN.
This is needed in order to be able to remove the depends on ARCH_QCOM.

drivers/soc/qcom/smp2p.c: In function ‘qcom_smp2p_inbound_entry’:
drivers/soc/qcom/smp2p.c:317:18: error: implicit declaration of function
  ‘irq_domain_add_linear’
  entry->domain = irq_domain_add_linear(node, 32, &smp2p_irq_ops, entry);
                  ^~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:34 -05:00
Niklas Cassel da8eaf9a6c soc: qcom: llcc-slice: Add missing include of sizes.h
Add missing include of sizes.h.

drivers/soc/qcom/llcc-slice.c: In function ‘llcc_update_act_ctrl’:
drivers/soc/qcom/llcc-slice.c:41:44: error: ‘SZ_4K’ undeclared
 #define LLCC_TRP_ACT_CTRLn(n)         (n * SZ_4K)
                                            ^~~~~

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:33 -05:00
Niklas Cassel 9487e2ab10 soc: qcom: smem: Add missing include of sizes.h
Add missing include of sizes.h.

drivers/soc/qcom/smem.c: In function ‘qcom_smem_get_ptable’:
drivers/soc/qcom/smem.c:666:64: error: ‘SZ_4K’ undeclared
  ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K;
                                                                ^~~~~

Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:32 -05:00
Colin Ian King 35aac0ba88 soc: qcom: apr: fix spelling mistake: "paket" -> "packet"
Trivial fix to spelling mistake in dev_err message text

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 16:11:32 -05:00
Douglas Anderson 867d4aa701 soc: qcom: geni: geni_se_clk_freq_match() should always accept multiples
The geni_se_clk_freq_match() has some strange semantics.  Specifically
it is defined with two modes:
1. It can find a clock that's an exact multiple of the requested rate
2. It can find a non-exact match but it can't handle multiples then

...but callers should always be able to handle a clock that is a
multiple of the requested clock so mode #2 doesn't really make sense.
Let's change the semantics so that the non-exact match can also accept
multiples and then change the code to handle that.

The only caller of this code is the unlanded SPI driver [1] which
currently passes "exact = True", thus it should be safe to change the
semantics in this way.  ...and, in fact, the SPI driver should likely
be modified to pass "exact = False" (with the new semantics) since
that will allow it to work with SPI devices that request a clock rate
that doesn't exactly match a rate we can make.

[1] https://lkml.kernel.org/r/1535107336-2214-1-git-send-email-dkota@codeaurora.org

Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 15:54:21 -05:00
Douglas Anderson e11bbcedec soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()
The function clk_round_rate() is defined to return a "long", not an
"unsigned long".  That's because it might return a negative error
code.  Change the call in geni_se_clk_tbl_get() to check for errors.

While we're at it, get rid of a useless init of "freq".

NOTE: overall the idea that we should iterate over clk_round_rate() to
try to reconstruct a table already present in the clock driver is
questionable.  Specifically:
- This method relies on "clk_round_rate()" rounding up.
- This method only works if the table is sorted and has no duplicates.
...this patch doesn't try to fix those problems, it just makes the
error handling more correct.

Fixes: eddac5af06 ("soc: qcom: Add GENI based QUP Wrapper driver")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 15:54:21 -05:00
Venkata Narendra Kumar Gutta c081f3060f soc: qcom: Add support to register LLCC EDAC driver
Cache error reporting controller detects and reports single and
double bit errors on Last Level Cache Controller (LLCC) cache.
Add required support to register LLCC EDAC driver as platform driver,
from LLCC driver.

Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 15:53:58 -05:00
Venkata Narendra Kumar Gutta 7f9c136216 soc: qcom: Add broadcast base for Last Level Cache Controller (LLCC)
Currently, broadcast base is set to end of the LLCC banks, which may
not be correct always. As the number of banks may vary for each chipset
and the broadcast base could be at a different address as well. This info
depends on the chipset, so get the broadcast base info from the device
tree (DT). Add broadcast base in LLCC driver and use this for broadcast
writes.

Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-09-13 15:53:51 -05:00
Maxime Jourdan d4983983d9 soc: amlogic: add meson-canvas driver
Amlogic SoCs have a repository of 256 canvas which they use to
describe pixel buffers.

They contain metadata like width, height, block mode, endianness [..]

Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
pixels.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-09-12 21:38:45 -07:00
Paul Kocialkowski 4f8ab30287 drivers: soc: Allow building the sunxi driver without ARCH_SUNXI
This makes it possible to build the sunxi SRAM driver without building
for the sunxi architecture. This allows selecting the driver when
building the kernel in testing environments.

In particular, this is necessary for testing of the Cedrus driver, that
selects the sunxi SRAM driver.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-09-12 22:40:00 +08:00
Fabrizio Castro 2bab3d8012 soc: renesas: Identify RZ/G2E
Add support for identifying the RZ/G2E (r8a774c0) SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:52 +02:00
Kuninori Morimoto 41c4567ce2 soc: renesas: convert to SPDX identifiers
This patch updates license to use SPDX-License-Identifier
instead of verbose license text.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:51 +02:00
Biju Das 3116d859e7 soc: renesas: rcar-rst: Add support for RZ/G2M
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:51 +02:00
Biju Das 7f0e99cc91 soc: renesas: rcar-sysc: Add r8a774a1 support
Add support for RZ/G2M (R8A774A1) SoC power areas to the R-Car SYSC
driver.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-09-12 10:19:06 +02:00
Sven Schmitt b0682d485f soc: imx: gpc: use GPC_PGC_DOMAIN_* indexes
Use GPC_PGC_DOMAIN_* indexes consistent.

Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-03 12:25:07 +08:00
Sven Schmitt 9f4d61d531 soc: imx: gpc: fix PDN delay
imx6_pm_domain_power_off() reads iso and iso2sw from GPC_PGC_PUPSCR_OFFS
which stores the power up delays.
So use GPC_PGC_PDNSCR_OFFS for the correct delays.

Signed-off-by: Sven Schmitt <sven.schmitt@mixed-mode.de>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-09-03 12:25:06 +08:00
Colin Ian King afa86d264a soc: fsl: dpio: remove redundant pointer 'priv'
Pointer 'priv' is being assigned but is never used hence it is
redundant and can be removed.

Cleans up clang warning:
variable 'priv' set but not used [-Wunused-but-set-variable]

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-08-30 12:19:02 -05:00
Rob Herring f55f61225a soc: fsl/qe: Use of_get_child_by_name helper
Use the of_get_child_by_name() helper instead of open coding searching
for the 'firmware' child node. This removes directly accessing the name
pointer as well.

Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-08-30 12:01:28 -05:00
Chris Brandt 175f435f44 soc: renesas: identify RZ/A2
Add support for identifying the RZ/A2M (R7S9210) SoC.
Also add support for reading the BSID register which is a different format
than the PRR.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:06:42 +02:00
Biju Das 2a4056a759 soc: renesas: Identify RZ/G2M
This patch adds support for identifying the RZ/G2M (r8a774a1) SoC.
It corrects the original RZ/G SoC family name to RZ/G1 and also
adds support for the new RZ/G2 SoC family.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-08-27 15:06:41 +02:00
Aapo Vienamo 4a37f11c8f soc/tegra: pmc: Implement pad configuration via pinctrl
Register a pinctrl device and implement get and set functions for
PIN_CONFIG_LOW_POWER_MODE and PIN_CONFIG_POWER_SOURCE parameters.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:18 +02:00
Aapo Vienamo fccf0f76ec soc/tegra: pmc: Remove public pad voltage APIs
Make tegra_io_pad_set_voltage() and tegra_io_pad_get_voltage() static
and remove the prototypes from pmc.h. Remove enum tegra_io_pad_voltage
and use the defines from <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
instead.

These functions aren't used outside of the pmc driver and new use cases
should use the pinctrl interface instead.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:18 +02:00
Aapo Vienamo 437c4f26f4 soc/tegra: pmc: Use X macro to generate IO pad tables
Refactor the IO pad tables into macro tables so that they can be reused
to generate pinctrl pin descriptors. Also add a name field which is
needed by pinctrl.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:17 +02:00
Aapo Vienamo f142b9d646 soc/tegra: pmc: Implement tegra_io_pad_is_powered()
Implement a function to query whether a pad is in deep power down mode.
This is needed by the pinctrl callbacks.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:17 +02:00
Aapo Vienamo 00ead3c913 soc/tegra: pmc: Factor out DPD register bit calculation
Factor out the the code to calculate the correct DPD register and bit
number for a given pad. This logic will be needed to query the status
register.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:17 +02:00
Aapo Vienamo 13136a47a0 soc/tegra: pmc: Fix pad voltage configuration for Tegra186
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:17 +02:00
Johan Hovold 1dc6bd5e39 soc/tegra: pmc: Fix child-node lookup
Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.

To make things worse, the parent pmc node could end up being prematurely
freed as of_find_node_by_name() drops a reference to its first argument.

Fixes: 3568df3d31 ("soc: tegra: Add thermal reset (thermtrip) support to PMC")
Cc: stable <stable@vger.kernel.org>     # 4.0
Cc: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:25:09 +02:00
Linus Torvalds 2f34a64aea ARM: Device-tree updates
Business as usual -- the bulk of our changes are to devicetree files
 with new hardware support, new SoCs and platforms, and new board types.
 
 New SoCs/platforms:
  - Raspberry Pi Compute Module (CM1) and IO board
  - i.MX6SSL from NXP
  - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN and
    PLC interfaces
  - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
    controllers, communication and PRU subsystem and lots of other
    interfaces (PCIe, USB3, etc).
 
 New boards and systems:
  - Several Atmel at91-based boards from Laird
  - Marvell Armada388-based Helios4 board from SolidRun
  - Samsung Aires-based phones (s5pv210)
  - Allwinner A64-based Pinebook laptop
 
 In addition to the above, there's the usual amount of new devices
 described on existing platforms, fixes and tweaks and new minor variants
 of boards/platforms.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Olof Johansson:
 "Business as usual -- the bulk of our changes are to devicetree files
  with new hardware support, new SoCs and platforms, and new board
  types.

  New SoCs/platforms:
   - Raspberry Pi Compute Module (CM1) and IO board
   - i.MX6SSL from NXP
   - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN
     and PLC interfaces
   - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5
     controllers, communication and PRU subsystem and lots of other
     interfaces (PCIe, USB3, etc).

  New boards and systems:
   - Several Atmel at91-based boards from Laird
   - Marvell Armada388-based Helios4 board from SolidRun
   - Samsung Aires-based phones (s5pv210)
   - Allwinner A64-based Pinebook laptop

  In addition to the above, there's the usual amount of new devices
  described on existing platforms, fixes and tweaks and new minor
  variants of boards/platforms"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (478 commits)
  arm64: dts: sdm845: Add tsens nodes
  arm64: dts: msm8996: thermal: Initialise via DT and add second controller
  arm64: dts: sprd: Add one suspend timer
  arm64: dts: sprd: Add SC27XX ADC device
  arm64: dts: sprd: Add SC27XX eFuse device
  arm64: dts: sprd: Add SC27XX vibrator device
  arm64: dts: sprd: Add SC27XX breathing light controller device
  arm64: dts: meson-axg: add spdif-dit codec
  arm64: dts: meson-axg: add lineout codec
  arm64: dts: meson-axg: add linein codec
  arm64: dts: meson-axg: add tdm interfaces
  arm64: dts: meson-axg: add tdmout formatters
  arm64: dts: meson-axg: add tdmin formatters
  arm64: dts: meson-axg: add spdifout
  arm64: dts: rockchip: add led support for Firefly-RK3399
  arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399
  arm64: dts: rockchip: add power button support for Firefly-RK3399
  ARM: dts: aspeed: Add coprocessor interrupt controller
  arm64: dts: meson-axg: add audio arb reset controller
  arm64: dts: meson-axg: add usb power regulator
  ...
2018-08-23 14:02:22 -07:00
Linus Torvalds f3ea496213 ARM: SoC driver updates
Some of the larger changes this merge window:
  - Removal of drivers for Exynos5440, a Samsung SoC that never saw
    widespread use.
  - Uniphier support for USB3 and SPI reset handling
  - Syste control and SRAM drivers and bindings for Allwinner platforms
  - Qualcomm AOSS (Always-on subsystem) reset controller drivers
  - Raspberry Pi hwmon driver for voltage
  - Mediatek pwrap (pmic) support for MT6797 SoC
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Some of the larger changes this merge window:

   - Removal of drivers for Exynos5440, a Samsung SoC that never saw
     widespread use.

   - Uniphier support for USB3 and SPI reset handling

   - Syste control and SRAM drivers and bindings for Allwinner platforms

   - Qualcomm AOSS (Always-on subsystem) reset controller drivers

   - Raspberry Pi hwmon driver for voltage

   - Mediatek pwrap (pmic) support for MT6797 SoC"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (52 commits)
  drivers/firmware: psci_checker: stash and use topology_core_cpumask for hotplug tests
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple
  usb: host: exynos: Remove support for Exynos5440
  clk: samsung: Remove support for Exynos5440
  soc: sunxi: Add the A13, A23 and H3 system control compatibles
  reset: uniphier: add reset control support for SPI
  cpufreq: exynos: Remove support for Exynos5440
  ata: ahci-platform: Remove support for Exynos5440
  soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
  soc: mediatek: pwrap: add mt6351 driver for mt6797 SoCs
  soc: mediatek: pwrap: add pwrap driver for mt6797 SoCs
  soc: mediatek: pwrap: fix cipher init setting error
  dt-bindings: pwrap: mediatek: add pwrap support for MT6797
  reset: uniphier: add USB3 core reset control
  dt-bindings: reset: uniphier: add USB3 core reset support
  ...
2018-08-23 13:52:46 -07:00
Linus Torvalds 9e259f9352 ARM: 32-bit SoC platform updates
Most of the SoC updates in this cycle are cleanups and moves to more
 modern infrastructure:
  - Davinci was moved to common clock framework
  - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
    keyboard interface (bitbanged AT keyboard via GPIO).
  - Removal of some stale code for Renesas platforms
  - Power management improvements for i.MX6LL
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 32-bit SoC platform updates from Olof Johansson:
 "Most of the SoC updates in this cycle are cleanups and moves to more
  modern infrastructure:

   - Davinci was moved to common clock framework

   - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
     keyboard interface (bitbanged AT keyboard via GPIO).

   - Removal of some stale code for Renesas platforms

   - Power management improvements for i.MX6LL"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits)
  ARM: uniphier: select RESET_CONTROLLER
  arm64: uniphier: select RESET_CONTROLLER
  ARM: uniphier: remove empty Makefile
  ARM: exynos: Clear global variable on init error path
  ARM: exynos: Remove outdated maintainer information
  ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
  ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
  soc: r9a06g032: don't build SMP files for non-SMP config
  ARM: shmobile: Add the R9A06G032 SMP enabler driver
  ARM: at91: pm: configure wakeup sources for ULP1 mode
  ARM: at91: pm: add PMC fast startup registers defines
  ARM: at91: pm: Add ULP1 mode support
  ARM: at91: pm: Use ULP0 naming instead of slow clock
  ARM: hisi: handle of_iomap and fix missing of_node_put
  ARM: hisi: check of_iomap and fix missing of_node_put
  ARM: hisi: fix error handling and missing of_node_put
  ARM: mx5: Set the DBGEN bit in ARM_GPC register
  ARM: imx51: Configure M4IF to avoid visual artifacts
  ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
  ARM: imx: fix i.MX6SLL build
  ...
2018-08-23 13:44:43 -07:00