Граф коммитов

145 Коммитов

Автор SHA1 Сообщение Дата
Sebastian Hesselbarth fa8c5a811e ARM: plat-orion: add reg offset to DT irq driver stub
With irqchip driver for Orion SoCs, reg layout of orion-intc has changed.
This updates irq driver stub implemented before to the new reg layout by
adding an offset to the base address passed by DT node. As orion5x still
uses this stub, it cannot be removed yet.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-07-25 21:07:33 +00:00
Linus Torvalds 21884a83b2 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer core updates from Thomas Gleixner:
 "The timer changes contain:

   - posix timer code consolidation and fixes for odd corner cases

   - sched_clock implementation moved from ARM to core code to avoid
     duplication by other architectures

   - alarm timer updates

   - clocksource and clockevents unregistration facilities

   - clocksource/events support for new hardware

   - precise nanoseconds RTC readout (Xen feature)

   - generic support for Xen suspend/resume oddities

   - the usual lot of fixes and cleanups all over the place

  The parts which touch other areas (ARM/XEN) have been coordinated with
  the relevant maintainers.  Though this results in an handful of
  trivial to solve merge conflicts, which we preferred over nasty cross
  tree merge dependencies.

  The patches which have been committed in the last few days are bug
  fixes plus the posix timer lot.  The latter was in akpms queue and
  next for quite some time; they just got forgotten and Frederic
  collected them last minute."

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
  hrtimer: Remove unused variable
  hrtimers: Move SMP function call to thread context
  clocksource: Reselect clocksource when watchdog validated high-res capability
  posix-cpu-timers: don't account cpu timer after stopped thread runtime accounting
  posix_timers: fix racy timer delta caching on task exit
  posix-timers: correctly get dying task time sample in posix_cpu_timer_schedule()
  selftests: add basic posix timers selftests
  posix_cpu_timers: consolidate expired timers check
  posix_cpu_timers: consolidate timer list cleanups
  posix_cpu_timer: consolidate expiry time type
  tick: Sanitize broadcast control logic
  tick: Prevent uncontrolled switch to oneshot mode
  tick: Make oneshot broadcast robust vs. CPU offlining
  x86: xen: Sync the CMOS RTC as well as the Xen wallclock
  x86: xen: Sync the wallclock when the system time is set
  timekeeping: Indicate that clock was set in the pvclock gtod notifier
  timekeeping: Pass flags instead of multiple bools to timekeeping_update()
  xen: Remove clock_was_set() call in the resume path
  hrtimers: Support resuming with two or more CPUs online (but stopped)
  timer: Fix jiffies wrap behavior of round_jiffies_common()
  ...
2013-07-06 14:09:38 -07:00
Thomas Gleixner 2b0f89317e Merge branch 'timers/posix-cpu-timers-for-tglx' of
git://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks into timers/core

Frederic sayed: "Most of these patches have been hanging around for
several month now, in -mmotm for a significant chunk. They already
missed a few releases."

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-07-04 23:11:22 +02:00
Bartlomiej Zolnierkiewicz 48a9db462d drivers/dma: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they
have been introduced in January 2007 by commit 7405f74bad ("dmaengine:
refactor dmaengine around dma_async_tx_descriptor").  Therefore remove
support for them for now, it can be always brought back when needed.

[sebastian.hesselbarth@gmail.com: fix drivers/dma/mv_xor]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Acked-by: Dan Williams <djbw@fb.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Olof Johansson <olof@lixom.net>
Cc: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03 16:07:42 -07:00
Javier Martinez Canillas f88704c95b arm: orion: Use irq_get_trigger_type() to get IRQ flags
Use irq_get_trigger_type() to get the IRQ trigger type flags
instead calling irqd_get_trigger_type(irq_get_irq_data(irq))

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-6-git-send-email-javier.martinez@collabora.co.uk
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-06-25 11:48:25 +02:00
Stephen Boyd 38ff87f77a sched_clock: Make ARM's sched_clock generic for all architectures
Nothing about the sched_clock implementation in the ARM port is
specific to the architecture. Generalize the code so that other
architectures can use it by selecting GENERIC_SCHED_CLOCK.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[jstultz: Merge minor collisions with other patches in my tree]
Signed-off-by: John Stultz <john.stultz@linaro.org>
2013-06-12 14:02:13 -07:00
Gregory CLEMENT 2b8b279714 ARM: plat-orion: Fix num_resources and id for ge10 and ge11
When platform data were moved from arch/arm/mach-mv78xx0/common.c to
arch/arm/plat-orion/common.c with the commit "7e3819d ARM: orion:
Consolidate ethernet platform data", there were few typo made on
gigabit Ethernet interface ge10 and ge11. This commit writes back
their initial value, which allows to use this interfaces again.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.0.x
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-20 17:39:07 +00:00
Sebastian Hesselbarth 7c14068f5a ARM: plat-orion: add missing ehci include to common.h
Removing orion ehci include from board files will raise a compiler
error because plat/common.h is using an enum provided by orion ehci
but not including the include itself. This just adds the missing include.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-13 16:04:00 +00:00
Linus Torvalds 5647ac0ad4 Removal of GENERIC_GPIO for v3.10
GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid
 cases for enableing GENERIC_GPIO without GPIOLIB, even though it is
 possible to do so which has been causing confusion and breakage. This
 branch does the work to completely eliminate GENERIC_GPIO.
 
 However, it is not trivial to just create a branch to remove it. Over
 the course of the v3.9 cycle more code referencing GENERIC_GPIO has been
 added to linux-next that conflicts with this branch. The following must
 be done to resolve the conflicts when merging this branch into mainline:
 
 * "git grep CONFIG_GENERIC_GPIO" should return 0 hits. Matches should be
   replaced with CONFIG_GPIOLIB
 * "git grep '\bGENERIC_GPIO\b'" should return 1 hit in the Chinese
   documentation.
 * Selectors of GENERIC_GPIO should be turned into selectors of GPIOLIB
 * definitions of the option in architecture Kconfig code should be deleted.
 
 Stephen has 3 merge fixup patches[1] that do the above. They are currently
 applicable on mainline as of May 2nd.
 
 [1] http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg428056.html
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJRifUnAAoJEEFnBt12D9kBs2YP/0U6+ia+xYvkVaJc28PDVIzn
 OReZNcJOYU8D5voxz0voaRD0EdcPwjbMu9Kp9aXMHlk4VxevF+8jCc/us0bIjtO1
 VcB5VmSCIhMhxdnBlum11Mk7Vr5MCweyl9NBsypnPt8cl4obMBZHf2yzoodFktNb
 wtyYlOb6FALtc6iDbOO6dG3w9F7FAOLvskUFzdv89m8mupTsBu9jw9NqFDbJHOex
 rxq0Sdd+kWF/nkJVcV5Y6jIdletRlhpipefMJ9diexreHvwqh+c4kJEYZaXgB5+m
 ha95cPbReK1d+RqzM3A8d4irzSVSmq4k7ijI6QkFOr48+AH7XsgKv5so885LKzMN
 IIXg2Phm9i0H8+ecEvhcc4oIYBHJiEKK54Y0qUD9dqbFoDGPTCSqMHdSSMbpAY+J
 bIIXlVzj1En3PPNUJLPt8q8Qz6WxCT9mDST3QSGYnD4o90HT+1R9j92RxGL6McOq
 rUOyJDwmzFvpBvKK4raGdOU435M+ps2NPKKNIRaIGQPPY9rM1kN4YqvhXukEsC9L
 3a3+3cQLh7iKxBHncxeQsJfethP1CPkJnzvF9r+ZZLf2rcPH4pbQIE2uO0XnX/nd
 5/DKi0nGgAJ//GMMzdo3RiOA5zGFjIZ/KMvfhQldpP6qFJRhqdGi6FPlAcwr1z1n
 YnCByPwwlvfC4LTXFOGL
 =xodc
 -----END PGP SIGNATURE-----

Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux

Pull removal of GENERIC_GPIO from Grant Likely:
 "GENERIC_GPIO now synonymous with GPIOLIB.  There are no longer any
  valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it
  is possible to do so which has been causing confusion and breakage.
  This branch does the work to completely eliminate GENERIC_GPIO."

* tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux:
  gpio: update gpio Chinese documentation
  Remove GENERIC_GPIO config option
  Convert selectors of GENERIC_GPIO to GPIOLIB
  blackfin: force use of gpiolib
  m68k: coldfire: use gpiolib
  mips: pnx833x: remove requirement for GENERIC_GPIO
  openrisc: default GENERIC_GPIO to false
  avr32: default GENERIC_GPIO to false
  xtensa: remove explicit selection of GENERIC_GPIO
  sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB
  powerpc: remove redundant GENERIC_GPIO selection
  unicore32: default GENERIC_GPIO to false
  unicore32: remove unneeded select GENERIC_GPIO
  arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB
  arm: remove redundant GENERIC_GPIO selection
  mips: alchemy: require gpiolib
  mips: txx9: change GENERIC_GPIO to GPIOLIB
  mips: loongson: use GPIO driver on CONFIG_GPIOLIB
  mips: remove redundant GENERIC_GPIO select
2013-05-09 09:59:16 -07:00
Linus Torvalds fcba914542 ARM: arm-soc platform updates for 3.10, part 3
This is the third and smallest of the SoC specific updates.
 Changes include:
 
 * SMP support for the Xilinx zynq platform
 * Smaller imx changes
 * LPAE support for mvebu
 * Moving the orion5x, kirkwood, dove and mvebu platforms
   to a common "mbus" driver for their internal devices.
 
 It would be good to get feedback on the location of the "mbus"
 driver. Since this is used on multiple platforms may potentially
 get shared with other architectures (powerpc and arm64), it
 was moved to drivers/bus/. We expect other similar drivers to
 get moved to the same place in order to avoid creating more
 top-level directories under drivers/ or cluttering up the
 messy drivers/misc/ even more.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAUYgifmCrR//JCVInAQLZ6A//VD38ocUx9RPC8rOgrkzQxcMTh3wFghoA
 BVvS8fcAmhZYA5+GpTYBm+5XH2Jvu6Pv0hrba8TOeEhyZJxiWA6vg0cWWmnvZLDC
 Q0uubhqIhv32I2Oq4uJb/VyzcCrQFrnjhw9HHphy7YlGKKBUFWrbgTaOypwbgXr9
 DnB7u04DvaKcUjZb4Y0HaUDM7qWMFDPbKKF5WMZPqjocnjsiBQ2JMw+2KByliWR3
 mCI+FdickpDYSVp9V9iRM6F73cItknjZIzQs1RYg/GSuPSWkWTdfzE1Blk/561Fo
 QDrNDhnXHlt+bmQRKGWel2gDWBZW47Wj+XkjGpWDFh+e/l3vNJq0hrzXizuRCLSw
 /2VefXyd3jNj8UWL3+GCA4dnw8fx14dgfNJ2iu7kg6l4ggwpJ05ToxabkLFlTRwy
 LloDFjswiTBi75YdQRQCV/95NIxvIQIkbytPrk5zQWVwg8ZXoicgzRRUL5gifLh+
 WE+zaY/A5e1fXN/XS70hvbp2ROZtfGOdunUR9XFR8KNqDoJDlqtrlV3Pjh75YY8G
 JUmCKQjzfubr5WHskPBGCtsSb1455MEIFVANEtlJyOEKp6ytXfpVvrrZtAvmD6Ep
 07dOqOgflnuZPk7H0JOf7mTf9L+fmNp4ubjRqcs9ZfPsEGoQFqBtpLF6JQbxUYGd
 j69lW3jEM3o=
 =rQsu
 -----END PGP SIGNATURE-----

Merge tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates (part 3) from Arnd Bergmann:
 "This is the third and smallest of the SoC specific updates.  Changes
  include:

   - SMP support for the Xilinx zynq platform
   - Smaller imx changes
   - LPAE support for mvebu
   - Moving the orion5x, kirkwood, dove and mvebu platforms to a common
     "mbus" driver for their internal devices.

  It would be good to get feedback on the location of the "mbus" driver.
  Since this is used on multiple platforms may potentially get shared
  with other architectures (powerpc and arm64), it was moved to
  drivers/bus/.  We expect other similar drivers to get moved to the
  same place in order to avoid creating more top-level directories under
  drivers/ or cluttering up the messy drivers/misc/ even more."

* tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
  ARM: imx: reset_controller may be disabled
  ARM: mvebu: Align the internal registers virtual base to support LPAE
  ARM: mvebu: Limit the DMA zone when LPAE is selected
  arm: plat-orion: remove addr-map code
  arm: mach-mv78xx0: convert to use the mvebu-mbus driver
  arm: mach-orion5x: convert to use mvebu-mbus driver
  arm: mach-dove: convert to use mvebu-mbus driver
  arm: mach-kirkwood: convert to use mvebu-mbus driver
  arm: mach-mvebu: convert to use mvebu-mbus driver
  ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
  ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
  ARM i.MX53: make tve_ext_sel propagate rate change to PLL
  ARM i.MX53: Remove unused tve_gate clkdev entry
  ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
  ARM: i.MX5: Add PATA and SRTC clocks
  ARM: imx: do not bring up unavailable cores
  ARM: imx: add initial imx6dl support
  ARM: imx1: mm: add call to mxc_device_init
  ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
  ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
  ...
2013-05-07 11:02:18 -07:00
Linus Torvalds a7726350e0 ARM: arm-soc cleanup for 3.10
Here is a collection of cleanup patches. Among the pieces that stand out are:
 
 - The deletion of h720x platforms
 - Split of at91 non-dt platforms to their own Kconfig file to keep them separate
 - General cleanups and refactoring of i.MX and MXS platforms
 - Some restructuring of clock tables for OMAP
 - Convertion of PMC driver for Tegra to dt-only
 - Some renames of sunxi -> sun4i (Allwinner A10)
 - ... plus a bunch of other stuff that I haven't mentioned
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRggUqAAoJEIwa5zzehBx3HjEQAJwp7heRs/HwTDzmzcyHkRMV
 usbaa9dHBuAZ0DzsWjLK99xEn8VWD9TvbeP6hN5gNhxko06UVza3o8PI2iV1ztMB
 9K3u2+LS5on/5cOxnsU1va16h5hBZ0ZIgNx5NY+PZ5mBY6v1U3qTjljPP62iXp63
 w+sdXeZDe/c5JvuoDRbY0OBR++3Jp8cQg7KbU78jWz3r5D2rC1zwhkf2audcRY6b
 jIWTj9M8CHynh/D6OzKqDcOYorBHNSRj0YbiWS2nnMfm+0V8nya00EPRpCPRiBUb
 sobSy1CI9Qxiih3bOf6QCfzCRzJ5hbtE0zlI8g3bqtEZ1yOsE949HrKapWHJJdIU
 JNTXrxXORAnaRhbzvSPNpp/iJBSDQRsfEETgv5BuHg/4lzTQfzElySbcgb4EeoHr
 7Zt8ZR2/Du+u76qIPqs19ES3Wx+nOEOfSDAgZmlfPvlwmlGDYvqAXoeJ006VXnhG
 JacLuD/cFnJ1w00Bcl48ZXMIsVkoRqjvsCG5q688HGXMM1lU8DfgUpQY6OCWAbdu
 kFnBinJZk+HbE8FGS8O0BoQ+oiC0YIr2XhATL66PGHq7bLHb5ycwvZ7mrfC0AN9j
 M9hqTFednwfo9wF8vSj5nMsxXwP8/mky4ECGoFvLsMYDosunrNVnAHtTgDSE+ZgO
 6kQJ1P8jBBXn2LyjF88W
 =xCAx
 -----END PGP SIGNATURE-----

Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanup from Olof Johansson:
 "Here is a collection of cleanup patches.  Among the pieces that stand
  out are:

   - The deletion of h720x platforms
   - Split of at91 non-dt platforms to their own Kconfig file to keep
     them separate
   - General cleanups and refactoring of i.MX and MXS platforms
   - Some restructuring of clock tables for OMAP
   - Convertion of PMC driver for Tegra to dt-only
   - Some renames of sunxi -> sun4i (Allwinner A10)
   - ... plus a bunch of other stuff that I haven't mentioned"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
  ARM: i.MX: remove unused ARCH_* configs
  ARM i.MX53: remove platform ahci support
  ARM: sunxi: Rework the restart code
  irqchip: sunxi: Rename sunxi to sun4i
  irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
  clocksource: sunxi: Rename sunxi to sun4i
  clocksource: sunxi: make use of CLKSRC_OF
  clocksource: sunxi: Cleanup the timer code
  ARM: at91: remove trailing semicolon from macros
  ARM: at91/setup: fix trivial typos
  ARM: EXYNOS: remove "config EXYNOS_DEV_DRM"
  ARM: EXYNOS: change the name of USB ohci header
  ARM: SAMSUNG: Remove unnecessary code for dma
  ARM: S3C24XX: Remove unused GPIO drive strength register definitions
  ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
  ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
  ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC"
  ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI"
  ...
2013-05-02 09:03:55 -07:00
Alexandre Courbot 7fd2bf3d32 Remove GENERIC_GPIO config option
GENERIC_GPIO has been made equivalent to GPIOLIB in architecture code
and all driver code has been switch to depend on GPIOLIB. It is thus
safe to have GENERIC_GPIO removed.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-16 18:47:19 +09:00
Thomas Petazzoni 7ad2a78342 arm: plat-orion: remove addr-map code
Now that all Marvell EBU platforms have been converted to use the
mvebu-mbus driver, we can remove the common plat-orion/addr-map.c code
that isn't compiled anymore.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:46 +00:00
Thomas Petazzoni 95b80e0a9a arm: mach-mv78xx0: convert to use the mvebu-mbus driver
This commit convers the mach-mv78xx0 sub-architecture to use the
mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the
->init_early() function, and modify the PCIe code so that it uses the
new functions provided by mvebu-mbus to create the needed PCIe
windows.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:39 +00:00
Thomas Petazzoni 5d1190ea69 arm: mach-orion5x: convert to use mvebu-mbus driver
This commit migrates the mach-orion5x platforms to use the mvebu-mbus
driver and therefore removes the Orion5x-specific addr-map code.

The dove_init_early() function now initializes the mvebu-mbus driver
by calling mvebu_mbus_init().

We also convert a number of orion5x_setup_xyz_win() calls to the
appropriate mvebu_mbus_add_window() calls, as each board was doing its
own setup for the NOR window or other devices. Ultimately, those
devices will be probed from the DT.

The common address decoding windows are now registered in the
orion5x_setup_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Dove has been migrated to use the upcoming mvebu PCIe driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:34 +00:00
Thomas Petazzoni 7d55490277 arm: mach-dove: convert to use mvebu-mbus driver
This commit migrates the mach-dove platforms to use the mvebu-mbus
driver and therefore removes the Dove-specific addr-map code.

The dove_init_early() function now initializes the mvebu-mbus driver
by calling mvebu_mbus_init().

The address decoding windows are now registered in the
dove_setup_cpu_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Dove has been migrated to use the upcoming mvebu PCIe driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:27 +00:00
Thomas Petazzoni 5cc0673a67 arm: mach-kirkwood: convert to use mvebu-mbus driver
This commit migrates the mach-kirkwood platforms to use the mvebu-mbus
driver and therefore removes the Kirkwood-specific addr-map code.

The kirkwood_init_early() function is now responsible for initializing
the mvebu-mbus driver by calling mvebu_mbus_init().

The address decoding windows are now registered in the
kirkwood_setup_wins() function. It is worth noting that the four PCIe
address decoding windows will ultimately no longer have to be
registered here: it will be done automatically by the PCIe driver once
Kirkwood has been migrated to use the upcoming mvebu PCIe driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:22 +00:00
Thomas Petazzoni 87e1bed406 arm: mach-mvebu: convert to use mvebu-mbus driver
The changes needed to migrate the mach-mvebu (Armada 370 and Armada
XP) to the mvebu-mbus driver are fairly minimal, since not many
devices currently supported on those SoCs use address decoding
windows. The only one being the BootROM window, used to bring up
secondary CPUs.

However, this BootROM window needed for SMP brings an important
requirement: the mvebu-mbus driver must be initialized at the
->early_init() time, otherwise the BootROM window cannot be setup
early enough to be ready before the secondary CPUs are started.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-04-15 14:06:16 +00:00
Olof Johansson c2573077df Merge branch 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 into next/cleanup
* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
  irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
  irqchip: gic: Call handle_bad_irq() directly
  arm: Move chained_irq_(enter|exit) to a generic file
  arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
  + Linux 3.9-rc3

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-02 10:59:28 -07:00
Jason Cooper 02ac5b3fc5 mvebu cleanup for v3.10
- plat-orion: prep for mvebu-mbus driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iQEcBAABAgAGBQJRRgjnAAoJEAi3KVZQDZAeJWsH/03OAVvN/yBHrWHoi++RWJyx
 sX9BL2i+dqFXpjN82OtPh3z2D1CRZSiJhGsbSZznY6Le1JhzeKXon2BErU0B9hO4
 ZYWKzlDIbQ8Rls41mrDlAFhqmbw9w7lXux70yaYFyXY42JfNMDQ7yKDvcmlyOOdY
 X0fDSaUkSuMRQpEqOCSvp1bZ8BTcgJr3dICUYgxWvQlV/CUfUXI+FXwybZxadwGk
 XwXe03f4ZcKp/jl/+Ttd4wKtwowKuD/yM7Z/VYirmHSgnfGXD41EZrIZJspUVUX8
 rfWnUoCJ1As+jjE3GKD17ZpD98NSdlf7PDju5RKK+6TSfjXl4Nl/AHwTsmoz3fA=
 =2Udw
 -----END PGP SIGNATURE-----

Merge tag 'tags/cleanup_for_v3.10' into mvebu/soc

mvebu cleanup for v3.10

 - plat-orion: prep for mvebu-mbus driver
2013-03-30 21:13:03 +00:00
Simon Guinot 8d00748873 ARM: Orion: add dbg_show function to gpio-orion driver
This patch adds a dedicated dbg_show function to the gpio-mvebu driver.
In addition to the generic gpiolib informations, this function displays
informations related with the specific Marvell registers (blink enable,
data in polarity, interrupt masks and cause).

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-30 20:59:19 +00:00
Florian Fainelli c3a07134e6 mv643xx_eth: convert to use the Marvell Orion MDIO driver
This patch converts the Marvell MV643XX ethernet driver to use the
Marvell Orion MDIO driver. As a result, PowerPC and ARM platforms
registering the Marvell MV643XX ethernet driver are also updated to
register a Marvell Orion MDIO driver. This driver voluntarily overlaps
with the Marvell Ethernet shared registers because it will use a subset
of this shared register (shared_base + 0x4 to shared_base + 0x84). The
Ethernet driver is also updated to look up for a PHY device using the
Orion MDIO bus driver.

For ARM and PowerPC we register a single instance of the "mvmdio" driver
in the system like it used to be done with the use of the "shared_smi"
platform_data cookie on ARM.

Note that it is safe to register the mvmdio driver only for the "ge00"
instance of the driver because this "ge00" interface is guaranteed to
always be explicitely registered by consumers of
arch/arm/plat-orion/common.c and other instances (ge01, ge10 and ge11)
were all pointing their shared_smi to ge00. For PowerPC the in-tree
Device Tree Source files mention only one MV643XX ethernet MAC instance
so the MDIO bus driver is registered only when id == 0.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-22 10:25:15 -04:00
Alexandre Courbot 43b426d6fa arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB
The GPIO driver uses gpiolib, thus it should be compiled when
CONFIG_GPIOLIB is defined and not only CONFIG_GENERIC_GPIO

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-03-20 22:48:14 +09:00
Thomas Petazzoni 59f16137b2 arm: plat-orion: use mv_mbus_dram_info() in PCIe code
The PCIe code was directly accessing the orion_mbus_dram_info
structure to get access to a description of the SDRAM chip selects in
order to configure the PCIe -> SDRAM address decoding
windows.

However, with the introduction of the orion-mbus driver, we are going
to remove this global structure and instead leave only the exported
mv_mbus_dram_info() function to access this description of the SDRAM
chip selects. Therefore, we simply switch to using this API.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-17 18:03:44 +00:00
Thomas Petazzoni efaaa98d30 arm: plat-orion: only build addr-map.c when needed
-flagmail-match: MVEBU
X-flagmail-match: KIRKWOOD
X-flagmail-match: DOVE

For now, addr-map.c is needed by all 5 Marvell EBU
sub-architectures. However, we are going to introduce the orion-mbus
driver, which will replace the address decoding code from
addr-map.c. In order to ease the migration process, we will do that
one sub-architecture at a time, which will require us to remove the
compilation of addr-map.c one sub-architecture at a time.

Therefore, we split the unconditional obj-y inclusion of addr-map.c
into 5 conditionals obj-$(CONFIG_...) lines, one per sub-architecture.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-17 18:03:41 +00:00
Thomas Petazzoni 217bef3d37 arm: plat-orion: fix address decoding when > 4GB is used
During the system initialization, the orion_setup_cpu_mbus_target()
function reads the SDRAM address decoding registers to find out how
many chip-selects of SDRAM have been enabled, and builds a small array
with one entry per chip-select. This array is then used by device
drivers (XOR, Ethernet, etc.) to configure their own address decoding
windows to the SDRAM.

However, devices can only access the first 32 bits of the physical
memory. Even though LPAE is not supported for now, some Marvell boards
are now showing up with 8 GB of RAM, configured using two SDRAM
address decoding windows: the first covering the first 4 GB, the
second covering the last 4 GB. The array built by
orion_setup_cpu_mbus_target() has therefore two entries, and device
drivers try to set up two address decoding windows to the
SDRAM. However, in the device registers for the address decoding, the
base address is only 32 bits, so those two windows overlap each other,
and the devices do not work at all.

This patch makes sure that the array built by
orion_setup_cpu_mbus_target() only contains the SDRAM decoding windows
that correspond to the first 4 GB of the memory. To do that, it
ignores the SDRAM decoding windows for which the 4 low-order bits are
not zero (the 4 low-order bits of the base register are used to store
bits 32:35 of the base address, so they actually indicate whether the
base address is above 4 GB).

This patch allows the newly introduced armada-xp-gp board to properly
operate when it is mounted with more than 4 GB of RAM. Without that,
all devices doing DMA (for example XOR and Ethernet) do not work at
all.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-03-08 22:07:19 +00:00
Linus Torvalds b274776c54 arm-soc: cleanups
A large number of cleanups, all over the platforms. This is dominated
 largely by the Samsung platforms (s3c, s5p, exynos) and a few of the
 others moving code out of arch/arm into more appropriate subsystems.
 The clocksource and irqchip drivers are now abstracted to the point
 where platforms that are already cleaned up do not need to even specify
 the driver they use, it can all get configured from the device tree
 as we do for normal device drivers. The clocksource changes basically
 touch every single platform in the process.
 
 We further clean up the use of platform specific header files here,
 with the goal of turning more of the platforms over to being
 "multiplatform" enabled, which implies that they cannot expose
 their headers to architecture independent code any more.
 
 It is expected that no functional changes are part of the cleanup.
 The overall reduction in total code lines is mostly the result of
 removing broken and obsolete code.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAUSUyKmCrR//JCVInAQIN8RAAnb/uPytmlMjn5yCksF4Mvb/FVbn/TVwz
 KRIGpCHOzyKK1q7pM8NRUVWfjW2SZqbXJFqx6zBGKSlDPvFTOhsLyyupU+Tnyu5W
 IX4eIUBwb+a6H7XDHw0X2YI8uHzi5RNLhne0A1QyDKcnuHs1LDAttXnJHaK4Ap6Y
 NN2YFt3l3ld7DXWXJtMsw5v8lC10aeIFGTvXefaPDAdeMLivmI57qEUMDXknNr7W
 Odz/Rc0/cw3BNBVl/zNHA0jw7FOjKAymCYYNUa4xDCJEr+JnIRTqizd0N/YIIC7x
 aA2xjJ3oKUFyF51yiJE6nFuTyJznhwtehc+uiMOSIkjrPLym52LEHmd7G5Yqlmjz
 oiei09qBb870q3lGxwfht9iaeIwYgQFYGfD0yW5QWArCO5pxhtCPLPH7YZNZtcQd
 ZJRSGGqT/ljBz3bm0K9OLESeeTTN7+Nxvtpiz/CD+Piegz0gWJzDYJRTzkJ3UWpA
 WTVhVQdWUeX2JrNkgM7Z3Tu8iXOe+LIEs7kVXGJZSREmIIZiRvR36UrODZtAkp9I
 7YQ+srX/uaR832pgK0RrHK0zY0psU6MmIvhYxJZFbx7keiPA9eH6drb0x7tGqcUD
 FzEUzvcZvyqppndfBi+R60H/YKAhJDEXdwxzo6dyCpPQaW1T9GnzIqXuE1zin+Aw
 X7Y8YywMbHI=
 =DvgJ
 -----END PGP SIGNATURE-----

Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Arnd Bergmann:
 "A large number of cleanups, all over the platforms.  This is dominated
  largely by the Samsung platforms (s3c, s5p, exynos) and a few of the
  others moving code out of arch/arm into more appropriate subsystems.

  The clocksource and irqchip drivers are now abstracted to the point
  where platforms that are already cleaned up do not need to even
  specify the driver they use, it can all get configured from the device
  tree as we do for normal device drivers.  The clocksource changes
  basically touch every single platform in the process.

  We further clean up the use of platform specific header files here,
  with the goal of turning more of the platforms over to being
  "multiplatform" enabled, which implies that they cannot expose their
  headers to architecture independent code any more.

  It is expected that no functional changes are part of the cleanup.
  The overall reduction in total code lines is mostly the result of
  removing broken and obsolete code."

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
  ARM: mvebu: correct gated clock documentation
  ARM: kirkwood: add missing include for nsa310
  ARM: exynos: move exynos4210-combiner to drivers/irqchip
  mfd: db8500-prcmu: update resource passing
  drivers/db8500-cpufreq: delete dangling include
  ARM: at91: remove NEOCORE 926 board
  sunxi: Cleanup the reset code and add meaningful registers defines
  ARM: S3C24XX: header mach/regs-mem.h local
  ARM: S3C24XX: header mach/regs-power.h local
  ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
  ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
  ARM: S3C24XX: transform s3c2443 subirqs into new structure
  ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs
  ARM: S3C24XX: move s3c2443 irq code to irq.c
  ARM: S3C24XX: transform s3c2416 irqs into new structure
  ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs
  ARM: S3C24XX: move s3c2416 irq init to common irq code
  ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property
  ARM: S3C24XX: Move irq syscore-ops to irq-pm
  clocksource: always define CLOCKSOURCE_OF_DECLARE
  ...
2013-02-21 14:58:40 -08:00
Gerlando Falauto 830f8b9105 arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
refactored printing of the kernel warning:

"orion_mpp_conf: requested MPP%u config unavailable on this hardware\n"

which is not to be printed in case of variant_mask = 0 (unknown variant).
This check should be performed using a logical AND (&&) as opposed
to a bitwise AND (&).

Otherwise, test would fail (and message would not be printed) if
variant_mask != 1

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Olof Johansson <olof@lixom.net>
Cc: Nicolas Pitre <nico@linaro.org>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-23 14:37:52 +00:00
Shawn Guo 838a2ae80a ARM: use clockevents_config_and_register() where possible
The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register().  Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Tested-by: Roland Stigge <stigge@antcom.de>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Barry Song <baohua.song@csr.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tony Prisk <linux@prisktech.co.nz>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-14 10:12:42 -08:00
Linus Torvalds c2714334b9 ARM: arm-soc: Updates for Marvell mvebu/kirkwood
This is a branch with updates for Marvell's mvebu/kirkwood platforms. They
 came in late-ish, and were heavily interdependent such that it didn't
 make sense to split them up across the cross-platform topic branches. So
 here they are (for the second release in a row) in a branch on their own.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQy5i9AAoJEIwa5zzehBx3ZskP/2wxjbwEaNdnR+7j8595bTaa
 GYq8qJ4lUCOKmSqp3bQkg/Plm2D88p78BO5qTm2io527gl10HemzCiGaejclujIw
 sDFZPAE8K0Z8p0gQcBNlRZNuI3J1N6IKRqYH5SIJ2vWmBMfO7nKRR9nmTiDpm5bx
 IcuKX2u/mhyXWN+F0EcHqcupH1K+mdzyGdIQk80Tyqni+UTN+pd0efLM6WL4SFJM
 5fj64dDFpVDA8t+O2Avz8p+lx07vkSy2wIXWt7Ik9BVtsyZQecn+9lpl8FvcrSK/
 MgL3QO4kqDpJDs88M7DJURU1/EdsWZc32M63avctaWnGWItQAbOJYBDmZTlng08x
 ZGrKOgf/I6le7wEpnzdag9ymI/rAL8I0755FkfXxf1R7/X40b+t8/61J/ddOKTDs
 1sTVt+eKyyIMWle4V4zENa03goVBApCIEXcmnuFisFNbBY6azV31inJEp/3PvpgE
 GeMBfxBDkvn+03LkRFcZlhTeDsNTdctD+sfgrNPaQf5bZGIvEz87vgfNTIiaU3GA
 Vd5aiainVDQgmpoFfRG6391gdFlF2l9d67LoG4ClCjn4WL+UxcTRuzBW/liORpUO
 E7CwMHtPq6eoGKywiKMFRzY2QRIKZRkxrC2PCJ/1V9mbIGwgaD/3BQ2/czwrnc8q
 1gnxWx8E5SKEGcDJXD+6
 =7luC
 -----END PGP SIGNATURE-----

Merge tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
 "This is a branch with updates for Marvell's mvebu/kirkwood platforms.
  They came in late-ish, and were heavily interdependent such that it
  didn't make sense to split them up across the cross-platform topic
  branches.  So here they are (for the second release in a row) in a
  branch on their own."

* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
  arm: l2x0: add aurora related properties to OF binding
  arm: mvebu: add Aurora L2 Cache Controller to the DT
  arm: mvebu: add L2 cache support
  dma: mv_xor: fix error handling path
  dma: mv_xor: fix error checking of irq_of_parse_and_map()
  dma: mv_xor: use request_irq() instead of devm_request_irq()
  dma: mv_xor: clear the window override control registers
  arm: mvebu: fix address decoding armada_cfg_base() function
  ARM: mvebu: update defconfig with I2C and RTC support
  ARM: mvebu: Add SATA support for OpenBlocks AX3-4
  ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
  ARM: mvebu: Add support for I2C controllers in Armada 370/XP
  arm: mvebu: Add hardware I/O Coherency support
  arm: plat-orion: Add coherency attribute when setup mbus target
  arm: dma mapping: Export a dma ops function arm_dma_set_mask
  arm: mvebu: Add SMP support for Armada XP
  arm: mm: Add support for PJ4B cpu and init routines
  arm: mvebu: Add IPI support via doorbells
  arm: mvebu: Add initial support for power managmement service unit
  ...
2012-12-14 14:54:26 -08:00
Andrew Lunn f9e7592230 ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
Select the generic mvebu kirkwood pincltr driver and generic mvebu
gpio driver. This requires minor changes to the DT, and the calls to
configure plat-orion gpio driver are removed.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Michael Walle <michael@walle.cc>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Tested-by: Jamie Lentin <jm@lentin.co.uk>
Tested-by: Joshua Coombs <josh.coombs@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-11-24 02:57:35 +00:00
Jason Cooper 32d6448a08 Add hardware I/O coherency support for Armada 370/XP
The purpose of this patch set is to add hardware I/O Coherency support
 for Armada 370 and Armada XP. Theses SoCs come with an unit called
 coherency fabric. A beginning of the support for this unit have been
 introduced with the SMP patch set. This series extend this support:
 the coherency fabric unit allows to use the Armada XP and the Armada
 370 as nearly coherent architectures.
 
 The third patches enables this new feature and register our own set
 of DMA ops, to benefit this hardware enhancement.
 
 The first patches exports a dma operation function needed to register
 our own set of dma ops.
 
 The second patch introduces a new flag for the address decoding
 configuration in order to be able to set the memory windows as
 shared memory.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iEYEABECAAYFAlCs/LcACgkQCwYYjhRyO9WrOgCfeWpA9XdQnwexySw5tPXS7Qdp
 aJEAn2ql07SECpTRWezTJptHL0oI1dFF
 =b0T7
 -----END PGP SIGNATURE-----

Merge tag 'marvell-hwiocc-for-3.8' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything

Add hardware I/O coherency support for Armada 370/XP

The purpose of this patch set is to add hardware I/O Coherency support
for Armada 370 and Armada XP. Theses SoCs come with an unit called
coherency fabric. A beginning of the support for this unit have been
introduced with the SMP patch set. This series extend this support:
the coherency fabric unit allows to use the Armada XP and the Armada
370 as nearly coherent architectures.

The third patches enables this new feature and register our own set
of DMA ops, to benefit this hardware enhancement.

The first patches exports a dma operation function needed to register
our own set of dma ops.

The second patch introduces a new flag for the address decoding
configuration in order to be able to set the memory windows as
shared memory.
2012-11-21 20:02:46 +00:00
Gregory CLEMENT 722202e10b arm: plat-orion: Add coherency attribute when setup mbus target
Recent SoC such as Armada 370/XP came with the possibility to deal
with the I/O coherency by hardware. In this case the transaction
attribute of the window must be flagged as "Shared transaction". Once
this flag is set, then the transactions will be forced to be sent
through the coherency block, in other case transaction is driven
directly to DRAM.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-21 17:07:49 +01:00
Thomas Petazzoni b503fa0199 dma: mv_xor: remove the pool_size from platform_data
The pool_size is always PAGE_SIZE, and since it is a software
configuration paramter (and not a hardware description parameter), we
cannot make it part of the Device Tree binding, so we'd better remove
it from the platform_data as well.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:59:00 +01:00
Thomas Petazzoni 9aedbdbab3 dma: mv_xor: remove hw_id field from platform_data
There is no need for the platform_data to give this ID, it is simply
the channel number, so we can compute it inside the driver when
registering the channels.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:59:00 +01:00
Thomas Petazzoni 0dddee7a7d dma: mv_xor: change the driver name to 'mv_xor'
Since we got rid of the per-XOR channel 'mv_xor' driver, now the
per-XOR engine driver that used to be called 'mv_xor_shared' can
simply be named 'mv_xor'.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:57 +01:00
Thomas Petazzoni 7dde453d62 dma: mv_xor: rename mv_xor_shared_platform_data to mv_xor_platform_data
'struct mv_xor_shared_platform_data' used to be the platform_data
structure for the 'mv_xor_shared', but this driver is going to be
renamed simply 'mv_xor', so also rename its platform_data structure
accordingly.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:57 +01:00
Thomas Petazzoni e39f6ec1f9 dma: mv_xor: rename mv_xor_platform_data to mv_xor_channel_data
mv_xor_platform_data used to be the platform_data structure associated
to the 'mv_xor' driver. This driver no longer exists, and this data
structure really contains the properties of each XOR channel part of a
given XOR engine. Therefore 'struct mv_xor_channel_data' is a more
appropriate name.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:57 +01:00
Thomas Petazzoni 2ccc469cfe dma: mv_xor: remove 'shared' from mv_xor_platform_data
This member of the platform_data structure is no longer used, so get
rid of it.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:56 +01:00
Thomas Petazzoni c08f1495c8 arm: plat-orion: remove unused orion_xor_init_channels()
Now that xor0 and xor1 are registered in a single driver manner, the
orion_xor_init_channels() function has become useless.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:56 +01:00
Thomas Petazzoni dd2c57b822 arm: plat-orion: convert the registration of the xor1 engine to the single driver
Instead of registering one 'mv_xor_shared' device for the XOR engine,
and then two 'mv_xor' devices for the XOR channels, pass the channels
properties as platform_data for the main 'mv_xor_shared' device.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:56 +01:00
Thomas Petazzoni af19e148be arm: plat-orion: convert the registration of the xor0 engine to the single driver
Instead of registering one 'mv_xor_shared' device for the XOR engine,
and then two 'mv_xor' devices for the XOR channels, pass the channels
properties as platform_data for the main 'mv_xor_shared' device.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-20 15:58:56 +01:00
Andrew Lunn 1611f87251 ARM: Kirkwood: switch to DT clock providers
With true DT clock providers available switch Kirkwood clock setup in
DT- enabled boards. While AUXDATA can be removed completely from bus
probing, some devices still don't know about DT. Therefore, some clkdev
aliases are created until these devices also move to DT.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
2012-11-20 14:46:50 +01:00
Rob Herring 46f2007c1e ARM: mvebu: fix build breaks from multi-platform conversion
Moving ARCH_MVEBU for multi-platform support caused several breakages in
recently added addr-map and pinctrl support for mvebu. This adds the
necessary selects and include paths to fix the build.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-28 22:27:07 +02:00
Olof Johansson 0d601f613b Merge branch 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux into late/kirkwood
* 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: add address decoding controller to the DT
  arm: mvebu: add basic address decoding support to Armada 370/XP
  arm: plat-orion: make bridge_virt_base non-const to support DT use case
  arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option
  arm: plat-orion: use void __iomem pointers for addr-map functions
  arm: plat-orion: use void __iomem pointers for time functions
  arm: plat-orion: use void __iomem pointers for MPP functions
  arm: plat-orion: use void __iomem pointers for UART registration functions
  arm: mach-mvebu: use IOMEM() for base address definitions
  arm: mach-orion5x: use IOMEM() for base address definitions
  arm: mach-mv78xx0: use IOMEM() for base address definitions
  arm: mach-kirkwood: use IOMEM() for base address definitions
  arm: mach-dove: use IOMEM() for base address definitions
  arm: mach-orion5x: use plus instead of or for address definitions
  arm: mach-mv78xx0: use plus instead of or for address definitions
  arm: mach-kirkwood: use plus instead of or for address definitions
  arm: mach-dove: use plus instead of or for address definitions

This branch had quite a few conflicts, in particular with the PCI static
map rework from Rob Herring, and a few other context conflicts due to
changes in Kconfig, etc.

I fixed up conflicts in:
	arch/arm/Kconfig
	arch/arm/mach-dove/common.c
	arch/arm/mach-dove/include/mach/dove.h
	arch/arm/mach-kirkwood/common.c
	arch/arm/mach-kirkwood/include/mach/kirkwood.h
	arch/arm/mach-mv78xx0/common.c
	arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
	arch/arm/mach-orion5x/common.c
	arch/arm/mach-orion5x/include/mach/orion5x.h

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 14:22:47 -07:00
Olof Johansson e3a66aa33a Merge branch 'multiplatform/platform-data' into next/multiplatform
* multiplatform/platform-data:
  ARM: spear: move platform_data definitions
  ARM: samsung: move platform_data definitions
  ARM: orion: move platform_data definitions
  ARM: nomadik: move platform_data definitions
  ARM: w90x900: move platform_data definitions
  ARM: vt8500: move platform_data definitions
  ARM: tegra: move sdhci platform_data definition
  ARM: sa1100: move platform_data definitions
  ARM: pxa: move platform_data definitions
  ARM: netx: move platform_data definitions
  ARM: msm: move platform_data definitions
  ARM: imx: move platform_data definitions
  ARM: ep93xx: move platform_data definitions
  ARM: davinci: move platform_data definitions
  ARM: at91: move platform_data definitions

Conflicts due to removed files:
	arch/arm/mach-tegra/board-harmony.c
	arch/arm/mach-tegra/board-trimslice.c

Conflicts due to code removal:
	arch/arm/mach-tegra/board-paz00.c

Context conflicts in:
	drivers/mmc/host/sdhci-tegra.c
	drivers/net/irda/pxaficp_ir.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 01:07:21 -07:00
Thomas Petazzoni 87d136415c arm: plat-orion: make bridge_virt_base non-const to support DT use case
For the Armada 370 and XP SoCs where the DT is used, we need to fill
at runtime the bridge_virt_base field on the
orion_addr_map_cfg. Therefore, remove the 'const' qualifier on this
field.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21 18:05:07 +00:00
Thomas Petazzoni abcda1dc3e arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option
Until now, the PLAT_ORION configuration option was common to all the
Marvell EBU SoCs, and selecting this option had the effect of enabling
the MPP code, GPIO code, address decoding and PCIe code from
plat-orion, as well as providing access to driver-specific header
files from plat-orion/include.

However, the Armada 370 and XP SoCs will not use the MPP and GPIO code
(instead some proper pinctrl and gpio drivers are in preparation), and
generally, we want to move away from plat-orion and instead have
everything in mach-mvebu.

That said, in the mean time, we want to leverage the driver-specific
headers as well as the address decoding code, so we introduce
PLAT_ORION_LEGACY. The older Marvell SoCs need to select
PLAT_ORION_LEGACY, while the newer Marvell SoCs need to select
PLAT_ORION. Of course, when PLAT_ORION_LEGACY is selected, it
automatically selects PLAT_ORION.

Then, with just PLAT_ORION, you have the address decoding code plus
the driver-specific headers. If you add PLAT_ORION_LEGACY to this, you
gain the old MPP, GPIO and PCIe code.

Again, this is only a temporary solution until we make all Marvell EBU
platforms converge into the mach-mvebu directory. This solution avoids
duplicating the existing address decoding code into mach-mvebu.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21 18:04:57 +00:00
Thomas Petazzoni 9b7b7d8b02 arm: plat-orion: use void __iomem pointers for addr-map functions
The functions for address mapping management now take void __iomem
pointers, so we remove the temporary "unsigned long" casts from the
mach-*/common.c files.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21 18:04:47 +00:00
Thomas Petazzoni e96a0309f8 arm: plat-orion: use void __iomem pointers for time functions
The functions for time management now take void __iomem pointers, so
we remove the temporary "unsigned long" casts from the mach-*/common.c
files.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-09-21 18:04:39 +00:00