- New support of Beacon i.MX8m-Mini development kit.
- Add secondary cpus supply on imx8mm-evk and imx8mn-ddr4-evk for
completeness.
- Add thermal zones for imx8mp and lx2160a, PMIC thermal zone for
imx8qxp-mek board.
- Update VDD_ARM 1.2GHz setpoint voltage for imx8mn.
- Add SRC device interrupt for i.MX8 SoCs.
- Use 0.9V for VDD_GPU on imx8mq-librem5-devkit, since there is no need
to support overclocking to 1GHz.
- Update imx8qxp SCU device to use MU channel with less interrupt
triggering, one RX interrupt for a RX and one TX interrupt for a TX.
- Specify DMA channels for LS1028A DSPI controllers.
- Add QE and DS26522 device support for fsl-ls1043a-rdb board.
- Misc random update and cleanup.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7IjXEUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5wlAf/YBbXQ/9lXCxicQdS3Qkos9It3e2c
DXcO44vJjPJoK4NMelj1ULTnLAtG18zwwZOloBM+/TynMDkzZpEHUd0TJte94uIH
YUhMnGD+YQ1DniJKAFcfMdwpMsXPtz2bSGcaPtohxa2q0yYF7c0w1HfURtMtKAn5
UgxNJr0SBWzhCp8ErZxQgi91UBORgUKQNHg+ea7Z6lvIdTBM42gh24O2GMxMTJEq
72uveOw9+GgpTq4Yy6/W4jmtBekgyOB1JDDHlt0ecHiYPs6qKPc9rVRNMB2REEEv
kGgy6x2MR6jEMKnQkRKsyhzin3XdZiwGjVVWn7zz1BzPLC8CvyTKImyLUw==
=5yI8
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree changes:
- New support of Beacon i.MX8m-Mini development kit.
- Add secondary cpus supply on imx8mm-evk and imx8mn-ddr4-evk for
completeness.
- Add thermal zones for imx8mp and lx2160a, PMIC thermal zone for
imx8qxp-mek board.
- Update VDD_ARM 1.2GHz setpoint voltage for imx8mn.
- Add SRC device interrupt for i.MX8 SoCs.
- Use 0.9V for VDD_GPU on imx8mq-librem5-devkit, since there is no need
to support overclocking to 1GHz.
- Update imx8qxp SCU device to use MU channel with less interrupt
triggering, one RX interrupt for a RX and one TX interrupt for a TX.
- Specify DMA channels for LS1028A DSPI controllers.
- Add QE and DS26522 device support for fsl-ls1043a-rdb board.
- Misc random update and cleanup.
* tag 'imx-dt64-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (25 commits)
arm64: dts: Add ds26522 node to dts to ls1043ardb
arm64: dts: add qe node to ls1043ardb
arm64: dts: ls1028a: sl28: keep switch port names consistent
arm64: dts: imx8mp: Add src node interrupts
arm64: dts: imx8mq: Add src node interrupts
arm64: dts: imx8m: assign clocks for A53
arm64: dts: freescale: sl28: enable LPUART1
arm64: dts: ls1043a-rdb: add compatible for board
arm64: dts: imx8mp: add "fsl,imx6sx-fec" compatible string
arm64: dts: imx8qxp-mek: Do not use underscore in node name
arm64: dts: fsl: add fsl,extts-fifo property for fman ptp
arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage
arm64: dts: lx2160a: add more thermal zone support
arm64: dts: imx8qxp-mek: Add PMIC thermal zone support
arm64: dts: imx8qxp-mek: Sort labels alphabetically
arm64: dts: imx8mm: specify #sound-dai-cells for SAI nodes
arm64: dts: imx8qxp: support scu mailbox channel
arm64: dts: imx8mp: Add thermal zones support
arm64: dts: ls1012a: Add QSPI node properties
arm64: dts: imx: Add Beacon i.MX8m-Mini development kit
...
Link: https://lore.kernel.org/r/20200523032516.11016-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a couple of fixes for minor issues, enables XUDC support
on Tegra194, and enables EMC frequency scaling and video capture on
Tegra210.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl7HzdITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZq+D/4r4KG1to0L9PSiZe0KAf9LzrUScPbi
sY3XrBCmQzYrYaNwr0kuGZGc39treo1iVPZmWSRRhKFHItMaUJikxV7wdOeSPEd2
AwI2FXZtyBtf3ptOQ0027qJC4HutiASCL65A/rbSw0eqVwjfLfNdT5Z6yPQ95j20
S43Ub3ufHyT77FyrwVbaou06ohQSo7YtsVYdpsg2pkH3hT47NTDYbzxyTs4k223Z
DKacE5oiLOkSUzT93HYiFip+1MoprN9S/QrcQdfenrXRwFwennp2+NLvz+lkYBwf
yTwq9H9jVvJ6PrYhBHfsqkvGvsgZw/YgXK5lwQIOg1afL3K56oauRn9+utWDZ/hm
fWqArKCss61/t9Kn/5uVyx2cSD2HbCA+UhJZcUlnnuZDd0TZ0j3ODKj0nPneKBvy
t4lNLFY6AWshBos66HxkhiCjeeI5sbiBVnM7cdiPqohbV9lHDEWyLyx0vi0YRNJp
DiJsXhp9+gVyt9c4ZO1BUc1Ka5x2RsxsqjkOPuErny1Fqcr/zFgjAJg/y/ytIYDR
43NCZqNLmkXpuxqrincQyBLg45dV1pvbyItO1XxnK6t+MJVZoR+2Nhe48CJSV7WD
pShwjVFtOuTpTZGwVUNIS38U+ORrPLDid9B9w7oc9WQatcGOZYOHJcgFjGQQbeNB
cmrrt+J0BTMBXg==
=A/Pb
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.8-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.8-rc1
This contains a couple of fixes for minor issues, enables XUDC support
on Tegra194, and enables EMC frequency scaling and video capture on
Tegra210.
* tag 'tegra-for-5.8-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1
arm64: tegra: Make the RTC a wakeup source on Jetson TX2
arm64: tegra: Enable VI I2C on Jetson Nano
arm64: tegra: Fix flag for 64-bit resources in 'ranges' property
arm64: tegra: Add Tegra VI CSI support in device tree
arm64: tegra: Add reset-cells to memory controller
arm64: tegra: Fix SOR powergate clocks and reset
arm64: tegra: Allow the PMIC RTC to wakeup Jetson Xavier
arm64: tegra: Fix ethernet phy-mode for Jetson Xavier
arm64: tegra: Hook up EMC cooling device
arm64: tegra: Add external memory controller node for Tegra210
arm64: tegra: Add XUDC node on Tegra194
arm64: tegra: Kill off "simple-panel" compatibles
Link: https://lore.kernel.org/r/20200522142846.2376224-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
- new boards :Beelink GT-King Pro (G12B SoC), Smartlabs SML-5442TW
(S905D), Hardkernel ODROID-C4 (SM1)
- audio: support for GX-family SoCs
- audio: internal DAC support
- use the new USB control driver for GXL and GXM
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl7G0fMACgkQWTcYmtP7
xmXYOg/8Dp9b4OpTxZ8GQmD6sUrPFxnWi9mckDGYAqvtzNA2MdTzrkJAo6D9jQqC
83uqqVGUKmgSuDnUKfesLLUHPu464Ab2cWLsuKsMIJNO+B9sYX0SAzePT53mdKDR
WDCS9h0UN+smL3WjEb/dZ3gthiXYaBhSEtMyTLq47MJTcbCwvVsvOJmdM2pXkzRx
3kosB22+vLVWyih2tSSIdfzqn3nNFRh1Cs0pnqynMjfkTIsr5XTgmN+BFKmFVefA
qHPpgJ1fGwRBS6sQg/1h3H1zC6pUAXCYXOhaBeOzOumVp3jxR3E0aqux8/CwqEWX
ppkU6sCpuI/BZcHK+76+87SUyBOuuZ9TK2SQuoNGEzT0sZ8GZHTfRD/Edw5YYtGe
l9RpJyq11QOPEv+/q5nNMD9mLzd2pH5WItiO6inj0V03g2jS5t2Kz05awolDbESZ
ELPq5iKHttdxvcV1e5HK5HwKevkXW2+EJSaBRTzFneheQllryZubPVCfV02Ybijf
k97WLs2swKpRjvsIdg2o6MXy8xd/kmj5zclgj6z2S9FF+rgTl9jw3l/GIDZ2kgEx
0YXQL9Pec8xtdux//WwIP931TIHUnI5IUTjGOWy1Ch/QLwA/BxVy+BeQVCAidN3Y
5U6NbowE5UdozThi1BMxVokPWoF9XJlpcQISrmuVrgRtnbfiaMY=
=JbXj
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: Amlogic updates for v5.8
Highlights:
- new boards :Beelink GT-King Pro (G12B SoC), Smartlabs SML-5442TW
(S905D), Hardkernel ODROID-C4 (SM1)
- audio: support for GX-family SoCs
- audio: internal DAC support
- use the new USB control driver for GXL and GXM
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (33 commits)
arm64: dts: meson-g12b-gtking-pro: add initial device-tree
dt-bindings: arm: amlogic: add support for the Beelink GT-King Pro
arm64: dts: meson-g12b-gtking: add initial device-tree
dt-bindings: arm: amlogic: add support for the Beelink GT-King
arm64: dts: meson: convert ugoos-am6 to common w400 dtsi
arm64: dts: meson: add ethernet interrupt to wetek dtsi
arm64: dts: meson: add support for the Smartlabs SML-5442TW
dt-bindings: arm: amlogic: add support for the Smartlabs SML-5442TW
dt-bindings: add vendor prefix for Smartlabs LLC
arm64: dts: meson: g12: add internal DAC glue
arm64: dts: meson: g12: add internal DAC
arm64: dts: meson: libretech-pc: add internal DAC support
arm64: dts: meson: libretech-ac: add internal DAC support
arm64: dts: meson: libretech-cc: add internal DAC support
arm64: dts: meson: p230-q200: add internal DAC support
arm64: dts: meson: gxl: add acodec support
arm64: dts: meson-sm1: add support for Hardkernel ODROID-C4
dt-bindings: arm: amlogic: add odroid-c4 bindings
arm64: dts: meson-sm1: add cpu thermal nodes
arm64: dts: meson-g12b: move G12B thermal nodes to meson-g12b.dtsi
...
Link: https://lore.kernel.org/r/5ec6f56a.1c69fb81.fc5d5.9ca6@mx.google.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Enable RTC and ADC support of RN5T618 PMIC in imx_v6_v7_defconfig.
- Enable i.MX8DXL pinctrl driver support in arm64 defconfig.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7Ij6IUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5peQf+N9PmhSdT/xgWUsudpYBTFGxZ7CP2
mkt86Qxdw5MboaR0Z+L1fsNRYglWU14Hn9GTvPmcoN7VTx6nDJnC55F5xWmP7r1C
ZgI9hH1jZG/jEWJAJmp0sZIBuaZJegUmbD1Pk3dOIMwv/9hEGtj2nI05QuUaTKof
qa8KxSwvYZSd8SKZHDoEl/E6yZZjNIlfMsv6BKTbRfqMHrixZ1y54muNNLKuca3v
hoI4I+AYPy3XhhACjYR3mhSVUF2pCVOpUcFktKdH+ZTLXX/dShMec5vyLwws+CEi
Oldg3J98qkDMnmMXV/1RLvYI/CIR6v7GbsashfinSAeeut6uPz4kgVyhpA==
=kqAi
-----END PGP SIGNATURE-----
Merge tag 'imx-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig
i.MX defconfig update for 5.8:
- Enable RTC and ADC support of RN5T618 PMIC in imx_v6_v7_defconfig.
- Enable i.MX8DXL pinctrl driver support in arm64 defconfig.
* tag 'imx-defconfig-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: extend RN5T618 PMIC family support
arm64: defconfig: Enable CONFIG_PINCTRL_IMX8DXL by default
Link: https://lore.kernel.org/r/20200523032516.11016-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This abstraction was introduced to hide the difference between arm and
arm64 but, with the former no longer supported, this abstraction can be
removed and the canonical kernel API used directly instead.
Signed-off-by: Andrew Scull <ascull@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
CC: Marc Zyngier <maz@kernel.org>
CC: James Morse <james.morse@arm.com>
CC: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200519104036.259917-1-ascull@google.com
The comment used to say that kvm_get_hyp_vector is only called on VHE systems.
In fact, it is also called from the nVHE init function cpu_init_hyp_mode().
Fix the comment to stop confusing devs.
Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200515152550.83810-1-dbrazdil@google.com
Pull bits of code to the only place where it is used. Remove empty function
__cpu_init_stage2(). Remove redundant has_vhe() check since this function is
nVHE-only. No functional changes intended.
Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200515152056.83158-1-dbrazdil@google.com
- Rename pr_efi/pr_efi_err to efi_info/efi_err, and use them consistently
- Simplify and unify initrd loading
- Parse the builtin command line on x86 (if provided)
- Implement printk() support, including support for wide character strings
- Some fixes for issues introduced by the first batch of v5.8 changes
- Fix a missing prototypes warning
- Simplify GDT handling in early mixed mode thunking code
- Some other minor fixes and cleanups
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEnNKg2mrY9zMBdeK7wjcgfpV0+n0FAl7Lb8UACgkQwjcgfpV0
+n3/aAgAkEqqR/BoyzFiyYHujq6bXjESKYr8LrIjNWfnofB6nZqp1yXwFdL0qbj/
PTZ1qIQAnOMmj11lvy1X894h2ZLqE6XEkqv7Xd2oxkh3fF6amlQUWfMpXUuGLo1k
C4QGSfA0OOiM0OOi0Aqk1fL7sTmH23/j63dTR+fH8JMuYgjdls/yWNs0miqf8W2H
ftj8fAKgHIJzFvdTC0vn1DZ6dEKczGLPEcVZ2ns2IJOJ69DsStKPLcD0mlW+EgV2
EyfRSCQv55RYZRhdUOb+yVLRfU0M0IMDrrCDErHxZHXnQy00tmKXiEL20yuegv3u
MUtRRw8ocn2/RskjgZkxtMjAAlty9A==
=AwCh
-----END PGP SIGNATURE-----
Merge tag 'efi-changes-for-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi into efi/core
More EFI changes for v5.8:
- Rename pr_efi/pr_efi_err to efi_info/efi_err, and use them consistently
- Simplify and unify initrd loading
- Parse the builtin command line on x86 (if provided)
- Implement printk() support, including support for wide character strings
- Some fixes for issues introduced by the first batch of v5.8 changes
- Fix a missing prototypes warning
- Simplify GDT handling in early mixed mode thunking code
- Some other minor fixes and cleanups
Conflicts:
drivers/firmware/efi/libstub/efistub.h
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Rather busy cycle. We have a total 99 non-merge commits going into v5.8
merge window. The majority of the changes are in dwc3 this around (31.7%
of all changes). It's composed mostly Thinh's recent updates to get dwc3
to behave correctly with stream transfers. We have also have Roger's for
Keystone platforms and Neil's updates for the meson glue layer.
Apart from those, we have the usual set of non-critical fixes, new
device IDs, spelling fixes all over the place.
Signed-off-by: Felipe Balbi <balbi@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEElLzh7wn96CXwjh2IzL64meEamQYFAl7LktsRHGJhbGJpQGtl
cm5lbC5vcmcACgkQzL64meEamQZjHRAA1lTH1Uv8wMoLpsefXYvc5w98kUu1CQGA
a23m14xNCv66pzgWTDKIk0zQpPiIpoWgvuwohVnDV0ygyCmEyg4Qp5Y6HQcFbDsY
JEQDK41TT9GIEza6b/rhBSzR90MXlXxAMnFRKnxlLgMw1na8Y6Jmn3c0MtQNCfZo
3roOhWnSittEbczNRzMVdZXV/CI8/CL6ykmnsjUipYrtQJHtdzx+M/BWxj/inoUP
Hl9hr6jH6zxQS+8UyoHSzNKtfWYvPMFUrwKNscsdAqjfpQyWV4uGoSFqGc+lGhXx
wrWdR+8WGchWNgJPlykAeaHVf4yyV/bOeQjpngC3HU2FQxc5Ohn3UVtfG7SOeMxD
ZNKZukZzRhZzXX8ha28nYu3r6++heKWS+rspOHwKR56HVhpQlSwvNwoqzTkPxxB5
p9ODyIfirsn2+Maj4weCpNARNxlc31rAybaQ8+uxAg8q6XcSD4lB5U929ajxpHQK
UErgDkIbjGpYY13Lrm7GjBuagiYyyvMKp3+6lR50tKlLYQSFB5EjTaYW15az2Yc+
xwTqSusxhP9MNMp3brU9ZJwzIA4s1gyjelbLsTYs/D3pgYA2YiYnajbwqmHJDINu
Nh+C6xyKiTC9OJspQv6+mHjMzc0VjBhr1KMPdRAdwLw1dHENyEhf6DrfHt/FjGxC
3fS6/uQ5jao=
=OiS0
-----END PGP SIGNATURE-----
Merge tag 'usb-for-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
USB: changes for v5.8 merge window
Rather busy cycle. We have a total 99 non-merge commits going into v5.8
merge window. The majority of the changes are in dwc3 this around (31.7%
of all changes). It's composed mostly Thinh's recent updates to get dwc3
to behave correctly with stream transfers. We have also have Roger's for
Keystone platforms and Neil's updates for the meson glue layer.
Apart from those, we have the usual set of non-critical fixes, new
device IDs, spelling fixes all over the place.
Signed-off-by: Felipe Balbi <balbi@kernel.org>
* tag 'usb-for-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (99 commits)
usb: dwc3: keystone: Turn on USB3 PHY before controller
dt-bindings: usb: ti,keystone-dwc3.yaml: Add USB3.0 PHY property
dt-bindings: usb: convert keystone-usb.txt to YAML
usb: dwc3: gadget: Check for prepared TRBs
usb: gadget: Fix issue with config_ep_by_speed function
usb: cdns3: ep0: delete the redundant status stage
usb: dwc2: Update Core Reset programming flow.
usb: gadget: fsl: Fix a wrong judgment in fsl_udc_probe()
usb: gadget: fix potential double-free in m66592_probe.
usb: cdns3: Fix runtime PM imbalance on error
usb: gadget: lpc32xx_udc: don't dereference ep pointer before null check
usb: dwc3: Increase timeout for CmdAct cleared by device controller
USB: dummy-hcd: use configurable endpoint naming scheme
usb: cdns3: gadget: assign interrupt number to USB gadget structure
usb: gadget: core: sync interrupt before unbind the udc
arm64: dts: qcom: sc7180: Add interconnect properties for USB
arm64: dts: qcom: sdm845: Add interconnect properties for USB
dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver
ARM: dts: at91: Remove the USB EP child node
dt-bindings: usb: atmel: Mark EP child node as deprecated
...
Populate USB DT nodes with interconnect properties.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Populate USB DT nodes with interconnect properties.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Add the correcly architectured USB Glue node and adapt all the Amlogic
GXL and GXM board to the new organization.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
This patch adds a watchdog driver that can be used on ARM systems
with the appropriate watchdog implemented in Secure Monitor firmware.
The driver communicates with firmware via a Secure Monitor Call.
This may be useful for platforms using TrustZone that want
the Secure Monitor firmware to have the final control over the watchdog.
This is implemented on mt8173 chromebook devices oak, elm and hana in
arm trusted firmware file plat/mediatek/mt8173/drivers/wdt/wdt.c.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Evan Benn <evanbenn@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: Xingyu Chen<xingyu.chen@amlogic.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20200505131242.v6.2.Ia92bb4d4ce84bcefeba1d00aaa1c1e919b6164ef@changeid
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
The MSCC bug fix in 'net' had to be slightly adjusted because the
register accesses are done slightly differently in net-next.
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix a missing prototype warning by adding a forward declaration
for the PE/COFF entrypoint, and while at it, align the function
name between the x86 and ARM versions of the stub.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Add remaining properties to the ethernet node and enable it.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Setup the pin control for the Ethernet MAC.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the ethernet0 alias for ethernet so that u-boot can find this node
and fill in the MAC address.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the Ethernet MAC node to mt8516.dtsi. This defines parameters common
to all the boards based on this SoC.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This adds support for the PERICFG register range as a syscon. This will
soon be used by the MediaTek Ethernet MAC driver for NIC configuration.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
- Annotate variable assignment in get_user() with the type to avoid
sparse warnings.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl7H+w0ACgkQa9axLQDI
XvEiVQ//azhBez3lTHeEgh2p45d75Na8HrrHjGGvQ9lhvtMBisrh/N7fp41Fl1vY
2nG3YJqUY7SZJG2EZkF7OQOMHUjpGE3kHJX3YAn6dCk2RzNDe1TCXKrP0r7xkbLh
OW3MpBsUbGksR8THYJsZ+GiTLZ/BrnZJjpJxcMHNwxnNZeVKT1OY4nJSebUo5Rdf
4lm1jMuSiKuHHfkucp1UsGe3QQxsWYpFahjMgU/iCm3BhlzWvocV8NNG6na10SIb
unT4+sXmFM/0pzVFBSdObmeEik4wSibkKh76A8z0SROMkPCtigu2n9RdDtii22ia
uiixQ6CkEYaXaGBXFqjE50dKkMCH0EYpZiEPp22QGHkLRSKI6ZZi0wvQmTvYNLMI
3a6Ptw0u9Ym/MH17HmjCiBuEfWOQeNhOM8YRcMqhHoguTz6Xj/mglbX8DDC37YAw
MnGNH0a/uhBy35eujgW92b2wvNMWcYnuRSiSX8/PSsG3Hxe36nWTI8y20dQ88wAR
wTqzNExmWDQqbTmaSAM0gGfDPkaSiiY+WDAO2FdB/jtovmefB/RBXVmwqbjBsigX
OtXuyF/rVitZ6S3SXal5YBT4xey/MI4NRbnwCm4edXyz+Hz7cDM2iQwDBaiaVZj8
4QHn+TqJTUKWeHRfLuMzg2a5UbCnEZGVBNEPtVxx9bSGqjQ2o+Q=
=HdPI
-----END PGP SIGNATURE-----
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- Bring the PTRACE_SYSEMU semantics in line with the man page.
- Annotate variable assignment in get_user() with the type to avoid
sparse warnings.
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: Add get_user() type annotation on the !access_ok() path
arm64: Fix PTRACE_SYSEMU semantics
Sparse reports "Using plain integer as NULL pointer" when the arm64
__get_user_error() assigns 0 to a pointer type. Use proper type
annotation.
Signed-of-by: Al Viro <viro@zeniv.linux.org.uk>
Reported-by: kbuild test robot <lkp@intel.com>
Link: http://lkml.kernel.org/r/20200522142321.GP23230@ZenIV.linux.org.uk
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The RTC found on the MAX77620 PMIC can be used as a wakeup source on
Jetson Nano and TX1, which is useful to wake the system from suspend
at a given time.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
- Enable PCI PASID as built-in module and UACCE/SEC2/HPRE as
loadable modules to support UACCE use case for the D06CS board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJevg9xAAoJEAvIV27ZiWZcNlkQAI7ZLE9YP0KmkioDrPqABz+7
2K3V0p66BaRdKtq1W9IASQ1sNYJUSDhQGrCrB1xyPGqsLdjGxz2bR8XI4E4bwzlL
uO/8mKRmTDeAtSKuZf0p9hRh+HNdCi8juHm1f4ta02TaaRn0t+V2Hs/H9/+Zzxfl
I+vDkGF2/0E52Gk1ZnxWr+to12O/wJgGResTS9E9qs77Lzzi1gSpg8EdC3ZWk5G5
MUAk0V92jU+RwCCr6IFlQSkSDqkmeqnUTg9peqHrcZh2hi1EizQ6tcErSp7XvGA2
Br2vXS/ZVDLVoVuo+jLEvSL2mCi5i/J1DfUvl5mVevtOulBWzkdhlBkMS2vOkJgm
pyr1psyJUkhtUzq4FflQ7Jpfl4cSWuN2LEl9JpwOyIwfGUuZxPuhhaRlqd+usqRj
UT3i/TQnvLoNEqhWUnztZcI4xIIwiHMo6q9zkMgaK+remG+JBK+lk0NQoQwPtoXy
aGZere//k2rp/NQKJycUl9/hvBygOWn85NBAlE3eGVfMWJAV3GDs27HYexlssuPB
XHVvjX/PLHwMpz5YbxwfgRaptLHgWnW7rakRRnMORHqapHHDU9K49qA/rGAfmqs1
khTysBFjW5N0guHLLr224FRpvuKhW9qTdXrheA362Cd+3ADpTT/EYdOjbWZvz/GO
1KxFzBRG7P0k9GlmrQH6
=Oq8w
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi into arm/defconfig
ARM64: hisilicon: defconfig updates for 5.8
- Enable PCI PASID as built-in module and UACCE/SEC2/HPRE as
loadable modules to support UACCE use case for the D06CS board
* tag 'hisi-arm64-defconfig-for-5.8' of git://github.com/hisilicon/linux-hisi:
arm64: defconfig: Enable UACCE/PCI PASID/SEC2/HPRE configs
Link: https://lore.kernel.org/r/5EBE4217.6000900@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This enables SM8250 GCC clock driver, SC7180 GCC clock driver and SC7180
TLMM pinctrl driver, the IPA and RMNET drivers, CCI, camera subsystem
and camera clock drivers and removes the now depricated GLINK_SSR entry.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7DWyAbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FCR8P/3+4drYyXxNDSslPiy3v
Nb4iffsrJlMMLehlYul4NhWDWh7HQ0+10D2CGyJjh/2sDQmyh4MVIePxtr3VoE8B
51aM0OuBwHiQ6598rw6niQHnXcx2cdqXVesIVp6GkeYh0l1wt4KE7sPcmzag1ffm
fVqu+jCUMgY6yt55Ac35jCCUBuD/V6G8RNFzeTDDJPpqiuc5H0v7BWSZwuJzE7N6
0Y0raIdEdeYtZS1DNE+GU4v6/QuDSHsLtc6tXibuOe5VuSLPyos/Md6GRGeynQVZ
sqXMZ0ZR35QLT/qGOFDrYrXzYfXCH+aLG8KKMlMerE+HmWO2og6kaRb1/YNgd2RD
nBxMLfsTqCuE6PopOVZ4OnAilbjvMqI9B0pPd2e47v+NWYrVekviQ96DWpd3Hx/T
UFm6wV5GAmrTSxmcP3hgWOmYpuBukx7bXPxnMNmvvoSL8xJDYqLlN1AQnh7O4uaw
uP79sGYBEQZZAshiUYCX7iHJRwnqXJPeSxdHGP48Ts5mY3FYXifUFZ2gNfIUmvXh
wJfhl4d2dRV1ty3jFGT3iK9UhG0YzHk805y4CNm03R9qerDNSIEi8x115GZeOXB2
F3nN3g8HJziiDqQ7u5zd6JCspeJ+tcJCGGz1ynvgQCSu/geotU9w02LNo7KrQBLH
BXiNWURDYUxs1eahxepOdBrS
=ukjE
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig
Qualcomm ARM64 defconfig updates for v5.8
This enables SM8250 GCC clock driver, SC7180 GCC clock driver and SC7180
TLMM pinctrl driver, the IPA and RMNET drivers, CCI, camera subsystem
and camera clock drivers and removes the now depricated GLINK_SSR entry.
* tag 'qcom-arm64-defconfig-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: defconfig: enable Qualcomm IPA and RMNet modules
arm64: defconfig: Enable Qualcomm SC7180 pinctrl and gcc
arm64: defconfig: Remove QCOM_GLINK_SSR
arm64: defconfig: Enable SM8250 GCC driver
arm64: defconfig: Enable Qualcomm CAMCC, CAMSS and CCI drivers
Link: https://lore.kernel.org/r/20200519052502.1249888-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
defconfig to enable the audio codec in sunxi_defconfig.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXr7MmQAKCRDj7w1vZxhR
xYFJAQC7OE0ip7aQrJY24AXQgeA1abiQ1+P1oHbHW6E7qnXiGgD9Exd18pO1N1JH
URcmEMjg8plFQn9+gGcHy7VFhE5V8w8=
=ut84
-----END PGP SIGNATURE-----
Merge tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig
Two patches to enable the new cpufreq support on the H6 for the arm64
defconfig to enable the audio codec in sunxi_defconfig.
* tag 'sunxi-config-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: configs: Enable sun50i cpufreq nvmem
ARM: configs: sunxi: Add sun8i analog codec
Link: https://lore.kernel.org/r/9fd4d403-f6c8-420d-8b03-62e8485a0b3d.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
display controller and a new board using it, the Odroid Advance Go.
sdcard regulator for the rockpro64 and a lot of devicetree fixes
making the dt-binding check a lot happier.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl7F1N0QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgV34CAChtYhGGRGEr8WwGL3WG1f8z1nwEfxEGaMx
niLnchgR2kWRiPFV8SVHaNkcGj9+VkeA/F8mCrrKiPDPrsL+s5X6q2liAmEGnIWo
OvlfyuIJNaSjnVxwhdZABIQsjjeLZI2i0OWGmq47vGopWaNWDGW9wrPlRslPrf4N
AIww1TwjKYK8Et5ja3COwfSt1gn2/PwR09wTfQwCy7wi9At6UWOQsDmpyFbjuTgv
GmPcQJZa2YtQovSM5FrbhguCKSGFSukopqqrrxmfsvlkz+xmZyeHN6MMpdNnwBXe
Kf3VU2p6b+75YouuOcJAAueBj6b37/tvi7KK/MZszdG2pM85SL1z
=BL2H
-----END PGP SIGNATURE-----
Merge tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New soc variant the rk3326 which is essentially a px30 with only one
display controller and a new board using it, the Odroid Advance Go.
sdcard regulator for the rockpro64 and a lot of devicetree fixes
making the dt-binding check a lot happier.
* tag 'v5.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
arm64: dts: rockchip: fix pinctrl-names for gpio-leds node on rk3326-odroid-go2
arm64: dts: rockchip: fix pd_tcpc0 and pd_tcpc1 node position on rk3399
arm64: dts: rockchip: add bus-width properties to mmc nodes for px30
arm64: dts: rockchip: remove disable-wp from rk3308-roc-cc emmc node
arm64: dts: rockchip: rename and label gpio-led subnodes
arm64: dts: rockchip: fix defines in pd_vio node for rk3399
arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-orangepi
arm64: dts: rockchip: fix rtl8211e nodename for rk3399-orangepi
arm64: dts: rockchip: fix &pinctrl phy sub nodename for rk3399-nanopi4
arm64: dts: rockchip: fix rtl8211e nodename for rk3399-nanopi4
arm64: dts: rockchip: fix rtl8211f nodename for rk3328 Beelink A1
arm64: dts: rockchip: fix phy nodename for rk3328
include: dt-bindings: rockchip: remove unused defines
arm64: dts: rockchip: replace RK_FUNC defines in rk3326-odroid-go2
arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399
arm64: dts: rockchip: remove #sound-dai-cells from &spdif node of rk3399-hugsun-x99.dts
arm64: dts: rockchip: remove #sound-dai-cells from &i2s1 node of rk3399-pinebook-pro.dts
arm64: dts: rockchip: add Odroid Advance Go
dt-bindings: Add binding for Hardkernel Odroid Go Advance
arm64: dts: rockchip: add core devicetree for rk3326
...
Link: https://lore.kernel.org/r/1970481.V9vR1fIhX2@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Various miscellaneous device tree source fixes to make them fully
binding compliant. It includes fixing various device node names,
order of interrupt properties, compatible names, address and size
cell fields and their aligment with children nodes as well as
moving some fixed devices out of bus node.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl7DqaoACgkQAEG6vDF+
4phj+xAAw0pYfFBqH89qx7dl+BgKl4SMpue0WlhUgiZhbBS2RgrlGTW5TfBb6IVa
boU30Vw4rOdPozy7xizC0JnHsoD8PTxWKbA2t6s3VtTra3iGU0gT7wua/rzQ9pC2
yrk7mTMpa6j5FUdTNSkQwr3x5g95K5haTZV2kRZFBNHzgjZmh02BhGmfQ1TX+sbw
4vEde0xi1dOi9/A78gIWSUbvpdniFrYBkOAbMN8bo37KoCvnuvm2OU6t0UF6nj3h
51eKZjWbxxxh5Jj2DyFZzOaEW9T2vIeW6aqoNEinvz9blSUBmX8Dx8n2YZbUVr/O
ZsnfMXwU3SeRlIt4avNguGk0+xQuHAzy+Jls+A/ypTUL1vX8kTwO7Gs6gOZHsQ9n
DwFhoWesk86EQyzBy3t1mmvWU7Ic2YMjfW6WjmWxgccuTfTEbSZ6VAA/TQWQtvop
6xUtUbLJr1yuBshVsoJyO/yR1MoAnVKsOjB+AbiTW+nqs4oAoQ4q6TLti/z20G/k
l3cTdKVC97cqhXa9hEuIP5wTTBJ7uQJ0boR7fvdrfk0doRvEAI5Xh/OyCWKi2SUH
6nqUEtDoXFfUBfqLEj/uETQzHCo2CQPIyubJB0XhWkT+52/0Gi6KHzq6GvNrb7gt
tx27VizSRz1f1nbZ6jYi0MMnyGBjnRw+HIDBuiUU7kgFIGkJheI=
=Z5QL
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno/Vexpress/Fast Models updates for v5.8
Various miscellaneous device tree source fixes to make them fully
binding compliant. It includes fixing various device node names,
order of interrupt properties, compatible names, address and size
cell fields and their aligment with children nodes as well as
moving some fixed devices out of bus node.
* tag 'juno-updates-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Fix SCPI shared mem node name
arm64: dts: vexpress: Fix VExpress LED names
arm64: dts: juno: Fix GPU interrupt order
arm64: dts: fvp/juno: Fix bus node names
arm64: dts: fvp: Fix SMMU DT node
arm64: dts: fvp/juno: Fix serial node names
arm64: dts: juno: Use proper DT node name for USB
arm64: dts: fvp: Fix ITS node names and #msi-cells
arm64: dts: fvp: Fix GIC child nodes
arm64: dts: juno: Fix GIC child nodes
arm64: dts: fvp: Fix GIC compatible names
arm64: dts: juno: Fix mem-timer
arm64: dts: juno: Move fixed devices out of bus node
arm64: dts: fvp: Move fixed clocks out of bus node
arm64: dts: vexpress: Move fixed devices out of bus node
arm64: dts: fvp: Move fixed devices out of bus node
arm64: dts: fvp/juno: Fix node address fields
Link: https://lore.kernel.org/r/20200519094702.GA32975@bogus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
For SDM845 this defines the IPA network accelerator and the CCI camera
control bus, it defines the required UFS reset and adds WiFi for the
Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251
camera nodes for DB845c.
For SC7180 it adds GPU support, defines the modem remoteproc, adds the
IPA network accelerator, Coresight and ETM support, adds cpuidle low
power states and updates the CPUs' compatible.
For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and
adds voltage corners, it defines the nodes for UFS PHY and controller
and finally corrects a typo in the PDC node to make SPMI functional.
For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control
interface bus is added and Coresight is disabled by default to match
some product configurations. The Samsung A3U gained display support and
Samsung A5U gained touchscreen support.
MSM8996 now property describes the power supply chain for the GPU, the
CCI camera control interface bus is added and the DB820c has the
regulators of the secondary PMIC defined.
For QCS404 USB PHYs and controllers are defined and wired up for the
EVB.
SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7
defined.
It also contains a number of changes throughout to improve DT binding
compliance.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7DYUQbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FWxgP/RgO73BTFzapqi2GO/lC
Jsc/lE9gNpmkuM9kluPrYvDIdDjEgfAehajCmBgkk2nyJnmN0XWSyJWzrAHstaUd
6TKYww43mPtCjPH7mk18DCINTK0yVrrpdpbgy2FQm5/heCQFPsZFWtLPJ23t8wQn
fBJV/JzHjzeaEKf97QPgdTILt/hPSob5PVSdVT+VDC9jp/vnVEAVlc6+58rsH5sZ
eRsGeoA0hUuaKZb7vji8afzyQzjs8Qra+56yhP13eFOtR0Ww1UOvESLWHFzUI91T
yx9qjEDqF4Rw44MWxAxRpwQUU06PiwcIO0Z4ziZ5/FCr+Tseo+yo21B59i+9p112
ihJsQNN18oxAAtyuzv+OxcD3+H7qODvxR0fCdeAWZajeP994P79I4Ddejs+V0KN2
SZmJQmn8Ba8zMPJA7EZAug1IFrNfJ/xOu6KAv6bXpUYc8a5vRyQNqKgBIokry3V+
SDDrHOxu3XhPGR6YmkorJ6EfWdOm1iPs/o5b2GkJZLww6Vd89tIbNsMIDlVCVWaO
R0gImZcpJpO9CLmQvnfKmE9yozIoadCS6lkfaCKuGm+usi5uPFXJqE5AcJ+Yj3/4
fi+MksJOrVwKRpuxr2lMM4GpOVqo7yUZ1iCveNn/GAfw3OVtsef0zL4vk0o4gYvd
Bg0AVo61nTwJ7ef/i8mdlLT8
=ds6R
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for v5.8
For SDM845 this defines the IPA network accelerator and the CCI camera
control bus, it defines the required UFS reset and adds WiFi for the
Lenovo Yoga C630 and defines GPIO pin names and adds OV8856 and OC7251
camera nodes for DB845c.
For SC7180 it adds GPU support, defines the modem remoteproc, adds the
IPA network accelerator, Coresight and ETM support, adds cpuidle low
power states and updates the CPUs' compatible.
For SM8250 it adds regulators from the PM8150, PM8150L and PM8009 and
adds voltage corners, it defines the nodes for UFS PHY and controller
and finally corrects a typo in the PDC node to make SPMI functional.
For MSM8916 I2C1 and I2C5 are defined, a node for the CCI camera control
interface bus is added and Coresight is disabled by default to match
some product configurations. The Samsung A3U gained display support and
Samsung A5U gained touchscreen support.
MSM8996 now property describes the power supply chain for the GPU, the
CCI camera control interface bus is added and the DB820c has the
regulators of the secondary PMIC defined.
For QCS404 USB PHYs and controllers are defined and wired up for the
EVB.
SDM630/SDM660 platform support is added and the Xiaomi Redmi Note 7
defined.
It also contains a number of changes throughout to improve DT binding
compliance.
* tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (68 commits)
arm64: dts: qcom: sc7180: Correct the pdc interrupt ranges
arm64: dts: qcom: sc7180: add IPA information
arm64: dts: qcom: sc7180: Fix ETMv4 power management patch
arm64: dts: qcom: sc7180: Add A618 gpu dt blob
dt-bindings: arm-smmu: Add sc7180 compatible string
arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC
arm64: dts: qcom: db820c: Add vdd_gfx and tie it into mmcc
arm64: dts: qcom: apq8016-sbc: merge -pins.dtsi into main .dtsi
arm64: dts: qcom: msm8916: move gpu opp table to gpu node
arm64: dts: qcom: msm8916: avoid using _ in node names
arm64: dts: qcom: c630: Specify UFS device reset
arm64: dts: qcom: c630: Add WiFi node
arm64: dts: qcom: msm8916-samsung-a3u: add nodes for display panel
arm64: dts: qcom: db820c: Fix invalid pm8994 supplies
arm64: dts: qcom: db820c: Add pmi8994 RPM regulators
arm64: dts: qcom: msm8916: Disable coresight by default
arm64: dts: qcom: sc7180: Add "no-map" to cmd_db reserved area
arm64: dts: qcom: msm8916-samsung-a5u: Add touchscreen
arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen regulator
arm64: dts: qcom: msm8916: Add blsp_i2c5
...
Link: https://lore.kernel.org/r/20200519052528.1249950-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl7APygXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH61dQ/6AmOSIyRASzUakYIsINERDP2e
OEFRy8aEDo6WG6Ww6Fc93cxb0EigzVEdZV67hTyF6/OuWfzM6UM+TI40ZqBEAbcV
4O/keVh7mT7mSU5Qbx0RkJaimPzIXX6h9otGL5cFlGkCkx4HIrg+WaF44n7mibFI
y4gSTnMQSVHSQk2aU5CNnEyybYk/7L5WoPrciykNpOXKw+LCcZ6dwzyA5uA9PcFy
XTnjoIwdPRSnYKw8MNVGGLe56HS2luWs0Yr4zv1sVZNczNNGcZ3HOTI1m4lrYW2A
aCtLMTYiu+ujTq59fyJ9FocL+2gzwWYcRpr3RbE/ykwnWeDrm4S2hCDd3NpvyqRh
/EYFYzvbPle3+uGlyWu3RNWscoo8J+C/tm3tksiObOmoZ8K8InY2QjaSnqHFPRfQ
lqdNFhsi5mPPpAz1aQYtNFTwAcSZndNQFOGFYdxZZerjIOWw+I45x0O06yVtYN/9
PQSqOoMDlt2Tpyzr9CC7Fso/+e6Z7KsezC3xQhUgvUCJ9CUMmyAn2WgJx9DsVCWi
N+2e1sbaimUf/Ee5i6qDRjDlnTIXulMOZQFYrj30QKuFOqSzduvfW9L5dFSH+/aR
FvtpAogUreYoXvY6frNaHUaUHuo9yOgP/DIIdzAmwL5/Frgb19keQc/RFSGNh+7C
d38+03KUniYJ3Kl1gCw=
=tN8C
-----END PGP SIGNATURE-----
Merge tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
MT2712:
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
* tag 'v5.7-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8173: Add capacity-dmips-mhz attributes
arm64: dts: mt2712: use non-empty ranges for usb-phy
arm64: dts: mt8173: fix mdp aliases property name
arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC
arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board
arm64: dts: mediatek: Add I2C support for MT6797 SoC
dt-bindings: i2c: Document I2C controller binding for MT6797 SoC
arm64: dts: mt8173: fix cooling device range
arm64: dts: mediatek: add mt8173 elm and hana board
arm64: dts: mt8173: fix unit name warnings
arm64: dts: mt8173: add uart aliases
dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana
arm64: dts: mt8183: adjust cpuidle target residency
arm64: dts: mt8173: Add gce setting in mmsys and display node
arm64: dts: mt7622: add built-in Wi-Fi device nodes
Link: https://lore.kernel.org/r/2794a8db-c14f-ac34-9e28-9f3700db6c4c@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
support, including:
- Support for the IOMMU on the H6
- Support for cpufreq / thermal throttling on the H6
- Support for the mailbox on the A64, A83t, H3, H5 and H6
- New boards: A20-OLinuXino-LIME-eMMC
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXr7NHgAKCRDj7w1vZxhR
xbhGAQCDavHkpjvq4Hwk/znoS0Y6NvW1JQUyKUWH8K6ah1ZkFwEA5gC0Ac9cbDAk
Q5fZeYl7mPbEL9DI0RphVqHmY2ezXw0=
=WR5/
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual number of patches to improve the Allwinner Device Tree
support, including:
- Support for the IOMMU on the H6
- Support for cpufreq / thermal throttling on the H6
- Support for the mailbox on the A64, A83t, H3, H5 and H6
- New boards: A20-OLinuXino-LIME-eMMC
* tag 'sunxi-dt-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (23 commits)
arm64: dts: allwinner: h6: Add IOMMU
arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
arm64: dts: allwinner: h6: add voltage range to OPP table
arm64: dts: allwinner: sun50i-a64: Add missing address/size-cells
arm64: dts: allwinner: h6: Enable CPU opp tables for Pine H64
arm64: dts: allwinner: Sort Pine H64 device-tree nodes
arm64: dts: allwinner: h6: Enable CPU opp tables for Orange Pi 3
arm64: dts: allwinner: h6: Enable CPU opp tables for Beelink GS1
arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
arm64: dts: allwinner: h6: Add thermal trip points/cooling map
arm64: dts: allwinner: h6: Add clock to CPU cores
arm64: allwinner: h6: orangepi-lite2: Support BT+WIFI combo module
arm64: dts: allwinner: h6: orangepi: Disable OTG mode
arm64: dts: allwinner: h6: orangepi: Add gpio power supply
ARM: dts: sun8i-h2-plus-bananapi-m2-zero: Fix led polarity
arm64: dts: allwinner: h6: Add msgbox node
arm64: dts: allwinner: a64: Add msgbox node
ARM: dts: sunxi: h3/h5: Add msgbox node
ARM: dts: sunxi: a83t: Add msgbox node
ARM: dts: sun8i-h3: add opp table for mali gpu
...
Link: https://lore.kernel.org/r/cfa66bd9-f74c-4614-9ea5-9ef8546cc571.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ID_MMFR4_EL1 has been missing in the CPU context (i.e cpuinfo_arm64). This
just adds the register along with other required changes.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-18-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Enable the following features bits in ID_AA64PFR1 register as per ARM DDI
0487F.a specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-12-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Enable MPAM and SEL2 features bits in ID_AA64PFR0 register as per ARM DDI
0487F.a specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-11-git-send-email-anshuman.khandual@arm.com
[will: Make SEL2 a NONSTRICT feature per Suzuki]
Signed-off-by: Will Deacon <will@kernel.org>
Enable TLB features bit in ID_AA64ISAR0 register as per ARM DDI 0487F.a
specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-10-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Enable DIT and CSV2 feature bits in ID_PFR0 register as per ARM DDI 0487F.a
specification. Except RAS and AMU, all other feature bits are now enabled.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-8-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This adds basic building blocks required for ID_MMFR5 CPU register which
provides information about the implemented memory model and memory
management support in AArch32 state. This is added per ARM DDI 0487F.a
specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-7-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This adds basic building blocks required for ID_DFR1 CPU register which
provides top level information about the debug system in AArch32 state.
We hide the register from KVM guests, as we don't emulate the 'MTPMU'
feature.
This is added per ARM DDI 0487F.a specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon <will@kernel.org>
Reviewed-by : Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-6-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This adds basic building blocks required for ID_PFR2 CPU register which
provides information about the AArch32 programmers model which must be
interpreted along with ID_PFR0 and ID_PFR1 CPU registers. This is added
per ARM DDI 0487F.a specification.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-5-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Double lock feature can have the following possible values.
0b0000 - Double lock implemented
0b1111 - Double lock not implemented
But in case of a conflict the safe value should be 0b1111. Hence this must
be a signed feature instead. Also change FTR_EXACT to FTR_LOWER_SAFE. While
here, fix the erroneous bit width value from 28 to 4.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-4-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
ID_DFR0 based TraceFilt feature should not be exposed to guests. Hence lets
drop it.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-3-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
ID_ISAR0[31..28] bits are RES0 in ARMv8, Reserved/UNK in ARMv7. Currently
these bits get exposed through generic_id_ftr32[] which is not desirable.
Hence define an explicit ftr_id_isar0[] array for ID_ISAR0 register where
those bits can be hidden.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-2-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
- Initial support for the Renesas RZ/G1H SoC on the iWave RainboW
Qseven SOM (G21M) and board (G21D),
- Support for the AISTARVISION MIPI Adapter V2.1 camera board on the
Silicon Linux EK874 RZ/G2E evaluation kit.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXr5g8QAKCRCKwlD9ZEnx
cDusAQD4SCmyY0MZZNWQhkhu2ics2wYpKItw4Y7E4fl9XUlXkQEAyyN11vVNoteX
7KvNX7/9eXpberlcx4H6szPQsOzWzwM=
=2KDk
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.8 (take two)
- Initial support for the Renesas RZ/G1H SoC on the iWave RainboW
Qseven SOM (G21M) and board (G21D),
- Support for the AISTARVISION MIPI Adapter V2.1 camera board on the
Silicon Linux EK874 RZ/G2E evaluation kit.
* tag 'renesas-arm-dt-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a774c0-cat874: Add support for AISTARVISION MIPI Adapter V2.1
ARM: dts: r8a7742: Add GPIO nodes
ARM: dts: r8a7742: Add [H]SCIF{A|B} support
ARM: dts: r8a7742: Add IRQC support
ARM: dts: r8a7742-iwg21d-q7: Add iWave G21D-Q7 board based on RZ/G1H
ARM: dts: r8a7742-iwg21m: Add iWave RZ/G1H Qseven SOM
ARM: dts: r8a7742: Initial SoC device tree
clk: renesas: Add r8a7742 CPG Core Clock Definitions
dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros
Link: https://lore.kernel.org/r/20200515100547.14671-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a macro to check if an ASID is from the current generation, since a
subsequent patch will introduce a third user for this test.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Link: https://lore.kernel.org/r/20200519175502.2504091-6-jean-philippe@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
- Add pinconf for spi2 and spi3 nodes and increase the drive
strength to achieve the max speed for the Hikey960 board
- Add CTI nodes for the Hikey620 board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJevjyIAAoJEAvIV27ZiWZcGoYQAJdLtw+VmW+NarmObzZ1vFh9
tpAWA1UDgH6oY61lscdbi8feAYmj2i8kdCCEFldxUSQCcVFX3MoZAJMTb18EaASg
tJpLvHcNd47BYv+t9VdlIcEsbKHmZO1eJU4KnzOR4uHr6sS1n4spwpPV7lhIFoHY
yp5xZSp5COraHrmBkytgcLgxMhLmQl40Kej1MF2Ce6bP/+C10UuejPOn8KaO9bmm
+7ipF0B254HxmzJJlNWszVJiBweX8UYmeSAe/xLz5mbKAHYnZ1R9Iz2+lJO8SQSz
ztPrZ5JRW+FNGbHq+Q+e5l2OdxcVoIptlHLbrrmVCt7NoTm/CeXnOg7SzxfHN8J9
Y8GyFugjXRV4Oe/3SzlApy4Yq5Hf3iAi0jNrbwQHasKptOXEIP/XLP+slppbQmPY
aklo8iIxM9rUuqHoolFmvl+KE8B7v12YkhBa0sQXWwbGNW2jF6cBknHRC/Lrq6/a
W0VDdAQJ+Tu8fLvG2mO71ZGAvSC0FMkkQ1XE6wMKNkbwf4g1DCgkK+EqQV1eeZcz
WJfgwyMQcql6uv5ICbvgiL48MrAxDCaxMLvvjZc1ti9e2DDMROXILCR5Z/tKd8UB
+2ve/5xcVdujClfpPUoAPwKGrRG9cKZ4PuNOfw5YGntFvLBwhXjtLCjf3/hF4dbD
Qt9KY+9bBMDcf3qY4JrX
=+heh
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-5.8' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for 5.8
- Add pinconf for spi2 and spi3 nodes and increase the drive
strength to achieve the max speed for the Hikey960 board
- Add CTI nodes for the Hikey620 board
* tag 'hisi-arm64-dt-for-5.8' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi6220: Add CTI options
arm64: dts: hikey960: pinctrl: Fix spi2/spi3 pinconf
Link: https://lore.kernel.org/r/5EBE430E.6090508@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Daniel reports that the .cfi_startproc is misplaced for the sigreturn
trampoline, which causes LLVM's unwinder to misbehave:
| I run into this with LLVM’s unwinder.
| This combination was always broken.
This prompted Dave to question our use of CFI directives more generally,
and I ended up going down a rabbit hole trying to figure out how this
very poorly documented stuff gets used.
Move the CFI directives so that the "mysterious NOP" is included in
the .cfi_{start,end}proc block and add a bunch of comments so that I
can save myself another headache in future.
Cc: Tamas Zsoldos <tamas.zsoldos@arm.com>
Reported-by: Dave Martin <dave.martin@arm.com>
Reported-by: Daniel Kiss <daniel.kiss@arm.com>
Tested-by: Daniel Kiss <daniel.kiss@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
For better or worse, GDB relies on the exact instruction sequence in the
VDSO sigreturn trampoline in order to unwind from signals correctly.
Commit c91db232da ("arm64: vdso: Convert to modern assembler annotations")
unfortunately added a BTI C instruction to the start of __kernel_rt_sigreturn,
which breaks this check. Thankfully, it's also not required, since the
trampoline is called from a RET instruction when returning from the signal
handler
Remove the unnecessary BTI C instruction from __kernel_rt_sigreturn,
and do the same for the 32-bit VDSO as well for good measure.
Cc: Daniel Kiss <daniel.kiss@arm.com>
Cc: Tamas Zsoldos <tamas.zsoldos@arm.com>
Reviewed-by: Dave Martin <dave.martin@arm.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Fixes: c91db232da ("arm64: vdso: Convert to modern assembler annotations")
Signed-off-by: Will Deacon <will@kernel.org>
The 'pinctrl-names' property should contain a list of names
to the assigned states. The value 'led_pins' in the gpio-leds
node on rk3326-odroid-go2 is not a state that is normally used,
so change it the common name 'default'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200519111444.2208-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Shenzen AZW (Beelink) GT-King Pro is based on the Amlogic W400
reference board with an S922X chip.
- 4GB LPDDR4 RAM
- 64GB eMMC storage
- 10/100/1000 Base-T Ethernet
- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
- HDMI 2.1 video
- Analogue audio output
- 1x RS232 port
- 2x USB 2.0 port
- 2x USB 3.0 ports
- IR receiver
- 1x micro SD card slot
- 1x Power on/off button
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200520014329.12469-6-christianshewitt@gmail.com
Convert the Ugoos AM6 dts into meson-g12b-w400.dtsi, and then create
a new AM6 dts that references it. This is in preparation for several
new G12B devices that will share the common w400 dtsi.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200520014329.12469-2-christianshewitt@gmail.com
Instead of maintaining 2 sets of enums/macros for tracking SMCCC version,
let us drop smccc_version enum and use ARM_SMCCC_VERSION_1_x directly
instead.
This is in preparation to drop smccc_version here and move it separately
under drivers/firmware/smccc.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200518091222.27467-5-sudeep.holla@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Currently there are multiple instances of parange feature width mask open
encodings while fetching it's value. Even the width mask value (0x7) itself
is not accurate. It should be (0xf) per ID_AA64MMFR0_EL1.PARange[3:0] as in
ARM ARM (0487F.a). Replace them with cpuid_feature_extract_unsigned_field()
which can extract given standard feature (4 bits width i.e 0xf mask) field.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/1589360614-1164-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This validates hypervisor capabilities like VMID width, IPA range for any
hot plug CPU against system finalized values. KVM's view of the IPA space
is used while allowing a given CPU to come up. While here, it factors out
get_vmid_bits() for general use.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-kernel@vger.kernel.org
Suggested-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1589248647-22925-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Keep the switch port labels consistent across the different board
variants. If the user wants to rename them, it should be done in
user-space.
Fixes: ab43f03074 ("arm64: dts: ls1028a: sl28: add support for variant 2")
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The RTC found on the MAX77620 PMIC can be used as a wakeup source on
Jetson TX2, which is useful to wake the system from suspend at a given
time.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Enable the VI I2C so that the peripherals connected to it (such as the
camera connector, an INA3221 power monitor and the USB 3.1 4-port hub)
can be accessed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 contains VI controller for video input capture from MIPI
CSI camera sensors and also supports built-in test pattern generator.
CSI ports can be one-to-one mapped to VI channels for capturing from
an external sensor or from built-in test pattern generator.
This patch adds support for VI and CSI and enables them in Tegra210
device tree.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 device tree is missing reset-cells property for the memory
controller node. This patch adds it.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 device tree lists CSI clock and reset under SOR powergate
node.
But Tegra210 has CSICIL in SOR partition and CSI in VENC partition.
So, this patch includes fix for SOR powergate node.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PMIC RTC is currently unable to wakeup Tegra194 on the Jetson Xavier
platform because the interrupt from the PMIC is not usin the PMC as the
interrupt parent but the GIC directly. Update the PMIC interrupt to use
the PMC as the interrupt parent so that the PMIC RTC alarms can wakeup
the device.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The 'phy-mode' property is currently defined as 'rgmii' for Jetson
Xavier. This indicates that the RGMII RX and TX delays are set by the
MAC and the internal delays set by the PHY are not used.
If the Marvell PHY driver is enabled, such that it is used and not the
generic PHY, ethernet failures are seen (DHCP is failing to obtain an
IP address) and this is caused because the Marvell PHY driver is
disabling the internal RX and TX delays. For Jetson Xavier the internal
PHY RX and TX delay should be used and so fix this by setting the
'phy-mode' to 'rgmii-id' and not 'rgmii'.
Fixes: f89b58ce71 ("arm64: tegra: Add ethernet controller on Tegra194")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The external memory controller can be used as a cooling device for the
LPDDR chips. Hook it up to the "mem" thermal zone of the SOCTHERM block
so that temperature polling can be enabled on the EMC when a given
temperature is exceeded.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Quoth the man page:
```
If the tracee was restarted by PTRACE_SYSCALL or PTRACE_SYSEMU, the
tracee enters syscall-enter-stop just prior to entering any system
call (which will not be executed if the restart was using
PTRACE_SYSEMU, regardless of any change made to registers at this
point or how the tracee is restarted after this stop).
```
The parenthetical comment is currently true on x86 and powerpc,
but not currently true on arm64. arm64 re-checks the _TIF_SYSCALL_EMU
flag after the syscall entry ptrace stop. However, at this point,
it reflects which method was used to re-start the syscall
at the entry stop, rather than the method that was used to reach it.
Fix that by recording the original flag before performing the ptrace
stop, bringing the behavior in line with documentation and x86/powerpc.
Fixes: f086f67485 ("arm64: ptrace: add support for syscall emulation")
Cc: <stable@vger.kernel.org> # 5.3.x-
Signed-off-by: Keno Fischer <keno@juliacomputing.com>
Acked-by: Will Deacon <will@kernel.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Bin Lu <Bin.Lu@arm.com>
[catalin.marinas@arm.com: moved 'flags' bit masking]
[catalin.marinas@arm.com: changed 'flags' type to unsigned long]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Node names are supposed to match the class of the device. The
mmsys node is a syscon as it provides more then just a clock controller.
Update the name.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20200518113156.25009-4-matthias.bgg@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Node names are supposed to match the class of the device, mmsys is a
system controller (syscon) not a clock controller, so change the node
name accordingly.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/20200401201736.2980433-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Interrupts is a required property according to SRC binding, add
it for SRC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Interrupts is a required property according to SRC binding, add
it for SRC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/clk-imx8m*.c, then we could remove
the settings in driver which triggers lockdep warning.
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that the LPUART has support for the LS1028A SoC, also enable it on
our board.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add Ethernet interrupt details to the WeTek Hub/Play2 dtsi to resolve
an issue with Ethernet probing in mainline u-boot.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200518025451.16401-1-christianshewitt@gmail.com
The Smartlabs SML-5442TW is based on the Amlogic P231 reference design
but with the following differences:
- The Yellow and Blue LEDs are available but disabled
- The Red and Green LEDs are used to signal off/on status
- uart_AO can be accessed after opening the case; soldered pins exist
- QCA9377 instead of the usual Ampak/Broadcom module
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200510124129.31575-4-christianshewitt@gmail.com
add the internal DAC glue support on the g12 and sm1 family
This glue connects the different TDM interfaces of the SoC to
the internal audio DAC codec.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-8-jbrunet@baylibre.com
Add the internal DAC support on the libretech CC. The output of this
DAC is provided on the 9J4 connector.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-6-jbrunet@baylibre.com
Add the internal DAC support on the libretech CC. The output of this
DAC is provided on the 9J5 connector.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-5-jbrunet@baylibre.com
Add the internal DAC support on the libretech CC. The output of this
DAC is provided on the 3.5mm jack connector.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-4-jbrunet@baylibre.com
Add the necessary bits to support the internal audio DAC the p230/q200
reference design derivated boards. The output of this DAC is provided
on the 3.5mm jack connector
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506221656.477379-3-jbrunet@baylibre.com
Add the board support for the Hardkernel Odroid-C4 single board computer.
The Odroid-C4 is the Odroid-C2 successor with same form factor, but using
a modern Amlogic S905X3 (SM1) SoC and 4x USB3 ports.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200506080702.6645-3-narmstrong@baylibre.com
Add basic audio support on the p230/q200 reference design.
This initial support is limited to HDMI i2s and SPDIF (LPCM).
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20200421163935.775935-4-jbrunet@baylibre.com
Add the AIU audio device to the Amlogic GX SoC family DT.
ATM, this device provides the i2s and spdif output stages and also
the hdmi and internal codec glues.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20200421163935.775935-3-jbrunet@baylibre.com
APEI is unable to do all of its error handling work in nmi-context, so
it defers non-fatal work onto the irq_work queue. arch_irq_work_raise()
sends an IPI to the calling cpu, but this is not guaranteed to be taken
before returning to user-space.
Unless the exception interrupted a context with irqs-masked,
irq_work_run() can run immediately. Otherwise return -EINPROGRESS to
indicate ghes_notify_sea() found some work to do, but it hasn't
finished yet.
With this apei_claim_sea() returning '0' means this external-abort was
also notification of a firmware-first RAS error, and that APEI has
processed the CPER records.
Signed-off-by: James Morse <james.morse@arm.com>
Tested-by: Tyler Baicar <baicar@os.amperecomputing.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Since there are already a number of sites (ARM64, PowerPC) that effectively
nest nmi_enter(), make the primitive support this before adding even more.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lkml.kernel.org/r/20200505134100.864179229@linutronix.de
When using nmi_enter() recursively, arch_nmi_enter() must also be recursion
safe. In particular, it must be ensured that HCR_TGE is always set while in
NMI context when in HYP mode, and be restored to it's former state when
done.
The current code fails this when interleaved wrong. Notably it overwrites
the original hcr state on nesting.
Introduce a nesting counter to make sure to store the original value.
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lkml.kernel.org/r/20200505134100.771491291@linutronix.de
The pd_tcpc0 and pd_tcpc1 nodes are currently a sub node of pd_vio.
In the rk3399 TRM figure of the 'Power Domain Partition' and in the
table of 'Power Domain and Voltage Domain Summary' these power domains
are positioned directly under VD_LOGIC, so fix that in 'rk3399.dtsi'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Link: https://lore.kernel.org/r/20200428203003.3318-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable building the Qualcomm IPA driver as a kernel module. To be
useful, the IPA driver also requires RMNet, so enable building that
as a module as well.
Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20200518215455.10095-1-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
'bus-width' and pinctrl containing the bus-pins
should be in the same file, so add them to
all mmc nodes in 'px30.dtsi'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200416183053.6045-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The mmc-controller.yaml didn't explicitly say disable-wp is
for SD card slot only, but that is what it was designed for
in the first place.
Remove all disable-wp from emmc or sdio controllers.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20191219121954.2450-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Current dts files with 'gpio-led' nodes were manually verified.
In order to automate this process leds-gpio.txt
has been converted to yaml. With this conversion a check
for pattern properties was added. A test with the command
below gives a screen full of warnings like:
arch/arm64/boot/dts/rockchip/rk3368-r88.dt.yaml: gpio-leds:
'work' does not match any of the regexes:
'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Fix these errors with help of the following rules:
1: Add nodename in the preferred form.
2: Always add a label that ends with '_led' to prevent conflicts
with other labels such as 'power' and 'mmc'
3: If leds need pinctrl add a label that ends with '_led_pin'
also to prevent conflicts with other labels.
patternProperties:
# The first form is preferred, but fall back to just 'led'
# anywhere in the node name to at least catch some child nodes.
"(^led-[0-9a-f]$|led)":
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/leds/
leds-gpio.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200428144933.10953-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives for example this error:
arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pd_vio@15:
'pd_tcpc0@RK3399_PD_TCPC0', 'pd_tcpc1@RK3399_PD_TCPC1'
do not match any of the regexes:
'.*-names$', '.*-supply$', '^#.*-cells$',
'^#[a-zA-Z0-9,+\\-._]{0,63}$',
'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}$',
'^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+(,[0-9a-fA-F]+)*$',
'^__.*__$', 'pinctrl-[0-9]+'
Fix error by replacing the wrong defines by the ones
mentioned in 'rk3399-power.h'.
make -k ARCH=arm64 dtbs_check
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200428203003.3318-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below this error:
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dt.yaml: phy:
'#phy-cells' is a required property
'phy' is a reserved nodename and should not be used for pinctrl,
so change it to 'gmac'.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200321215423.12176-6-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives this error:
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dt.yaml: phy@1:
'#phy-cells' is a required property
The phy nodename is used by a phy-handle.
The parent node is compatible with "snps,dwmac-mdio",
so change nodename to 'ethernet-phy', for which '#phy-cells'
is not a required property
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200321215423.12176-5-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives for example this error:
arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dt.yaml: phy:
'#phy-cells' is a required property
arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dt.yaml: phy:
'#phy-cells' is a required property
arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dt.yaml: phy:
'#phy-cells' is a required property
'phy' is a reserved nodename and should not be used for pinctrl,
so change it to 'gmac'.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200321215423.12176-4-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives these errors:
arch/arm64/boot/dts/rockchip/rk3399-nanopc-t4.dt.yaml: phy@1:
'#phy-cells' is a required property
arch/arm64/boot/dts/rockchip/rk3399-nanopi-m4.dt.yaml: phy@1:
'#phy-cells' is a required property
arch/arm64/boot/dts/rockchip/rk3399-nanopi-neo4.dt.yaml: phy@1:
'#phy-cells' is a required property
The rtl8211e node is used by a phy-handle.
The parent node is compatible with "snps,dwmac-mdio",
so change nodename to 'ethernet-phy', for which '#phy-cells'
is not a required property.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200321215423.12176-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives this error:
arch/arm64/boot/dts/rockchip/rk3328-a1.dt.yaml: phy@0:
'#phy-cells' is a required property
The rtl8211f node is used by a phy-handle.
The parent node is compatible with "snps,dwmac-mdio",
so change nodename to 'ethernet-phy', for which '#phy-cells'
is not a required property.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200321215423.12176-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives for example this error:
arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: phy@0:
'#phy-cells' is a required property
The phy nodename is normally used by a phy-handle.
This node is however compatible with
"ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"
which is just been added to 'ethernet-phy.yaml'.
So change nodename to 'ethernet-phy' for which '#phy-cells'
is not a required property
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200321215423.12176-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The defines RK_FUNC_1 and RK_FUNC_2 are deprecated,
so replace them with the preferred form.
Restyle properties in the same line.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200512203524.7317-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The lack of unique context in '0f1decaa83b7 ("arm64: dts: qcom: sc7180:
Support ETMv4 power management")' caused the patch to be applied
off-by-one. Move the "arm,coresight-loses-context-with-cpu" properties
down one node, so that it applies to the ETMs and not the replicator.
Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
A new kgdb feature will soon land (kgdb_earlycon) that lets us run
kgdb much earlier. In order for everything to work properly it's
important that the break hook is setup by the time we process
"kgdbwait".
Right now the break hook is setup in debug_traps_init() and that's
called from arch_initcall(). That's a bit too late since
kgdb_earlycon really needs things to be setup by the time the system
calls dbg_late_init().
We could fix this by adding call_break_hook() into early_brk64() and
that works fine. However, it's a little ugly. Instead, let's just
add a call to debug_traps_init() straight from trap_init(). There's
already a documented dependency between trap_init() and
debug_traps_init() and this makes the dependency more obvious rather
than just relying on a comment.
NOTE: this solution isn't early enough to let us select the
"ARCH_HAS_EARLY_DEBUG" KConfig option that is introduced by the
kgdb_earlycon patch series. That would only be set if we could do
breakpoints when early params are parsed. This patch only enables
"late early" breakpoints, AKA breakpoints when dbg_late_init() is
called. It's expected that this should be fine for most people.
It should also be noted that if you crash you can still end up in kgdb
earlier than debug_traps_init(). Since you don't need breakpoints to
debug a crash that's fine.
Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200513160501.1.I0b5edf030cc6ebef6ab4829f8867cdaea42485d8@changeid
Signed-off-by: Will Deacon <will@kernel.org>
The Shadow Call Stack pointer is held in x18, so update the ftrace
entry comment to indicate that it cannot be safely clobbered.
Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Defining static shadow call stacks is not architecture-specific, so move
the DEFINE_SCS() macro into the core header file.
Tested-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
There is nothing architecture-specific about scs_overflow_check() as
it's just a trivial wrapper around scs_corrupted().
For parity with task_stack_end_corrupted(), rename scs_corrupted() to
task_scs_end_corrupted() and call it from schedule_debug() when
CONFIG_SCHED_STACK_END_CHECK_is enabled, which better reflects its
purpose as a debug feature to catch inadvertent overflow of the SCS.
Finally, remove the unused scs_overflow_check() function entirely.
This has absolutely no impact on architectures that do not support SCS
(currently arm64 only).
Tested-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
x18 holds the SCS stack pointer value, so introduce a register alias to
make this easier to read in assembly code.
Tested-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Storing the SCS information in thread_info as a {base,offset} pair
introduces an additional load instruction on the ret-to-user path,
since the SCS stack pointer in x18 has to be converted back to an offset
by subtracting the base.
Replace the offset with the absolute SCS stack pointer value instead
and avoid the redundant load.
Tested-by: Sami Tolvanen <samitolvanen@google.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
The SRAM DT binding requires child nodes to use a certain node name
scheme.
Change the naming from scp-shmem to scp-sram to comply with that.
Link: https://lore.kernel.org/r/20200513103016.130417-19-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The Mali binding insists on the GPU interrupts to be in ordered as: job,
mmu, gpu.
Sort the GPU interrupts and interrupt-names properties accordingly.
Link: https://lore.kernel.org/r/20200513103016.130417-17-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Most Arm Ltd. boards are employing a layered bus structure, to map
the hardware design (SoC, motherboard, IOFPGA) and structure the DTs.
The "simple-bus" nodes only allow a limited set of node names. Switch
to use *-bus to be binding compliant.
This relies on a pending dt-schema.git fix for now:
https://github.com/devicetree-org/dt-schema/pull/38
Link: https://lore.kernel.org/r/20200513103016.130417-16-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The SMMU name in the RevC FVP DT file was not fully binding compliant.
Adjust the node name to match the binding's list of allowed names, also
shuffle the order of the interrupts to comply with the expected order.
Link: https://lore.kernel.org/r/20200513103016.130417-15-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.
Replace that with the required "serial" string, to comply with the PL011
DT binding.
Link: https://lore.kernel.org/r/20200513103016.130417-14-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The EHCI/OCHI DT binding requires to use "usb" as the node name stub.
Replace the existing name with "usb" to comply with the binding.
Link: https://lore.kernel.org/r/20200513103016.130417-13-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The GIC ITS nodes in the fastmodel DTS files were not fully binding
compliant.
Use one of the allowed node names, also add the required #msi-cells
property for the older model.
Link: https://lore.kernel.org/r/20200513103016.130417-12-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The GIC DT nodes for the fastmodels were not fully compliant with the
DT binding, which has certain expectations about child nodes and their
size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.
Since the .dts files share interrupt nexus nodes across different
interrupt controllers (GICv2 vs. GICv3), we need to use the only
commonly allowed #address-size value of <1> for both.
Link: https://lore.kernel.org/r/20200513103016.130417-11-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The GIC DT nodes for the Juno boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.
Link: https://lore.kernel.org/r/20200513103016.130417-10-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The GIC DT binding only allows certain combinations of DT compatible
strings. The somewhat awkward "arm,cortex-a15-gic", "arm,cortex-a9-gic"
is not among those.
Drop that combination of different "cortex" based strings used for the
models, and replace it with the more useful combination including
"arm,gic-400".
Link: https://lore.kernel.org/r/20200513103016.130417-9-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The Juno's mem-timer DT node was not fully compliant with the DT binding,
which has certain expectation about child nodes and their size and
address cells values.
Use a cell size of 1, as the binding requests, and spell out the ranges
property to be binding compliant.
Link: https://lore.kernel.org/r/20200513103016.130417-8-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The devicetree compiler complains when DT nodes without a reg property
live inside a (simple) bus node:
Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz
missing or empty reg/ranges property
Move the fixed clocks, the fixed regulator, and the gpio keys to the
root node, since they do not depend on any busses.
Link: https://lore.kernel.org/r/20200513103016.130417-7-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The devicetree compiler complains when DT nodes without a reg property
live inside a (simple) bus node:
Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz
missing or empty reg/ranges property
Move the fixed clocks to the root node, since they do not depend on any
busses.
Link: https://lore.kernel.org/r/20200513103016.130417-6-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The sfp compatible should be 'sff,sfp', not 'sff,sfp+'. We used patched
kernel where the latter was working.
Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The devicetree compiler complains when DT nodes without a reg property
live inside a (simple) bus node:
Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/v2m_refclk32khz
missing or empty reg/ranges property
Move the fixed clocks, the fixed regulator, and the config bus subtree
to the root node, since they do not depend on any busses.
Link: https://lore.kernel.org/r/20200513103016.130417-4-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>