As discussed on linux-arm-msm list, start splitting sm8250 pinctrl
settings into generic and board-specific parts. The first part to
receive such treatment is the spi, so split spi pinconf to the board
device tree.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210210133458.1201066-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Both AM64 EVM and SK have a 512Mb S28HS512T Octal SPI NOR flash.
Add DT node for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20210318113757.21012-2-vigneshr@ti.com
AM64 SoC has a single ADC IP with 8 channels. Add DT node for the same.
Default usecase is to control ADC from non Linux core on the system on
AM642 GP EVM, therefore mark the node as reserved in k3-am642-evm.dts
file. ADC lines are not pinned out on AM642 SK board, therefore disable
the node in k3-am642-sk.dts file.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210318113443.20036-1-vigneshr@ti.com
This hardware supports two interrupts, one per DMA channel (RX and TX).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is
connected with a resistor divider in between. USB0_DRVVBUS pin is muxed
between USB0_DRVVBUS and GPIO1_79 signals.
Add the corresponding properties and set the pinmux mode for USB subsystem
in the evm dts file.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20210317043007.18272-3-a-govindraju@ti.com
Add DT node for the single USB subsystem in main dtsi file.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20210317043007.18272-2-a-govindraju@ti.com
This fixes the bindings in media framework:
The CSI40 is endpoint number 2
The CSI41 is endpoint number 3
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210312174735.2118212-1-niklas.soderlund+renesas@ragnatech.se
Fixes: 3182aa4e0b ("arm64: dts: renesas: r8a77980: add CSI2/VIN support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Now that PCI inbound window restrictions are handled generically between
the of_pci resource parsing and the IOMMU layer, and described in the
Juno DT, we can finally enable the PCIe SMMU without the risk of DMA
mappings inadvertently allocating unusable addresses.
Similarly, the relevant support for IOMMU mappings for peripheral
transfers has been hooked up in the pl330 driver for ages, so we can
happily enable the DMA SMMU without that breaking anything either.
Link: https://lore.kernel.org/r/a730070d718cb119f77c8ca1782a0d4189bfb3e7.1614965598.git.robin.murphy@arm.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The PLDA root complex on Juno relies on an address-based lookup table to
generate AXI attributes for inbound PCI transactions, and as such will
not pass any transaction not matching any programmed address range. The
standard firmware configuration programs 3 entries covering the GICv2m
MSI doorbell and the 2 DRAM regions, so add a "dma-ranges" property to
describe those usable inbound windows.
Link: https://lore.kernel.org/r/720d0a9a42e33148fcac45cd39a727093a32bf32.1614965598.git.robin.murphy@arm.com
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Crypto engine (CAAM) on LS1012A platform is configured HW-coherent,
mark accordingly the DT node.
Lack of "dma-coherent" property for an IP that is configured HW-coherent
can lead to problems, similar to what has been reported for LS1046A.
Cc: <stable@vger.kernel.org> # v4.12+
Fixes: 85b85c5695 ("arm64: dts: ls1012a: add crypto node")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Crypto engine (CAAM) on LS1043A platform is configured HW-coherent,
mark accordingly the DT node.
Lack of "dma-coherent" property for an IP that is configured HW-coherent
can lead to problems, similar to what has been reported for LS1046A.
Cc: <stable@vger.kernel.org> # v4.8+
Fixes: 63dac35b58 ("arm64: dts: ls1043a: add crypto node")
Link: https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1598@arm.com
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The board has both MACs routed out, enable the EQOS.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add EQOS GMAC node per Documentation/devicetree/bindings/net/imx-dwmac.txt ,
leave out the nvmem entries as that is not yet available, so the MAC has to
be passed in via DT by the bootloader.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once
Mainline Linux supported.
Add support for it.
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.
General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features
i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Per dt-bindings, the clock-names sequence should be ipg ahb per to pass
dtbs_check.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add description for the four PWMs.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add VMMC and VQMMC description for USDHC1 (eMMC).
There are comming directly from the alimentation
stage, so add the vref_3V3 fixed regulator.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This allows for automatic output source switching in userspace. Enable
the pullup on the GPIO to actually make it trigger and mark it as
active-high since detection is reversed otherwise.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add mux so we can select either headset or built-in microphone input.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The codec is currently named after the chip but it should be named like
the device itself since otherwise it's impossible to distinguish it from
other devices using the same codec (e.g. in alsa's UCM).
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On Birch I can never reach 220 and hence the display would never
turn off. Tests suggest 120 to be a good threshold value for all Birch
devices.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These sections should be read only as they contain important data.
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 are setup to the same rates
right on the clock controller.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies
to enable SDR104 on usdhc1 connecting the WiFi chip.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The legacy interrupt INT_A is hardwired to the event collector. RCEC is
bascially supported starting with v5.11. Having a correct interrupt, will
make RCEC at least probe correctly.
There are still issues with how RCEC is implemented in the RCiEP on the
LS1028A. RCEC will report an error, but it cannot find the correct
subdevice.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass the i2c3 unit name to fix the following W=1 build warning:
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts:159.8-172.5: Warning (unit_address_vs_reg): /soc@0/bus@30800000/i2c@30a40000/i2cmux@70/i2c3: node has a reg or ranges property, but no unit name
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It
has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports,
1 WAN port.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The PM8150 comes with everything the RTC needs, so let's just leave it
enabled instead of having to explicitly enable it for all boards.
In effect this patch enables the RTC on the SM8150 MTP and the SM8250
HDK.
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210106001004.4081508-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
SM8350-MTP features PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B. PMICs Add the dtsi for these PMICs to MTP.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210312052737.3558801-9-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
WSA881x powerdown pin is connected to GPIO1 not gpio2, so correct this.
This was working so far due to a shift bug in gpio driver, however
once that is fixed this will stop working, so fix this!
Fixes: 89a32a4e76 ("arm64: dts: qcom: db845c: add analog audio support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20210309102025.28405-1-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This moved from being trogdor specific to being part of the general
sc7180.dtsi SoC file in commit 681a607ad2 ("arm64: dts: qcom:
sc7180: Add DisplayPort HPD pin dt node"). Then we dropped the pinconf
from the general sc7180.dtsi file in commit 8d079bf204 ("arm64: dts:
qcom: sc7180: Drop pinconf on dp_hot_plug_det") and added it back to
the trogdor dts file in commit f772081f48 ("arm64: dts: qcom:
sc7180: Add "dp_hot_plug_det" pinconf for trogdor").
As part of this we managed to forget to drop the old copy in the
trogdor dts. Let's do it now.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
[dianders: updated desc]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210311131008.1.I85fc8146c0ee47e261faa0c54dd621467b81952d@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.
This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.
pinctrl_gpio_set_config()
pinctrl_get_device_gpio_range()
pinctrl_match_gpio_range()
Fixes: b7e8f433a6 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-5-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.
This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.
pinctrl_gpio_set_config()
pinctrl_get_device_gpio_range()
pinctrl_match_gpio_range()
Fixes: 16951b490b ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node")
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-4-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.
This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.
pinctrl_gpio_set_config()
pinctrl_get_device_gpio_range()
pinctrl_match_gpio_range()
Fixes: e13c6d144f ("arm64: dts: qcom: sm8150: Add base dts file")
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-3-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.
This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.
pinctrl_gpio_set_config()
pinctrl_get_device_gpio_range()
pinctrl_match_gpio_range()
Fixes: bc2c806293 ("arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node")
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-2-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add cpuidle states for little and big cpus.
The latency values are preliminary placeholders and will be updated
once testing provides the real numbers.
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-14-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add fw reserved memory area for CPUCP (CPUSS control
processor) and AOP (Always ON processor)
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-10-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Adding device node for APPS SMMU available on SC7280 chipset.
This is shared among the multiple client devices such as
display, video, usb, mmc and others.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-9-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add initial device tree support for the sc7280 SoC and the IDP
boards based on this SoC
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add initial DTS for the Snapdragon 888 Mobile Hardware Development Kit,
aka SM8350 HDK. This initial version describes debug UART, UFS storage,
the three USB connectors and remoteprocs.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210308182113.1284966-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
We expect bootloader to full memory details but passing empty values
gives warning, so add a default value
arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dt.yaml: /: memory:
False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-5-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
We expect bootloader to full memory details but passing empty values
gives warning, so add a default value
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: memory:
False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
apq8016-sbc is one of the compaitibles for this board, but is not
documented, so drop it. This fixes these two warns:
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible: ['qcom,apq8016-sbc', 'qcom,apq8016', 'qcom,sbc']
is not valid under any of the given schemas (Possible causes of the failure):
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible: ['qcom,apq8016-sbc', 'qcom,apq8016', 'qcom,sbc'] is too long
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible:0: 'qcom,apq8016-sbc'
is not one of ['qcom,apq8064-cm-qs600', 'qcom,apq8064-ifc6410']
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: /: compatible:0: 'qcom,apq8016-sbc'
is not one of ['qcom,apq8074-dragonboard']
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210308060826.3074234-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
At boot time the following happens:
1. Device core gets ready to probe our SPI driver.
2. Device core applies SPI controller's "default" pinctrl.
3. Device core calls the SPI driver's probe() function which will
eventually setup the chip select GPIO as "unasserted".
Thinking about the above, we can find:
a) For SPI devices that the BIOS inits (Cr50 and EC), the BIOS would
have had them configured as "GENI" pins and not as "GPIO" pins.
b) It turns out that our BIOS also happens to init these pins as
"output" (even though it doesn't need to since they're not muxed as
GPIO) but leaves them at the default state of "low".
c) As soon as we apply the "default" chip select it'll switch the
function to GPIO and stop driving the chip select high (which is
how "GENI" was driving it) and start driving it low.
d) As of commit 9378f46040be ("UPSTREAM: spi: spi-geni-qcom: Use the
new method of gpio CS control"), when the SPI core inits things it
inits the GPIO to be "deasserted". Prior to that commit the GPIO
was left untouched until first use.
e) When the first transaction happens we'll assert the chip select and
then deassert it after done.
So before the commit to change us to use gpio descriptors we used to
have a _really long_ assertion of chip select before our first
transaction (because it got pulled down and then the first "assert"
was a no-op). That wasn't great but (apparently) didn't cause any
real harm.
After the commit to change us to use gpio descriptors we end up
glitching the chip select line during probe. It would go low and then
high with no data transferred. The other side ought to be robust
against this, but it certainly could cause some confusion. It's known
to at least cause an error message on the EC console and it's believed
that, under certain timing conditions, it could be getting the EC into
a confused state causing the EC driver to fail to probe.
Let's fix things to avoid the glitch. We'll add an extra pinctrl
entry that sets the value of the pin to output high (CS deasserted)
before doing anything else. We'll do this in its own pinctrl node
that comes before the normal pinctrl entries to ensure that the order
is correct and that this gets applied before the mux change.
This change is in the trogdor board file rather than in the SoC dtsi
file because chip select polarity can be different depending on what's
hooked up and it doesn't feel worth it to spam the SoC dtsi file with
both options. The board file would need to pick the right one anyway.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: cfbb97fde6 ("arm64: dts: qcom: Switch sc7180-trogdor to control SPI CS via GPIO")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210218145456.1.I1da01a075dd86e005152f993b2d5d82dd9686238@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Using pdc interrupts for USB instead of GIC interrupts to
support wake up in case xo shutdown.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Link: https://lore.kernel.org/r/1594235417-23066-4-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This is a trogdor variant. This is mostly a grab from the downstream
tree with notable exceptions:
- I skip -rev0. This was a super early build and there's no advantage
of long term support.
- I remove sound node since sound hasn't landed upstream yet.
Cc: Gwendal Grignou <gwendal@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Tzung-Bi Shih <tzungbi@chromium.org>
Cc: Judy Hsiao <judyhsiao@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.13.I3d1f5f8a3bf31e8014229df0d4cfdff20e9cc90f@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This is a trogdor variant. This is mostly a grab from the downstream
tree with notable exceptions:
- I skip -rev0. This was a super early build and there's no advantage
of long term support.
- In -rev1 I translate the handling of the USB hub like is done for
similar boards. See the difference between the downstream and
upstream 'sc7180-trogdor-lazor-r0.dts' for an example. This will
need to be resolved when proper support for the USB hub is figured
out upstream.
- I remove sound node since sound hasn't landed upstream yet.
- In incorporate the pending <https://crrev.com/c/2719075> for the
keyboard.
Cc: Philip Chen <philipchen@google.com>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Tzung-Bi Shih <tzungbi@chromium.org>
Cc: Judy Hsiao <judyhsiao@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.12.If93a01b30d20dccacbad4be8ddc519dc20a51a1e@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This is a SKU variant of lazor. Add it. This squashes the downstream
patches to support this hardware.
NOTES:
- The non-touch SKU actually has "innolux,n116bca-ea1" but that driver
is still pending in simple-panel. The bindings have been Acked
though [1]. Things work well enough with the "innolux,n116bge"
timings for now, though.
- The wonky special dts just for "-rev4" arguably doesn't need to go
upstream since they weren't widely distributed, but since a few
people have them we might as well. If it ever causes problems we
can delete it.
[1] https://lore.kernel.org/r/20210115144345.v2.4.I6889e21811df6adaff5c5b8a8c80fda0669ab3a5@changeid
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.11.I556326b24441e22c8c429ce383cc157c7aaef44b@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Lazor rev3 and later use the 'lite' version of the SC7180 SoC.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
[dianders: Adjust commit message which referred to downstream history]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.10.Ia3795e192f5bbe17e6714e45fcb0bf5acdbd4c17@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
For trogdor, in the latest board-2.bin file, new BDF with variant
name GO_LAZOR has been introduced, so we need this property set, for
GO_LAZOR BDF to be picked.
Cc: Philip Chen <philipchen@chromium.org>
Signed-off-by: Abhishek Kumar <kuabhs@chromium.org>
[dianders: adjusted subject line and sort order]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.9.I4a38fe64dd79c54af80d7e4ef5940f8cf4f86e75@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Removed voting for RPMH_RF_CLK2 which is not required as it is
getting managed by BT SoC through SW_CTRL line.
Cc: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Venkata Lakshmi Narayana Gubba <gubbaven@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.8.I80c268f163e6d49a70af1238be442b5de400c579@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Removed the pinctrl and pin{mux,conf} for the control pins because:
1. The only need for them is for userspace control via flash_fp_mcu
2. cros-ec doesn't know what to do with them, and even if it did,
it would interfere with flash_fp_mcu at the most inopportune times
Since we're not using hogs, we rely on AP firmware to set all the
control pins correctly.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Craig Hesling <hesling@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
[dianders: adjusted since coachz isn't upstream yet]
Reviewed-by; Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.7.Ifd7b86f826b18410eada75758a7bca1eebfa336d@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
We only want to use this clk driver on CoachZ devices. Disable it for
all other Trogdor boards. NOTE: CoachZ devices aren't yet supported
upstream so until it is this is just disabled for all trogdor.
Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
[dianders:adjusted since no coachz upstream yet]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.6.I22522b0c9db505ee43ed08e8d5d9e8fe632e7447@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Configure the pen to be a wakeup source only when the pen is ejected
instead of both when the pen is ejected and inserted. This corresponds
to wake source requirements.
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.5.Ib9672bfbe639c96c85408d6f0217a2609eb0b70f@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Let's avoid a bit of duplication by pushing this up to the trogdor.dtsi
file.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.4.I1483fac4c5ae4b2d7660290ff85d69945292618f@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The trackpad interrupt got renamed and also moved to a new GPIO on
newer boards. Let's do the move in the "trogdor.dtsi" file and then
undo it in the two old boards.
NOTE: since none of the new boards have device trees yet, this change
looks silly on its own but it will make sense after more boards are
supported.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.3.Iddf6dc8102aa4fbc3847936226fc7bf2e2cd315c@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
In general pinconf belongs in board files, not SoC files. Move it to
the only current user (trogdor). Also adjust the drive strengths and
pulls.
Cc: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Cc: Tzung-Bi Shih <tzungbi@chromium.org>
Cc: Judy Hsiao <judyhsiao@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.2.Id27e7e6f90c29bf623fa4880e18a14ba1dffd2d2@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Drop the old node and add the new one in its place.
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Cc: Chandan Uddaraju <chandanu@codeaurora.org>
Cc: Vara Reddy <varar@codeaurora.org>
Cc: Tanmay Shah <tanmay@codeaurora.org>
Cc: Rob Clark <robdclark@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
[dianders: Adjusted due to DP not itself not in upstream dts yet]
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.1.Iad06142ceb8426ce5492737bf3d9162ed0dd2b55@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This enabled the four remoteprocs found in SM8350, audio, compute, modem
and sensor for MTP platform and adds firmware for them.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210212115532.1339942-7-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add remoteproc nodes for the audio, compute and sensor cores, define
glink for each one.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210212115532.1339942-6-vkoul@kernel.org
[bjorn: Replaced rpmhpd defines with constants, for now]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
SMP2P is used for interrupting and being interrupted about remoteproc
state changes related to the audio, compute, modem and sensor subsystems.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210212115532.1339942-5-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add the property "regulator-names" to the regulators as given in
schematics so that it is easier to understand the regulators being used
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210204170907.63545-7-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Enabled the UFS node found in SM8350-MTP platform, also add the
regulators associated with UFS HC and UFS phy to these nodes.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210204170907.63545-6-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Enable both USB controllers and associated hsphy and qmp phy nodes
on sm8350 MTP. Designate the usb_1 instance as peripheral-mode only
until proper PMIC based Type-C dual-role handling is supported.
TODO: the second USB controller is exposed to a microAB port. Dual-
role can be supported for this by adding the "usb-role-switch"
property as well as defining a USB connector node with a
"gpio-usb-b-connector" compatible. However, this requires GPIO
support from PM8350 which is still missing.
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Link: https://lore.kernel.org/r/20210116013802.1609-3-jackp@codeaurora.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210204170907.63545-4-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
ARM architected timer interrupts DT property specifies EL2/HYP
physical interrupt and not EL2/HYP virtual interrupt for the 4th
interrupt property. As per interrupt documentation for SM8250 SoC,
the EL2/HYP physical timer interrupt is 10 and EL2/HYP virtual timer
interrupt is 12, so fix the 4th timer interrupt to be EL2 physical
timer interrupt (10 in this case).
Fixes: 60378f1a17 ("arm64: dts: qcom: sm8250: Add sm8250 dts file")
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/744e58f725d279eb2b049a7da42b0f09189f4054.1613468366.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Use the generic DT node name "power-controller" for AOSS message ram
instead of the protocol name QMP(Qualcomm Messaging Protocol) since
it is used for power management requests.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/15005f1441594670adcd60a300c88e41d79cad27.1614669585.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Use the generic DT node name "power-controller" for AOSS message ram
instead of the protocol name QMP(Qualcomm Messaging Protocol) since
it is used for power management requests.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/044fe2e590e166060de65f074df6874ec3a79531.1614669585.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Use the generic DT node name "power-controller" for AOSS message ram
instead of the protocol name QMP(Qualcomm Messaging Protocol) since
it is used for power management requests.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/55416e116dda4aad977bb050451d328b1f6b00d3.1614669585.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Use the generic DT node name "power-controller" for AOSS message ram
instead of the protocol name QMP(Qualcomm Messaging Protocol) since
it is used for power management requests.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/e96d665d1e98b46a189a57e39575ae0debf37172.1614669585.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
On trogdor the ADC thermal monitor is used for monitoring certain
device temperatures. All trogdor boards have at least a thermistor
for the charger temperature, optionally they may have others.
Currently the ADC thermal monitor is configured to use channel 1
for the charger temperature. Given that all trogdor boards have
the charger thermistor it makes more sense to use channel 0,
and then let boards with other thermistors use channels 1, 2, 3,
rather than 0, 2, 3.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210225103330.v2.4.I67e29f2854bad22e3581d6a6e1879b9fc8abbdea@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The trip point configuration of the charger thermal zone for trogdor
is missing a node for the critical trip point. Add the missing node.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Fixes: bb06eb3607 ("arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger thermistor")
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210225103330.v2.3.Ife7768b6b4765026c9d233ad4982da0e365ddbca@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Lazor is stuffed with a 47k NTC as thermistor for the charger
temperature which currently isn't supported by the PM6150 ADC
driver. Disable the charger thermal zone to avoid the use of
bogus temperature values.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20210225103330.v2.2.Ia4c1022191d09fe8c56a16486b77796b83ffcae4@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Some revisions of trogdor boards use a thermistor for the charger
temperature which currently isn't supported by the PM6150 ADC
driver. This results in bogus temperature readings. Add a label
to the charger thermal zone to facilitate disabling of the thermal
zone on affected boards.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210225103330.v2.1.I6a426324db3d98d6cfae8adf2598831bb30bba74@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add pinmux details and device tree node for the EEPROM attached to SPI0
module in main domain.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210309162315.22743-1-a-govindraju@ti.com
TI J7200 has the Cadence OSPI controller for interfacing with OSPI
flashes. Add its node to allow using SPI flashes.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-4-p.yadav@ti.com
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the
frequency to 25 MHz. This is the frequency that the flash has been
successfully tested with in Octal DTR mode. The total performance should
still increase since 8D-8D-8D mode should be at least twice as fast as
1S-1S-8S mode.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-3-p.yadav@ti.com
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the
frequency to 25 MHz. This is the frequency that the flash has been
successfully tested with in Octal DTR mode. The total performance should
still increase since 8D-8D-8D mode should be at least twice as fast as
1S-1S-8S mode.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-2-p.yadav@ti.com
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
Also, update the itap delay values for all the MMCSD subsystems according
the latest J721e data sheet[2]
[1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
[2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf
Fixes: cd48ce86a4 ("arm64: dts: ti: k3-j721e-common-proc-board: Add support for SD card UHS modes")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210305054104.10153-1-a-govindraju@ti.com
Add the DT entry for a watchdog based on RTI1.
On SR1.0 silicon, it requires additional firmware on the MCU R5F cores
to handle the expiry, e.g. https://github.com/siemens/k3-rti-wdt. As
this firmware will also lock the power domain to protect it against
premature shutdown, mark it shared.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
Link: https://lore.kernel.org/r/279c20fa-6e5e-4f88-9cd1-f76297a28a19@web.de
Ethernet switch and MDIO are grouped using "simple-bus". It's not
allowed to use "ethernet-switch" node name as it isn't a switch. Replace
it with "bus".
Fixes: 527a3ac9bd ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM4908 bootloader supports multiple firmware partitions and has its own
bindings defined for them.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There are a few more GPIO connected LEDs there didn't get described
initially.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a DTS file for the Falcon Ethernet sub-board (RTP0RC779A0ETS0010S),
and include it from the main r8a779a0-falcon.dts.
For now its contents are limited to the Board ID EEPROM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210304153257.4059277-4-geert+renesas@glider.be
Add a DTS file for the Falcon CSI/DSI sub-board (RTP0RC779A0DCS0010S),
and include it from the main r8a779a0-falcon.dts.
For now its contents are limited to the Board ID EEPROM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210304153257.4059277-3-geert+renesas@glider.be
Add device nodes for the I2C EEPROMs on the Falcon CPU and BreakOut
boards.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210304153257.4059277-2-geert+renesas@glider.be
Now all Salvator-X(S) SoC/board combinations have support for HDMI
sound, all HDMI0 connector and sound descriptions are identical.
Replace them by shared descriptions in salvator-common.dtsi, to reduce
duplication.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/20210303140529.3941670-1-geert+renesas@glider.be
BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI
and XHCI. It requires powering up using the PMB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the DT nodes for the ICSSG0 and ICSSG1 processor subsystems that are
present on the K3 J721E SoCs. The two ICSSGs are identical to each other
for the most part, with the ICSSG1 supporting slightly enhanced features
for supporting SGMII PRU Ethernet. Each ICSSG instance is represented by
a PRUSS subsystem node and other child nodes. These nodes are enabled by
default.
The ICSSGs on K3 J721E SoCs are revised versions of the ICSSG on the first
AM65x SR1.0 SoCs. The PRU IRAMs are slightly smaller, and the IP includes
two new auxiliary PRU cores called Tx_PRUs. The Tx_PRUs have 6 KB of IRAMs
and leverage the same host interrupts as the regular PRU cores. All The
ICSSG host interrupts intended towards the main Arm core are also shared
with other processors on the SoC, and can be partitioned as per system
integration needs.
The ICSSG subsystem node contains the entire address space. The various
sub-modules of the ICSSG are represented as individual child nodes (so
platform devices themselves) of the PRUSS subsystem node. These include
the two PRU cores, two RTU cores, two Tx_PRU cores and the interrupt
controller. All the Data RAMs are represented within a child node of
its own named 'memories' without any compatible. The Real Time Media
Independent Interface controller (MII_RT), the Gigabit capable MII_G_RT
and the CFG sub-module are represented as syscon nodes. The ICSSG CFG
sub-module provides two internal clock muxes, and these are represented
as children of the CFG child node 'clocks' by the 'coreclk-mux' and
iepclk-mux' clk nodes. The default parents for these mux clocks are also
defined using the assigned-clock-parents property.
The DT nodes use all standard properties. The regs property in the
PRU/RTU/Tx_PRU nodes define the addresses for the Instruction RAM, the
Debug and Control sub-modules for that PRU core. The firmware for each
PRU/RTU/Tx_PRU core is defined through a 'firmware-name' property.
The default names for the firmware images for each PRU, RTU and Tx_PRU
cores are defined as follows (these can be adjusted either in derivative
board dts files or through sysfs at runtime if required):
ICSSG0 PRU0 Core : j7-pru0_0-fw ; PRU1 Core : j7-pru0_1-fw
ICSSG0 RTU0 Core : j7-rtu0_0-fw ; RTU1 Core : j7-rtu0_1-fw
ICSSG0 Tx_PRU0 Core : j7-txpru0_0-fw ; Tx_PRU1 Core : j7-txpru0_1-fw
ICSSG1 PRU0 Core : j7-pru1_0-fw ; PRU1 Core : j7-pru1_1-fw
ICSSG1 RTU0 Core : j7-rtu1_0-fw ; RTU1 Core : j7-rtu1_1-fw
ICSSG1 Tx_PRU0 Core : j7-txpru1_0-fw ; Tx_PRU1 Core : j7-txpru1_1-fw
Note:
1. The ICSSG INTC on J721E SoCs share all the host interrupts with other
processors, so use the 'ti,irqs-reserved' property in derivative board
dts files _if_ any of them should not be handled by the host OS.
2. There are few more sub-modules like the Industrial Ethernet Peripherals
(IEPs), MDIO, PWM, UART that do not have bindings and so will be added
in the future.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210304160712.8452-3-s-anna@ti.com
Add the DT nodes for the ICSSG0, ICSSG1 and ICSSG2 processor subsystems
that are present on the K3 AM65x SoCs. The three ICSSGs are identical
to each other for the most part, with the ICSSG2 supporting slightly
enhanced features for supporting SGMII PRU Ethernet. Each ICSSG instance
is represented by a PRUSS subsystem node. These nodes are enabled by
default.
The ICSSGs on K3 AM65x SoCs are super-sets of the PRUSS on the AM57xx/
6AK2G SoCs except for larger Shared Data RAM and the lack of a PRU-ICSS
crossbar. They include two auxiliary PRU cores called RTUs and few other
additional sub-modules. The interrupt integration is also different on
the K3 AM65x SoCs and are propagated through various SoC-level Interrupt
Router and Interrupt Aggregator blocks. The AM65x SR2.0 SoCs have a
revised ICSSG IP that is based off the subsequent IP used on J721E SoCs,
and has two new auxiliary PRU cores called Tx_PRUs. The Tx_PRUs have 6 KB
of IRAMs and leverage the same host interrupts as the regular PRU cores.
The Broadside (BS) RAM within each core is also sized differently w.r.t
SR1.0.
The ICSSG subsystem node contains the entire address space. The various
sub-modules of the ICSSG are represented as individual child nodes (so
platform devices themselves) of the PRUSS subsystem node. These include
the various PRU cores and the interrupt controller. All the Data RAMs
are represented within a child node of its own named 'memories' without
any compatible. The Real Time Media Independent Interface controllers
(MII_RT and MII_G_RT), and the CFG sub-module are represented as syscon
nodes. The ICSSG CFG module has clock muxes for IEP clock and CORE clock,
these clk nodes are added under the CFG child node 'clocks'. The default
parents for these mux clocks are also assigned.
The DT nodes use all standard properties. The regs property in the
PRU/RTU/Tx_PRU nodes define the addresses for the Instruction RAM, the
Debug and Control sub-modules for that PRU core. The firmware for each
PRU/RTU/Tx_PRU core is defined through a 'firmware-name' property.
The default names for the firmware images for each PRU, RTU and Tx_PRU
cores are defined as follows (these can be adjusted either in derivative
board dts files or through sysfs at runtime if required):
ICSSG0 PRU0 Core : am65x-pru0_0-fw ; PRU1 Core : am65x-pru0_1-fw
ICSSG0 RTU0 Core : am65x-rtu0_0-fw ; RTU1 Core : am65x-rtu0_1-fw
ICSSG0 Tx_PRU0 Core : am65x-txpru0_0-fw ; Tx_PRU1 Core : am65x-txpru0_1-fw
ICSSG1 PRU0 Core : am65x-pru1_0-fw ; PRU1 Core : am65x-pru1_1-fw
ICSSG1 RTU0 Core : am65x-rtu1_0-fw ; RTU1 Core : am65x-rtu1_1-fw
ICSSG1 Tx_PRU0 Core : am65x-txpru1_0-fw ; Tx_PRU1 Core : am65x-txpru1_1-fw
ICSSG2 PRU0 Core : am65x-pru2_0-fw ; PRU1 Core : am65x-pru2_1-fw
ICSSG2 RTU0 Core : am65x-rtu2_0-fw ; RTU1 Core : am65x-rtu2_1-fw
ICSSG2 Tx_PRU0 Core : am65x-txpru2_0-fw ; Tx_PRU1 Core : am65x-txpru2_1-fw
Note:
1. The ICSSG nodes are all added as per the SR2.0 device. Any sub-module IP
differences need to be handled within the driver using SoC device match
logic or separate dts/overlay files (if needs to be supported) with the
Tx_PRU nodes expected to be disabled at the minimum.
2. The ICSSG INTC on AM65x SoCs share 5, 6, 7 host interrupts with other
processors, so use the 'ti,irqs-reserved' property in derivative board
dts files _if_ any of them should not be handled by the host OS.
3. There are few more sub-modules like the Industrial Ethernet Peripherals
(IEPs), MDIO, PWM, UART that do not have bindings and so will be added
in the future.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210304160712.8452-2-s-anna@ti.com
On am642-evm the CPSW3g ext. Port1 is directly connected to TI DP83867 PHY
and Port2 is connected to TI DP83869 PHY which is shared with ICSS
subsystem. The TI DP83869 PHY MII interface is configured using pinmux for
CPSW3g, while MDIO bus is connected through GPIO controllable 2:1 TMUX154E
switch (MDIO GPIO MUX) which has to be configured to route MDIO bus from
CPSW3g to TI DP83869 PHY.
Hence add networking support for am642-evm:
- add CPSW3g MDIO and RGMII pinmux entries for both ext. ports;
- add CPSW3g nodes;
- add mdio-mux-multiplexer DT nodes to represent above topology.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210304211038.12511-4-grygorii.strashko@ti.com
Add CPSW3g DT node with two external ports, MDIO and CPTS support. For
CPSW3g DMA channels the ASEL is set to 15 (AM642x per DMA channel coherency
feature), so that CPSW DMA channel participates in Coherency and thus avoid
need to cache maintenance for SKBs. This improves bidirectional TCP
performance by up to 100Mbps (on 1G link).
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210304211038.12511-2-grygorii.strashko@ti.com
AM642 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM642 SoC. It supports the following interfaces:
* 2 GB LPDDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode
* x1 USB 3.0 Type-A port
* x1 UHS-1 capable µSD card slot
* 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837
* 512 Mbit OSPI flash
* x2 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin Raspberry Pi compatible GPIO header
* 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO)
* 54-pin header for Programmable Realtime Unit (PRU) IO pins
* Interface for remote automation. Includes:
* power measurement and reset control
* boot mode change
Add basic support for AM642 SK.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210226184251.26451-3-lokeshvutla@ti.com
The AM642 EValuation Module (EVM) is a board that provides access to
various peripherals available on the AM642 SoC, such as PCIe, USB 2.0,
CPSW Ethernet, ADC, and more.
Introduce support for the AM642 EVM to enable mmc boot, including
enabling UART and I2C on the board.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-6-d-gerlach@ti.com
Add the nodes for DMSS INTA, BCDMA and PKTDMA to enable the use of the
DMAs in the system.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-5-d-gerlach@ti.com
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
peripherals.
* Centralized System Controller for Security, Power, and Resource
Management (DMSC).
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Introduce basic support for the AM642 SoC to enable ramdisk or MMC
boot. Introduce the sdhci, i2c, spi, and uart MAIN domain periperhals
under cbass_main and the i2c, spi, and uart MCU domain periperhals
under cbass_mcu.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-4-d-gerlach@ti.com
The function of_i2c_get_board_info will call of_modalias_node to check
if a device_node contains "compatible" string. But for the device si5328
at zcu102/zcu106 boards, there is no proper DT bindings for them. So remove
si5328 device nodes from dts files to eliminate the error info in the boot
message:
i2c i2c-10: of_i2c: modalias failure on /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69
i2c i2c-10: Failed to create I2C device for /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The DisplayPort DMA controller (DPDMA) is located in the same power
domain as the DisplayPort Subsystem (DPSUB). Specify the power domain in
the device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210306230915.14979-1-laurent.pinchart@ideasonboard.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On boards where the only peripheral connected to PL0/PL1 is an X-Powers
PMIC, configure the connection to use the RSB bus rather than the I2C
bus. Compared to the I2C controller that shares the pins, the RSB
controller allows a higher bus frequency, and it is more CPU-efficient.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210103100007.32867-5-samuel@sholland.org
After the commit 7320915c88 ("mmc: Set PROBE_PREFER_ASYNCHRONOUS
for drivers that existed in v4.14"), the order of /dev/mmcblkN
was not fixed in some SoCs which have multiple sdhi controllers.
So, we were hard to use an sdhi device as rootfs by using
the kernel parameter like "root=/dev/mmcblkNpM".
According to the discussion on a mainling list [1], we can add
mmc aliases to fix the issue. So, add such aliases into Renesas
arm64 board dts files. Notes that mmc0 is an eMMC channel if
available.
[1]
https://lore.kernel.org/linux-arm-kernel/CAPDyKFptyEQNJu8cqzMt2WRFZcwEdjDiytMBp96nkoZyprTgmA@mail.gmail.com/
Fixes: 7320915c88 ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.14")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1614596786-22326-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
To improve human readability and enable automatic validation, the tuples
in "playback" and "capture" properties in sound device nodes should be
grouped using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210204130517.1647073-5-geert+renesas@glider.be
The dtschema expects pclk (APB clock) followed by aclk (AXI/AHB clock):
arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
slim-sss@11140000: clock-names:0: 'pclk' was expected
arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
slim-sss@11140000: clock-names:1: 'aclk' was expected
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20210212163729.69882-1-krzk@kernel.org
All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.
In addition to the external NMI input, which is already routed through
r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The binding of R_INTC was updated to allow specifying interrupts other
than the external NMI, since routing those interrupts through the R_INTC
driver allows using them for wakeup.
Update the device trees to use the new binding.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Quite an active release for driver specific updates but very little
going on at the subsystem level this time for the regulator API.
- Overhaul of the Qualcomm LABIBB driver.
- Allow use of regulator_sync_voltage() on coupled regulators.
- Support for Action ATC260x, Mediatek DVSRC and MT6315, Qualcomm
PCM8180/c and PM8009-1 and Richtek RT4831
- Removal of the AB3100 driver.
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Merge tag 'regulator-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"Quite an active release for driver specific updates but very little
going on at the subsystem level this time for the regulator API.
Summary:
- Overhaul of the Qualcomm LABIBB driver.
- Allow use of regulator_sync_voltage() on coupled regulators.
- Support for Action ATC260x, Mediatek DVSRC and MT6315, Qualcomm
PCM8180/c and PM8009-1 and Richtek RT4831
- Removal of the AB3100 driver"
* tag 'regulator-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (49 commits)
regulator: bd718x7, bd71828, Fix dvs voltage levels
regulator: pca9450: Add sd-vsel GPIO
regulator: pca9450: Enable system reset on WDOG_B assertion
regulator: pca9450: Add SD_VSEL GPIO for LDO5
regulator: qcom-rpmh: fix pm8009 ldo7
regulator: mt6315: Add support for MT6315 regulator
regulator: document binding for MT6315 regulator
regulator: dt-bindings: Document charger-supply for max8997
regulator: qcom-labibb: Use disable_irq_nosync from isr
regulator: pf8x00: Fix typo for PF8200 chip name
regulator: pf8x00: set ramp_delay for bucks
regulator: core: Avoid debugfs: Directory ... already present! error
regulator: pf8x00: Add suspend support
regulator: Make regulator_sync_voltage() usable by coupled regulators
regulator: s5m8767: Drop regulators OF node reference
regulator: qcom-rpmh: Add pmc8180 and pmc8180c
regulator: qcom-rpmh: Add pmc8180 and pmc8180c
regulator: s5m8767: Fix reference count leak
regulator: remove ab3100 driver
regulator: axp20x: Fix reference cout leak
...
Here is the big set of USB and Thunderbolt driver changes for 5.12-rc1.
It's been an active set of development in these subsystems for the past
few months:
- loads of typec features added for new hardware
- xhci features and bugfixes
- dwc3 features added for more hardware support
- dwc2 fixes and new hardware support
- cdns3 driver updates for more hardware support
- gadget driver cleanups and minor fixes
- usb-serial fixes, new driver, and more devices supported
- thunderbolt feature additions for new hardware
- lots of other tiny fixups and additions
The chrome driver changes are in here as well, as they depended on some
of the typec changes, and the maintainer acked them.
All of these have been in linux-next for a while with no reported
issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB and Thunderbolt updates from Greg KH:
"Here is the big set of USB and Thunderbolt driver changes for
5.12-rc1.
It's been an active set of development in these subsystems for the
past few months:
- loads of typec features added for new hardware
- xhci features and bugfixes
- dwc3 features added for more hardware support
- dwc2 fixes and new hardware support
- cdns3 driver updates for more hardware support
- gadget driver cleanups and minor fixes
- usb-serial fixes, new driver, and more devices supported
- thunderbolt feature additions for new hardware
- lots of other tiny fixups and additions
The chrome driver changes are in here as well, as they depended on
some of the typec changes, and the maintainer acked them.
All of these have been in linux-next for a while with no reported
issues"
* tag 'usb-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (300 commits)
dt-bindings: usb: mediatek: musb: add mt8516 compatbile
dt-bindings: usb: mtk-xhci: add compatible for mt2701 and mt7623
dt-bindings: usb: mtk-xhci: add optional assigned clock properties
Documentation: connector: Update the description of sink-vdos
usb: misc: usb3503: Fix logic in usb3503_init()
dt-bindings: usb: usb-device: fix typo in required properties
usb: Replace lkml.org links with lore
dt-bindings: usb: dwc3: add description for rk3328
dt-bindings: usb: convert rockchip,dwc3.txt to yaml
usb: quirks: add quirk to start video capture on ELMO L-12F document camera reliable
USB: quirks: sort quirk entries
USB: serial: drop bogus to_usb_serial_port() checks
USB: serial: make remove callback return void
USB: serial: drop if with an always false condition
usb: gadget: Assign boolean values to a bool variable
usb: typec: tcpm: Get Sink VDO from fwnode
dt-bindings: connector: Add SVDM VDO properties
usb: typec: displayport: Fill the negotiated SVDM Version in the header
usb: typec: ucsi: Determine common SVDM Version
usb: typec: tcpm: Determine common SVDM Version
...
There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use [1], and
received confirmation about six ARM platforms and the TI C6x architecture
that have all reached the end of their life upstream, with no known
users remaining:
- efm32 -- added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell -- added in 2011, abandoned after 2012 acquisition
- prima2 -- added in 20111, no notable changes since 2015
- tango -- added in 2015, sporadic changes until 2017, but abandoned
- u300 -- added in 2009, no notable changes since 2013
- zx --added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x -- added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users
that plan to contribute them in the future, in other cases the code
is complete and works reliably.
[1] https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform removals from Arnd Bergmann:
"There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use, and
received confirmation about six ARM platforms and the TI C6x
architecture that have all reached the end of their life upstream,
with no known users remaining:
- efm32 - added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell - added in 2011, abandoned after 2012 acquisition
- prima2 - added in 20111, no notable changes since 2015
- tango - added in 2015, sporadic changes until 2017, but abandoned
- u300 - added in 2009, no notable changes since 2013
- zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x - added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users that
plan to contribute them in the future, in other cases the code is
complete and works reliably"
Link: https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
* tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: remove u300 platform
ARM: remove tango platform
ARM: remove zte zx platform
ARM: remove sirf prima2/atlas platforms
c6x: remove architecture
MAINTAINERS: Remove deleted platform efm32
ARM: drop efm32 platform
ARM: Remove PicoXcell platform support
ARM: dts: Remove PicoXcell platforms
There are only two remaining non-urgent ARM SoC bug fixes that
could still apply for v5.11, or for the v5.12 merge window:
- A build fix for the Atmel SAM9 platform to allow building
with the clang integrated assembler
- A DT fix for ethernet on Intel SoCFPGA, this has been broken
since it was added in v5.4.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-fixes-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"There are only two left-over remaining non-urgent ARM SoC bug fixes:
- A build fix for the Atmel SAM9 platform to allow building with the
clang integrated assembler
- A DT fix for ethernet on Intel SoCFPGA, this has been broken since
it was added in v5.4"
* tag 'arm-fixes-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: at91: use proper asm syntax in pm_suspend
arm64: dts: agilex: fix phy interface bit shift for gmac1 and gmac2
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file.
And enable this node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
CM3 SRAM address space will be used for Flow Control configuration.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
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Merge tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards: Radxa Rock Pi E, NanoPi M4B
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
* tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (24 commits)
arm64: dts: rockchip: more user friendly name of sound nodes
arm64: dts: rockchip: rename pinctrl nodename to gmac2io for nanopi-r2s board
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3368 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3308 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boards
arm64: dts: rockchip: cleanup cpu_thermal node of rk3399-rock960.dts
arm64: dts: rockchip: Remove bogus "amba" bus nodes
arm64: dts: rockchip: Light "sys" LED on NanoPi R2S
arm64: dts: rockchip: fix ranges property format for rk3399 pcie node
arm64: dts: rockchip: Rely on SoC external pull up on pmic-int-l on Helios64
arm64: dts: rockchip: Add NanoPi M4B board
arm64: dts: rockchip: Move ep-gpios property to nanopc-t4 from nanopi4
arm64: dts: rockchip: Add NFC node for PX30 SoC
arm64: dts: rockchip: Add NFC node for RK3308 SoC
arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E
dt-bindings: arm: rockchip: Add Radxa ROCK Pi E
arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy node
arm64: dts: rockchip: rename thermal subnodes for rk3399
arm64: dts: rockchip: rename thermal subnodes for rk3368
arm64: dts: rockchip: add SPDIF node for rk3399-rockpro64
...
Link: https://lore.kernel.org/r/12699743.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.
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Merge tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.12:
- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.
* tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (71 commits)
arm64: dts: imx: Add i.mx8mm nitrogen basic dts support
arm64: dts: zii-rmb3: enable RMI4 reduced reporting
arm64: dts: zii-ultra: only trigger IRQ on falling edge ucs1002 ALERT pin
arm64: dts: zii-ultra: limit USB ports to USB2 speed
arm64: dts: zii-ultra: fix i2c pin configuration
arm64: dts: zii-ultra: add sound support
arm64: dts: ls1028a: Enable flexcan support for LS1028A-RDB/QDS
arm64: dts: ls1028a: Update flexcan properties
arm64: dts: lx2160a: Add flexcan support
arm64: dts: fsl-ls1012a-frdm: add spi-uart device
arm64: dts: fsl-ls1012a-rdb: add i2c devices
arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM
arm64: dts: imx8mn: Add fspi node
arm64: dts: Add Librem5 Evergreen
arm64: dts: imx8mq-librem5: set regulators boot-on
arm64: dts: imx8mq-librem5: enable the LCD panel
arm64: dts: imx8mq-librem5: Add LCD_1V8 regulator
arm64: dts: imx8mq-librem5: Add usb-c chip as supplier for the charger
arm64: dts: imx8mq-librem5: Don't mark buck3 as always on
arm64: dts: imx8mq-librem5: Mark charger IRQ as High-Z
...
Link: https://lore.kernel.org/r/20210204120150.26186-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
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Merge tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.12:
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
* tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits)
ARM: dts: imx6: RDU2: adjust audio devices nomenclature
ARM: dts: imx6: RDU2: only trigger IRQ on falling edge ucs1002 ALERT pin
ARM: dts: imx6: RDU2: enable RMI4 reduced reporting
ARM: dts: imx6: RDU2: reduce i2c drive-strength
ARM: dts: imx6: rdu2: enable WDOG1
ARM: dts: imx6-sr-som: increase at8035 PHY gigabit Tw parameter
ARM: dts: imx6: add wakeup support via magic packet
firmware: imx: select SOC_BUS to fix firmware build
arm64: dts: imx8mp: Correct the gpio ranges of gpio3
ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
ARM: dts: imx: e60k02: add second uart
ARM: dts: imx6sl-tolino-shine3: correct console uart pinmux
ARM: dts: imx6sl-tolino-shine2hd: add second uart
ARM: dts: imx6sl-tolino-shine2hd: correct console uart pinmux
ARM: imx: build suspend-imx6.S with arm instruction set
ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
ARM: dts: add Kverneland TGO board
ARM: dts: add Kverneland UT1, UT1Q and UT1P
ARM: dts: imx6ul-14x14-evk: Add camera support
ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset
...
Link: https://lore.kernel.org/r/20210204120150.26186-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces initial support for the new SM8350 platform, aka
Snapdragon 888, and the MTP device for this.
It adds PCIe, audio, display, GPU, HDMI watchdog, LLCC and PMIC ADC
support to the SM8250 platform and RB5 in particular, as well as improve
the definition of CPUs, thermal zones and fixes a few smaller issues.
It introduces new Devicetree files for the Alcatel Idol 3, ASUS Zenfone
2 Laser and BQ Aquaris X5, based on the MSM8916 platform.
It contains an overhaul of the existing MSM8992 and MSM8994 platform
files and introduces RPM power domains and SMP2P nodes. It adds
touchscreen, additional regulators, microSD card support and adds the
Sony Mobile Ivy, Karin, Suzuran and Satsuki devices. It joins the common
parts of the Lumia 950 and 950XL and extend these with support for
sensors, NFC, bluetooth, audio, microSD and Type-C mux pins.
It introduces support for the OnePlus6 and 6t, adds the missing higher
frequences for the SDM850 laptops, adds CPU cluster idle support on
SM8150 and a few tweaks to the SC7180 platform.
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Merge tag 'qcom-arm64-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for 5.12
This introduces initial support for the new SM8350 platform, aka
Snapdragon 888, and the MTP device for this.
It adds PCIe, audio, display, GPU, HDMI watchdog, LLCC and PMIC ADC
support to the SM8250 platform and RB5 in particular, as well as improve
the definition of CPUs, thermal zones and fixes a few smaller issues.
It introduces new Devicetree files for the Alcatel Idol 3, ASUS Zenfone
2 Laser and BQ Aquaris X5, based on the MSM8916 platform.
It contains an overhaul of the existing MSM8992 and MSM8994 platform
files and introduces RPM power domains and SMP2P nodes. It adds
touchscreen, additional regulators, microSD card support and adds the
Sony Mobile Ivy, Karin, Suzuran and Satsuki devices. It joins the common
parts of the Lumia 950 and 950XL and extend these with support for
sensors, NFC, bluetooth, audio, microSD and Type-C mux pins.
It introduces support for the OnePlus6 and 6t, adds the missing higher
frequences for the SDM850 laptops, adds CPU cluster idle support on
SM8150 and a few tweaks to the SC7180 platform.
* tag 'qcom-arm64-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (100 commits)
arm64: dts: qcom: msm8998: Use rpmpd definitions for opp table levels
arm64: dts: qcom: msm8996: Add missing device_type under pcie[01]
arm64: dts: qcom: sc7180: Add support for gpu fuse
arm64: dts: qcom: msm8998: Disable some components by default
arm64: dts: qcom: msm8998: Add capacity-dmips-mhz to CPU cores
arm64: dts: qcom: msm8998: Add I2C pinctrl and fix BLSP2_I2C naming
arm64: dts: qcom: msm8998: Add DMA to I2C hosts
arm64: dts: qcom: msm8998: Merge in msm8998-pins.dtsi to msm8998.dtsi
arm64: dts: msm8916: Fix reserved and rfsa nodes unit address
arm64: dts: qcom: msm8994-octagon: Add AD7147 and APDS9930 sensors
arm64: dts: qcom: msm8994-octagon: Add TAS2553 codec
arm64: dts: qcom: msm8994-octagon: Add sensors on blsp1_i2c5
arm64: dts: qcom: msm8994-octagon: Add NXP NFC node
arm64: dts: qcom: msm8994-octagon: Add FM Radio and DDR regulator nodes
arm64: dts: qcom: msm8994-octagon: Configure PON keys
arm64: dts: qcom: msm8994-octagon: Configure Lattice iCE40 FPGA
arm64: dts: qcom: msm8994-octagon: Add uSD card and disable HS400 on eMMC
arm64: dts: qcom: msm8994-octagon: Configure HD3SS460 Type-C mux pins
arm64: dts: qcom: msm8994-octagon: Add QCA6174 bluetooth
arm64: dts: qcom: msm8994-octagon: Configure regulators
...
Link: https://lore.kernel.org/r/20210204052043.388621-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ODROID-HC4 is a derivative of the C4 with minor differences:
- 16MB XT25F128B SPI-NOR flash
- 2x SATA ports via ASM1061 PCIe to SATA controller
- 7-pin header with SPI and I2C for 1-inch OLED display and RTC
- 1x USB 2.0 host port
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210202021021.11068-6-christianshewitt@gmail.com
Convert the ODROID-C4 dts to meson-sm1-odroid.dtsi and C4 board dts in
preparation for adding additional C4 family boards.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210202021021.11068-4-christianshewitt@gmail.com
The shift for the phy_intf_sel bit in the system manager for gmac1 and
gmac2 should be 0.
Fixes: 2f804ba7aa ("arm64: dts: agilex: Add SysMgr to Ethernet nodes")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Enable the onboard pcf8563 rtc hardware on ODROID N2/N2+ boards via the
common dtsi. Also add aliases to ensure vrtc does not claim /dev/rtc0.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210111135831.2218-1-christianshewitt@gmail.com
The node names for devices using the pwm-leds driver follow a certain
naming scheme (now). Parent node name is not enforced, but recommended
by DT project.
Signed-off-by: Alexander Dahl <post@lespocky.de>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201228163217.32520-5-post@lespocky.de
The dt-bindings/power/qcom-rpmpd.h header is being included in this
DT but the RPMPD OPP table declarations were using open-coded values:
use the definitions found in the aforementioned header.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109160759.186990-1-angelogioacchino.delregno@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Some components (like PCIe) are not used on all devices and
with a certain firmware configuration they might end up triggering
a force reboot or a Synchronous Abort.
This commit brings no functional difference as the nodes are
enabled on devices which didn't disable them previously.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163001.146867-6-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add capacity-dmips-mhz to ensure the scheduler can efficiently
make use of the big.LITTLE core configuration.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163001.146867-5-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The BLSP2-connected interfaces started from 0 which is.. misleading
to say the least.. the clock names corresponding to these started
from 1, so let's align to that so as to reduce confusion.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163001.146867-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add DMA properties to I2C hosts to allow for DMA transfers.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163001.146867-3-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This is the usual way of handling pin configuration upstream now, so
align to it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109163001.146867-2-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
FAN53526 and SI470X are both connected over blsp2_i2c5. Configure them.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-15-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Both the power key and the vol- key are connected over PON.
Configure them.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-14-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Lumia 950/XL, like other phones, ship with different storage chips.
Some of them are not capable of stable operation at HS400. Disable it.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-12-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The driver is not available yet, so hardcode the pins.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-11-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Configure the regulators to ensure proper voltages across
the board.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-9-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This enables tje hardware keys as well as the Hall sensor.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-8-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Windows-based devices have a far different memory map than
the standard LA one.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-7-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Lumia 950 and 950XL are both based on the Octagon board, sharing
the vast majority of components, configuration etc. Commonize it.
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-6-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This saves a good thousand lines of code, perhaps even
more in the long run.
Co-developed-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-5-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
* Move 35500 clock-frequency to kitakami (turns out it's a Sony specific)
* Add missing interfaces
* Fix the naming scheme
* Fix up pin assignments to make all BLSPs work
* Add DMA where previously omitted
Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-3-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
MSM8916 has another I2C QUP controller that can be enabled on
GPIO 10 and 11.
Add blsp_i2c3 to msm8916.dtsi and disable it by default.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-3-jonathan.albrieux@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
BQ Aquaris X5 (Longcheer L8910) is a smartphone using the MSM8916 SoC.
Add device tree with initial support for:
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- Regulators
- WiFi/BT
- Volume buttons
- Vibrator
- Touchkeys backlight
This device tree is based on downstream device tree from BQ and from
Longcheer L8915 device tree.
Co-developed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Link: https://lore.kernel.org/r/20210125094435.7528-2-jonathan.albrieux@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
RB5 has 3 PCIe ports exposed to connect PCIe client devices. PCIe0 is
connected to QCA6391 chipset and others are available on the HS3
expansion connector. Hence, enable all of them.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210127234221.947306-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add PCIe support for Qcom SM8250 SoC. This SoC has 3 PCIe Gen 3
instances based on Designware IP, out of which PCIe0 has 1 lane support
and the rest have 2 lane support.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[DB: add ddrss_sf_tbu clock]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210127234221.947306-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Disable MDSS (Mobile Display Subsystem) by default in msm8916.dtsi
and only explicitly enable it in devices' DT which actually use it.
This leads to faster boot and cleaner logs for other devices,
which also won't have to explicitly disable MDSS to use framebuffer.
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-4-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The Alcatel Idol 3 (4.7") is a smartphone based on MSM8916.
Add a device tree with support for USB, eMMC, SD-Card, WiFi,
BT, power/volume buttons, vibrator and the following sensors:
magnetometer, accelerometer, gyroscope, ambient light+proximity
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Link: https://lore.kernel.org/r/20210130105717.2628781-3-vincent.knecht@mailoo.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
- rename u-boot mtd partition to a53-firmware on Turris Mox (Armada 3720 based)
- improve SDHCI support on AP807 based board
- move SATA comphy into main armada-37xx.dtsi
- add Armada 8K/7K PWM support
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Merge tag 'mvebu-dt64-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.12 (part 1)
- rename u-boot mtd partition to a53-firmware on Turris Mox (Armada 3720 based)
- improve SDHCI support on AP807 based board
- move SATA comphy into main armada-37xx.dtsi
- add Armada 8K/7K PWM support
* tag 'mvebu-dt64-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: armada: add pwm offsets for ap/cp gpios
arm64: dts: marvell: armada-37xx: Add SATA comphy into main armada-37xx.dtsi file
arm64: dts: cn913x-db: enable MMC HS400
arm64: dts: change AP807 SDHCI compatibility string
arm64: dts: armada-3720-turris-mox: rename u-boot mtd partition to a53-firmware
Link: https://lore.kernel.org/r/87pn1jn48s.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.12 please pull the following:
- Rafal continues to add support for the 4906/4908 SoC family and adds
a Device Tree for the Netgear R8000P router (4906-based), describes
the NAND controller of the 4908 more appropriately (based on the older
63138 DSL SoC), describes the 4908 PCIe reset controller, internal
Ethernet switch (Starfighter 2 switch) and finally the Power
Management Bus (PMB)
- Scott removes all of the SATA-related Device Tree nodes since SATA
is unused on the Stingray product line
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Merge tag 'arm-soc/for-5.12/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.12 please pull the following:
- Rafal continues to add support for the 4906/4908 SoC family and adds
a Device Tree for the Netgear R8000P router (4906-based), describes
the NAND controller of the 4908 more appropriately (based on the older
63138 DSL SoC), describes the 4908 PCIe reset controller, internal
Ethernet switch (Starfighter 2 switch) and finally the Power
Management Bus (PMB)
- Scott removes all of the SATA-related Device Tree nodes since SATA
is unused on the Stingray product line
* tag 'arm-soc/for-5.12/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Remove SATA from Stingray
arm64: dts: broadcom: bcm4908: describe PMB block
arm64: dts: broadcom: bcm4908: describe internal switch
arm64: dts: broadcom: bcm4908: describe PCIe reset controller
arm64: dts: broadcom: bcm4908: use proper NAND binding
arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P DTS files
dt-bindings: arm: bcm: document Netgear R8000P binding
Link: https://lore.kernel.org/r/20210131221721.685974-4-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
adding:
- DT fixes spotted through the schemas
- Mali Support for the A10s/A13/GR8/R8
- MMC improvements for the A64 and H6
- New board: SL631 Action Camera, PineTab Early Adopter
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Merge tag 'sunxi-dt-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of patches to support the Allwinner SoCs, this time
adding:
- DT fixes spotted through the schemas
- Mali Support for the A10s/A13/GR8/R8
- MMC improvements for the A64 and H6
- New board: SL631 Action Camera, PineTab Early Adopter
* tag 'sunxi-dt-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (47 commits)
ARM: dts: sunxi: Rename nmi_intc to r_intc
ARM: dts: sun8i: h2-plus: bananapi-m2-zero: Increase BT UART speed
ARM: dts: sunxi: bananapi-m2-plus: Increase BT UART speed
arm64: dts: allwinner: pine-h64: Fix typos in BT GPIOs
arm64: dts: allwinner: pinetab: Fix the panel compatible
arm64: dts: allwinner: pinephone: Remove useless light sensor supplies
arm64: dts: allwinner: h6: Use - instead of @ for DT OPP entries
ARM: dts: sun8i-a33: sina33: Add missing panel power supply
ARM: dts: sun8i-a83t: Remove empty CSI port
ARM: dts: sun8i-s3: pinecube: Fix CSI DTC warnings
ARM: dts: sun8i-s3: impetus: Fix the USB PHY ID detect GPIO properties
ARM: dts: sun8i: nanopi-r1: Fix GPIO regulator state array
ARM: dts: sun6i: primo81: Remove useless io-channel-cells
ARM: dts: sunxi: Fix CPU thermal zone node name
ARM: dts: sunxi: Add missing backlight supply
ARM: dts: sunxi: Fix the LED node names
dt-bindings: rtc: sun6i-a31-rtc: Loosen the requirements on the clocks
dt-bindings: iio: adc: Add AXP803 compatible
dt-bindings: sunxi: Fix the pinecube compatible
ARM: dts: sun8i-v3s: Add CSI0 MCLK pin definition
...
Link: https://lore.kernel.org/r/48511540-fdd6-4fbe-8037-ec9fa8436147.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch changes device name to more user friendly name of
Analog and SPDIF sound nodes for rk3399-rockpro64.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Link: https://lore.kernel.org/r/20210110151913.3615326-1-katsuhiro@katsuster.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives this error:
/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dt.yaml:
ethernet-phy: 'reg' is a required property
The pinctrl nodename "ethernet-phy" conflicts with the rules
in the "ethernet-phy.yaml" document, so rename it to "gmac2io".
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/ethernet-phy.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210110194851.10207-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Recently introduced async probe on mmc devices can shuffle block IDs.
Pin them to fixed values to ease booting in environments where UUIDs are
not practical. Use newly introduced aliases for mmcblk devices from [1].
The sort order is based on reg address.
[1] https://patchwork.kernel.org/patch/11747669/
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118155242.7172-5-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Recently introduced async probe on mmc devices can shuffle block IDs.
Pin them to fixed values to ease booting in environments where UUIDs are
not practical. Use newly introduced aliases for mmcblk devices from [1].
The sort order is based on reg address.
[1] https://patchwork.kernel.org/patch/11747669/
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118155242.7172-4-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Recently introduced async probe on mmc devices can shuffle block IDs.
Pin them to fixed values to ease booting in environments where UUIDs are
not practical. Use newly introduced aliases for mmcblk devices from [1].
The sort order is based on reg address.
[1] https://patchwork.kernel.org/patch/11747669/
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118155242.7172-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The cpu_thermal node in the rk3399-rock960.dts file does not
reference &cpu_thermal directly to add the board-specific parts,
but also repeats all the SoC default properties.
Clean the whole thing up and fix alignment.
Place new nodes in the correct alphabetical order.
Compered to rk3399.dtsi the temperature property in
cpu_alert0 changes from <70000> to <65000>.
A sustainable-power property was added.
The trip property in cooling map0 points to <&cpu_alert1>
instead of <&cpu_alert0>.
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210118180054.9360-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").
As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/131e0ea065109760ea3b59c4bb90cf4fac7826f7.1611186142.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Set NanoPi R2S's "sys" LED to be on by default. This matches the
behaviour of the stock FriendlyWRT image, and makes it much easier
to tell when the thing has finished booting.
Suitable triggers for the two network LEDs cannot realistically be
configured from DT, so leave them be.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/f066be60aa99460a45d04113c5e507d6602186f1.1611187213.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A test with the command below gives for example this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pcie@f8000000:
ranges: 'oneOf' conditional failed, one must be fixed:
The pcie ranges property is an array. The dt-check expects that
each array item is wrapped with angle brackets, so fix that ranges
property format for the rk3399 pcie node.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/
schemas/pci/pci-bus.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210122171243.16138-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to the schematic there is an external pull up, so there is no
need to enable the internal one additionally. Using no pull up matches
the vendor device tree.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Link: https://lore.kernel.org/r/20210124210328.611707-2-uwe@kleine-koenig.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Dmitry Baryshkov
Vignesh Raghavendra
Rafał Miłecki
Aswath Govindraju
Robert Foss
Vladimir Barinov
Robin Murphy
Teresa Remmet
Horia Geantă
Marek Vasut
Jagan Teki
Peng Fan
Adrien Grassein
Guido Günther
Martin Kepplinger
Angus Ainslie
Adam Ford
Michael Walle
Fabio Estevam
Bjorn Andersson
Vinod Koul
Yoshihiro Shimoda
Phong Hoang
Niklas Söderlund
Srinivas Kandagatla
Stephen Boyd
Shawn Guo
Rajendra Nayak
Maulik Shah
satya priya
Sai Prakash Ranjan
Douglas Anderson
Sandeep Maheswaram
Matthias Kaehlcke
Abhishek Kumar
Venkata Lakshmi Narayana Gubba
Alexandru M Stan
Jack Pham
Jan Kiszka
Pratyush Yadav
Hsin-Yi Wang
Geert Uytterhoeven
Suman Anna
Grygorii Strashko
Lokesh Vutla
Dave Gerlach
Peter Ujfalusi
Christian Hewitt
Quanyang Wang
Laurent Pinchart
Samuel Holland
Yuya Hamamachi
Krzysztof Kozlowski
Linus Torvalds
Nobuhiro Iwamatsu
Mark Brown
Konstantin Porotchkin
Arnd Bergmann
David S. Miller
Greg Kroah-Hartman
Dinh Nguyen
Artem Lapkin
Alexander Dahl
Jerome Brunet
AngeloGioacchino Del Regno
Konrad Dybcio
Akhil P Oommen
Vincent Knecht
Gustave Monce
Jonathan Albrieux
Manivannan Sadhasivam
Katsuhiro Suzuki
Johan Jonker
Uwe Kleine-König
Michal Simek